* [PATCH v2 1/2] phy: rockchip-typec: add pm runtime support
@ 2016-09-07 23:06 Chris Zhong
2016-09-07 23:06 ` [PATCH v2 2/2] arm64: dts: rk3399: add powerdomain for typec Chris Zhong
[not found] ` <1473289577-14101-1-git-send-email-zyw-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
0 siblings, 2 replies; 6+ messages in thread
From: Chris Zhong @ 2016-09-07 23:06 UTC (permalink / raw)
To: kishon, groeck, wulf, briannorris, heiko, dianders, kever.yang
Cc: linux-rockchip, linux-arm-kernel, Chris Zhong, linux-kernel
Adds pm_runtime support for rockchip Type-C, so that power domain is
enabled only when there is a transaction going on to help save power.
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
---
Changes in v2:
-- add pm_runtime_put_sync in err case
drivers/phy/phy-rockchip-typec.c | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/drivers/phy/phy-rockchip-typec.c b/drivers/phy/phy-rockchip-typec.c
index fb58a27..0b2f528 100644
--- a/drivers/phy/phy-rockchip-typec.c
+++ b/drivers/phy/phy-rockchip-typec.c
@@ -552,6 +552,12 @@ static int tcphy_phy_init(struct rockchip_typec_phy *tcphy, u8 mode)
goto err_clk_core;
}
+ ret = pm_runtime_get_sync(tcphy->dev);
+ if (ret < 0) {
+ dev_err(tcphy->dev, "cannot get pm runtime %d\n", ret);
+ goto err_clk_ref;
+ }
+
reset_control_deassert(tcphy->tcphy_rst);
property_enable(tcphy, &cfg->typec_conn_dir, tcphy->flip);
@@ -600,8 +606,10 @@ static int tcphy_phy_init(struct rockchip_typec_phy *tcphy, u8 mode)
return 0;
err_wait_pma:
+ pm_runtime_put_sync(tcphy->dev);
reset_control_assert(tcphy->uphy_rst);
reset_control_assert(tcphy->tcphy_rst);
+err_clk_ref:
clk_disable_unprepare(tcphy->clk_ref);
err_clk_core:
clk_disable_unprepare(tcphy->clk_core);
@@ -610,6 +618,7 @@ err_clk_core:
static void tcphy_phy_deinit(struct rockchip_typec_phy *tcphy)
{
+ pm_runtime_put_sync(tcphy->dev);
reset_control_assert(tcphy->tcphy_rst);
reset_control_assert(tcphy->uphy_rst);
reset_control_assert(tcphy->pipe_rst);
@@ -987,6 +996,15 @@ static int rockchip_typec_phy_probe(struct platform_device *pdev)
return PTR_ERR(phy_provider);
}
+ pm_runtime_enable(dev);
+
+ return 0;
+}
+
+static int rockchip_typec_phy_remove(struct platform_device *pdev)
+{
+ pm_runtime_disable(&pdev->dev);
+
return 0;
}
@@ -999,6 +1017,7 @@ MODULE_DEVICE_TABLE(of, rockchip_typec_phy_dt_ids);
static struct platform_driver rockchip_typec_phy_driver = {
.probe = rockchip_typec_phy_probe,
+ .remove = rockchip_typec_phy_remove,
.driver = {
.name = "rockchip-typec-phy",
.of_match_table = rockchip_typec_phy_dt_ids,
--
1.9.1
^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH v2 2/2] arm64: dts: rk3399: add powerdomain for typec
2016-09-07 23:06 [PATCH v2 1/2] phy: rockchip-typec: add pm runtime support Chris Zhong
@ 2016-09-07 23:06 ` Chris Zhong
[not found] ` <1473289577-14101-2-git-send-email-zyw-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
[not found] ` <1473289577-14101-1-git-send-email-zyw-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
1 sibling, 1 reply; 6+ messages in thread
From: Chris Zhong @ 2016-09-07 23:06 UTC (permalink / raw)
To: kishon, groeck, wulf, briannorris, heiko, dianders, kever.yang
Cc: linux-rockchip, linux-arm-kernel, Chris Zhong, devicetree,
David Wu, Jianqun Xu, Masahiro Yamada, linux-kernel, Will Deacon,
Mark Rutland, Rob Herring, Catalin Marinas
The tcpc power domain will try to power up/down the power of Type-C PHY.
Hence, we need control it in Type-C PHY driver with the pm_runtime helper.
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
---
Changes in v2: None
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 8c51095..3eb52b3 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1262,6 +1262,7 @@
clock-names = "tcpdcore", "tcpdphy-ref";
assigned-clocks = <&cru SCLK_UPHY0_TCPDCORE>;
assigned-clock-rates = <50000000>;
+ power-domains = <&power RK3399_PD_TCPD0>;
resets = <&cru SRST_UPHY0>,
<&cru SRST_UPHY0_PIPE_L00>,
<&cru SRST_P_UPHY0_TCPHY>;
@@ -1290,6 +1291,7 @@
clock-names = "tcpdcore", "tcpdphy-ref";
assigned-clocks = <&cru SCLK_UPHY1_TCPDCORE>;
assigned-clock-rates = <50000000>;
+ power-domains = <&power RK3399_PD_TCPD1>;
resets = <&cru SRST_UPHY1>,
<&cru SRST_UPHY1_PIPE_L00>,
<&cru SRST_P_UPHY1_TCPHY>;
--
1.9.1
^ permalink raw reply related [flat|nested] 6+ messages in thread[parent not found: <1473289577-14101-1-git-send-email-zyw-TNX95d0MmH7DzftRWevZcw@public.gmane.org>]
* Re: [PATCH v2 1/2] phy: rockchip-typec: add pm runtime support
[not found] ` <1473289577-14101-1-git-send-email-zyw-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
@ 2016-09-08 5:24 ` Kishon Vijay Abraham I
[not found] ` <57D0F612.10702-l0cyMroinI0@public.gmane.org>
0 siblings, 1 reply; 6+ messages in thread
From: Kishon Vijay Abraham I @ 2016-09-08 5:24 UTC (permalink / raw)
To: Chris Zhong, groeck-F7+t8E8rja9g9hUCZPvPmw,
wulf-TNX95d0MmH7DzftRWevZcw, briannorris-F7+t8E8rja9g9hUCZPvPmw,
heiko-4mtYJXux2i+zQB+pC5nmwQ, dianders-F7+t8E8rja9g9hUCZPvPmw,
kever.yang-TNX95d0MmH7DzftRWevZcw
Cc: linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
Hi,
On Thursday 08 September 2016 04:36 AM, Chris Zhong wrote:
> Adds pm_runtime support for rockchip Type-C, so that power domain is
> enabled only when there is a transaction going on to help save power.
>
> Signed-off-by: Chris Zhong <zyw-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
> ---
>
> Changes in v2:
> -- add pm_runtime_put_sync in err case
>
> drivers/phy/phy-rockchip-typec.c | 19 +++++++++++++++++++
> 1 file changed, 19 insertions(+)
>
> diff --git a/drivers/phy/phy-rockchip-typec.c b/drivers/phy/phy-rockchip-typec.c
> index fb58a27..0b2f528 100644
> --- a/drivers/phy/phy-rockchip-typec.c
> +++ b/drivers/phy/phy-rockchip-typec.c
> @@ -552,6 +552,12 @@ static int tcphy_phy_init(struct rockchip_typec_phy *tcphy, u8 mode)
> goto err_clk_core;
> }
>
> + ret = pm_runtime_get_sync(tcphy->dev);
> + if (ret < 0) {
> + dev_err(tcphy->dev, "cannot get pm runtime %d\n", ret);
> + goto err_clk_ref;
> + }
phy_core will do get_sync for you if.. <see below>
> +
> reset_control_deassert(tcphy->tcphy_rst);
>
> property_enable(tcphy, &cfg->typec_conn_dir, tcphy->flip);
> @@ -600,8 +606,10 @@ static int tcphy_phy_init(struct rockchip_typec_phy *tcphy, u8 mode)
> return 0;
>
> err_wait_pma:
> + pm_runtime_put_sync(tcphy->dev);
> reset_control_assert(tcphy->uphy_rst);
> reset_control_assert(tcphy->tcphy_rst);
> +err_clk_ref:
> clk_disable_unprepare(tcphy->clk_ref);
> err_clk_core:
> clk_disable_unprepare(tcphy->clk_core);
> @@ -610,6 +618,7 @@ err_clk_core:
>
> static void tcphy_phy_deinit(struct rockchip_typec_phy *tcphy)
> {
> + pm_runtime_put_sync(tcphy->dev);
> reset_control_assert(tcphy->tcphy_rst);
> reset_control_assert(tcphy->uphy_rst);
> reset_control_assert(tcphy->pipe_rst);
> @@ -987,6 +996,15 @@ static int rockchip_typec_phy_probe(struct platform_device *pdev)
> return PTR_ERR(phy_provider);
> }
>
> + pm_runtime_enable(dev);
... pm_runtime_enable is invoked before phy_create.
Thanks
Kishon
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2016-09-08 15:31 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
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2016-09-07 23:06 [PATCH v2 1/2] phy: rockchip-typec: add pm runtime support Chris Zhong
2016-09-07 23:06 ` [PATCH v2 2/2] arm64: dts: rk3399: add powerdomain for typec Chris Zhong
[not found] ` <1473289577-14101-2-git-send-email-zyw-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2016-09-08 15:16 ` Heiko Stuebner
[not found] ` <1473289577-14101-1-git-send-email-zyw-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2016-09-08 5:24 ` [PATCH v2 1/2] phy: rockchip-typec: add pm runtime support Kishon Vijay Abraham I
[not found] ` <57D0F612.10702-l0cyMroinI0@public.gmane.org>
2016-09-08 5:57 ` [RESEND PATCH v3 " Chris Zhong
2016-09-08 15:31 ` Guenter Roeck
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