From: Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>
To: Shawn Lin <shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
Cc: linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
Brian Norris
<briannorris-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
Subject: Re: [PATCH 2/2] arm64: dts: rockchip: add aspm-no-l0s for rk3399
Date: Fri, 06 Jan 2017 10:13:28 +0100 [thread overview]
Message-ID: <5912933.DPf2U8pco7@phil> (raw)
In-Reply-To: <1481881357-1793-2-git-send-email-shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
Hi Shawn,
Am Freitag, 16. Dezember 2016, 17:42:37 CET schrieb Shawn Lin:
> Per the discussion of bug fix[1], we now actually
> leaves the default clock choice for pcie phy is
> derived from 24MHz OSC to guarantee the least BER.
> So let's add aspm-no-l0s here and folks could delete
> this property from their dts.
>
> [1] https://patchwork.kernel.org/patch/9470519/
> Signed-off-by: Shawn Lin <shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
looks ok, but the underlying property addition hasn't been included yet, so
we'll have to wait for a bit longer.
If you notice the pci-host change going in, could you ping this patch please.
Thanks
Heiko
next prev parent reply other threads:[~2017-01-06 9:13 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-12-16 9:42 [PATCH 1/2] arm64: dts: rockchip: add max-link-speed for rk3399 Shawn Lin
[not found] ` <1481881357-1793-1-git-send-email-shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2016-12-16 9:42 ` [PATCH 2/2] arm64: dts: rockchip: add aspm-no-l0s " Shawn Lin
[not found] ` <1481881357-1793-2-git-send-email-shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2017-01-06 9:13 ` Heiko Stuebner [this message]
2017-01-13 1:43 ` Shawn Lin
2017-01-13 11:05 ` Heiko Stuebner
2017-01-06 9:11 ` [PATCH 1/2] arm64: dts: rockchip: add max-link-speed " Heiko Stuebner
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