[PATCH 1/2] arm64: dts: rockchip: add max-link-speed for rk3399

[PATCH 1/2] arm64: dts: rockchip: add max-link-speed for rk3399

[Shawn Lin]

Per the errata of TRM, rk3399 won't support gen2 from
now on, so let's set max-link-speed to 1 in order not
to doing training for gen2.

Signed-off-by: Shawn Lin <shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
---

 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 66a11d1..0be5f71 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -297,6 +297,7 @@
 				<0 0 0 3 &pcie0_intc 2>,
 				<0 0 0 4 &pcie0_intc 3>;
 		msi-map = <0x0 &its 0x0 0x1000>;
+		max-link-speed = <1>;
 		phys = <&pcie_phy>;
 		phy-names = "pcie-phy";
 		ranges = <0x83000000 0x0 0xfa000000 0x0 0xfa000000 0x0 0x600000
-- 
1.9.1

[PATCH 2/2] arm64: dts: rockchip: add aspm-no-l0s for rk3399

[Shawn Lin]

Per the discussion of bug fix[1], we now actually
leaves the default clock choice for pcie phy is
derived from 24MHz OSC to guarantee the least BER.
So let's add aspm-no-l0s here and folks could delete
this property from their dts.

[1] https://patchwork.kernel.org/patch/9470519/
Signed-off-by: Shawn Lin <shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>

---

 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 0be5f71..1037693 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -282,6 +282,7 @@
 		#address-cells = <3>;
 		#size-cells = <2>;
 		#interrupt-cells = <1>;
+		aspm-no-l0s;
 		bus-range = <0x0 0x1>;
 		clocks = <&cru ACLK_PCIE>, <&cru ACLK_PERF_PCIE>,
 			 <&cru PCLK_PCIE>, <&cru SCLK_PCIE_PM>;
-- 
1.9.1

Re: [PATCH 1/2] arm64: dts: rockchip: add max-link-speed for rk3399

[Heiko Stuebner]

Am Freitag, 16. Dezember 2016, 17:42:36 CET schrieb Shawn Lin:
> Per the errata of TRM, rk3399 won't support gen2 from
> now on, so let's set max-link-speed to 1 in order not
> to doing training for gen2.
> 
> Signed-off-by: Shawn Lin <shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>

I've moved the new line above msi-map and applied the result for 4.11


Thanks
Heiko

Re: [PATCH 2/2] arm64: dts: rockchip: add aspm-no-l0s for rk3399

[Heiko Stuebner]

Hi Shawn,

Am Freitag, 16. Dezember 2016, 17:42:37 CET schrieb Shawn Lin:
> Per the discussion of bug fix[1], we now actually
> leaves the default clock choice for pcie phy is
> derived from 24MHz OSC to guarantee the least BER.
> So let's add aspm-no-l0s here and folks could delete
> this property from their dts.
> 
> [1] https://patchwork.kernel.org/patch/9470519/
> Signed-off-by: Shawn Lin <shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>

looks ok, but the underlying property addition hasn't been included yet, so 
we'll have to wait for a bit longer.

If you notice the pci-host change going in, could you ping this patch please.


Thanks
Heiko

Re: [PATCH 2/2] arm64: dts: rockchip: add aspm-no-l0s for rk3399

[Shawn Lin]

Hi Heiko,

On 2017/1/6 17:13, Heiko Stuebner wrote:
> Hi Shawn,
>
> Am Freitag, 16. Dezember 2016, 17:42:37 CET schrieb Shawn Lin:
>> Per the discussion of bug fix[1], we now actually
>> leaves the default clock choice for pcie phy is
>> derived from 24MHz OSC to guarantee the least BER.
>> So let's add aspm-no-l0s here and folks could delete
>> this property from their dts.
>>
>> [1] https://patchwork.kernel.org/patch/9470519/
>> Signed-off-by: Shawn Lin <shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
>
> looks ok, but the underlying property addition hasn't been included yet, so
> we'll have to wait for a bit longer.
>
> If you notice the pci-host change going in, could you ping this patch please.
>
>

yes, it was merged into Bjorn's pci-host yesterday , so could you
kindly pull this one? :)

> Thanks
> Heiko
>
>
> _______________________________________________
> Linux-rockchip mailing list
> Linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
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>


-- 
Best Regards
Shawn Lin

Re: [PATCH 2/2] arm64: dts: rockchip: add aspm-no-l0s for rk3399

[Heiko Stuebner]

Am Freitag, 16. Dezember 2016, 17:42:37 CET schrieb Shawn Lin:
> Per the discussion of bug fix[1], we now actually
> leaves the default clock choice for pcie phy is
> derived from 24MHz OSC to guarantee the least BER.
> So let's add aspm-no-l0s here and folks could delete
> this property from their dts.
> 
> [1] https://patchwork.kernel.org/patch/9470519/
> Signed-off-by: Shawn Lin <shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>

applied for 4.11

Thanks
Heiko