Re: [RFC PATCH v1 4/6] arm64: dts: rockchip: add rk3328 usb3 phy node

Krzysztof Kozlowski
2025-01-16T13:02:56Z

On 15/01/2025 02:26, Peter Geis wrote:
> Add the node for the rk3328 usb3 phy. This node provides a combined usb2
> and usb3 phy which are permenantly tied to the dwc3 usb3 controller.
>
> Signed-off-by: Peter Geis <pgwipeout@gmail.com>
> ---
>
> arch/arm64/boot/dts/rockchip/rk3328.dtsi | 39 ++++++++++++++++++++++++
> 1 file changed, 39 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
> index 7d992c3c01ce..181a900d41f9 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
> @@ -903,6 +903,43 @@ u2phy_host: host-port {
> };
> };
>
> + usb3phy: usb3-phy@ff460000 {
> + compatible = "rockchip,rk3328-usb3phy";
> + reg = <0x0 0xff460000 0x0 0x10000>;
> + clocks = <&cru SCLK_REF_USB3OTG>, <&cru PCLK_USB3PHY_OTG>, <&cru PCLK_USB3PHY_PIPE>;

Please wrap code according to coding style (checkpatch is not a coding
style description, but only a tool), so at 80.

> + clock-names = "refclk-usb3otg", "usb3phy-otg", "usb3phy-pipe";
> + interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "bvalid", "id", "linestate", "rxdet";
> + resets = <&cru SRST_USB3PHY_U2>,
> + <&cru SRST_USB3PHY_U3>,
> + <&cru SRST_USB3PHY_PIPE>,
> + <&cru SRST_USB3OTG_UTMI>,
> + <&cru SRST_USB3PHY_OTG_P>,
> + <&cru SRST_USB3PHY_PIPE_P>;
> + reset-names = "usb3phy-u2-por", "usb3phy-u3-por",
> + "usb3phy-pipe-mac", "usb3phy-utmi-mac",
> + "usb3phy-utmi-apb", "usb3phy-pipe-apb";
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> + status = "disabled";
> +
> + usb3phy_utmi: utmi-port@ff470000 {
> + compatible = "rockchip,rk3328-usb3phy-utmi";
> + reg = <0x0 0xff470000 0x0 0x8000>;
> + #phy-cells = <0>;

Parent device is the phy provider, not child. This is odd...

> + status = "disabled";
> + };
> +
> + usb3phy_pipe: pipe-port@ff478000 {
> + compatible = "rockchip,rk3328-usb3phy-pipe";
> + reg = <0x0 0xff478000 0x0 0x8000>;
> + #phy-cells = <0>;
> + status = "disabled";
> + };
> + };

Best regards,
Krzysztof