From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 517C8E77188 for ; Fri, 20 Dec 2024 03:38:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:Content-Type: Content-Transfer-Encoding:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:From:References:To:Subject:MIME-Version: Date:Message-ID:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=Hf93S+Jj+Bw/Vr7t7j7kcNgW0QdcM53uGqfoDRBmu4w=; b=cJfEQxgDfjqcEEc9obS2o+00Fq ZmIWZzT1DdKuuGKHsoM34TaFTJ1ZkQy/5aNHgkzAIabMlIwKj4f4DnUmE7FIRelz/gKhlbyp2AXDp GFZPM4tSFkzkc/WDWcgQZzVhbsU2skCKFBLrwQf6C8qPKshTkPHPs4pyKNGFxxDPHiJMYMrhYnA4B 2vJlS7H+CSd9/ueeKcYuZyKu9lc7BnZUabLZCXNSbBbYK6XauGY8/jvBy1zoB1XZd2ZBZrI69Ic1Y ESlx7QbrX9aBsQJl8zh4AYY+khFFOgG9kW5W4gPamrvXm35AV6o/NQwjXDUQnkOZ62r83fx8c9bO1 hbKi2c4A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tOTpn-00000003onT-3X5x; Fri, 20 Dec 2024 03:37:51 +0000 Received: from mail-m12736.qiye.163.com ([115.236.127.36]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tOTpj-00000003om8-3EHi; Fri, 20 Dec 2024 03:37:49 +0000 Received: from [172.16.12.26] (unknown [58.22.7.114]) by smtp.qiye.163.com (Hmail) with ESMTP id 6490df3d; Fri, 20 Dec 2024 11:37:42 +0800 (GMT+08:00) Message-ID: <654c30ec-7d7e-4956-9a48-15bfcea34acc@rock-chips.com> Date: Fri, 20 Dec 2024 11:37:43 +0800 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 07/15] drm/bridge: analogix_dp: Add support for phy configuration. To: Dmitry Baryshkov References: <20241219080604.1423600-1-damon.ding@rock-chips.com> <20241219080604.1423600-8-damon.ding@rock-chips.com> Content-Language: en-US From: Damon Ding In-Reply-To: X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFDSUNOT01LS0k3V1ktWUFJV1kPCRoVCBIfWUFZGh0dT1ZOHxpOTEoYSh1KTU5WFRQJFh oXVRMBExYaEhckFA4PWVdZGBILWUFZTkNVSUlVTFVKSk9ZV1kWGg8SFR0UWUFZT0tIVUpLSUhCSE NVSktLVUpCS0tZBg++ X-HM-Tid: 0a93e2247d3c03a3kunm6490df3d X-HM-MType: 1 X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6PVE6URw4ODINPgoBNxZKElYx VjkaCSJVSlVKTEhPTU1OQ01PSk9OVTMWGhIXVR8aFhQVVR8SFRw7CRQYEFYYExILCFUYFBZFWVdZ EgtZQVlOQ1VJSVVMVUpKT1lXWQgBWUFOSUxPNwY+ DKIM-Signature: a=rsa-sha256; b=BNh8FahPwmuvK6MM0EPKjBum6/FRTxh5eh7cdcI7tDsXipaU4vLw5CVWum79FFyoe/28F8jWM6uOx23DYydpmSHsWVc7C8J2P4hzwpMa6FvkHR+l02aaVOiz3ltW/HPkZEAgtHOGjmLmDczOHqnQlEDX7yt3mukQFM4SIZ/h6fw=; c=relaxed/relaxed; s=default; d=rock-chips.com; v=1; bh=vmzJTIEG/eblu6dvI0z4VxTeppAOPZKokTvbYKlKCgE=; h=date:mime-version:subject:message-id:from; X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241219_193748_373569_3D90D800 X-CRM114-Status: GOOD ( 14.29 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: robh@kernel.org, conor+dt@kernel.org, algea.cao@rock-chips.com, rfoss@kernel.org, heiko@sntech.de, devicetree@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, sebastian.reichel@collabora.com, dri-devel@lists.freedesktop.org, hjc@rock-chips.com, kever.yang@rock-chips.com, linux-rockchip@lists.infradead.org, vkoul@kernel.org, andy.yan@rock-chips.com, krzk+dt@kernel.org, linux-arm-kernel@lists.infradead.org, l.stach@pengutronix.de Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org Hi Dmitry, On 2024/12/20 8:13, Dmitry Baryshkov wrote: > On Thu, Dec 19, 2024 at 04:05:56PM +0800, Damon Ding wrote: >> Add support to configurate link rate, lane count, voltage swing and >> pre-emphasis with phy_configure(). It is helpful in application scenarios >> where analogix controller is mixed with the phy of other vendors. >> >> Signed-off-by: Damon Ding >> >> --- >> >> Changes in v2: >> - remove needless assignments for phy_configure() >> - remove unnecessary changes for phy_power_on()/phy_power_off() >> --- >> .../drm/bridge/analogix/analogix_dp_core.c | 1 + >> .../gpu/drm/bridge/analogix/analogix_dp_reg.c | 56 +++++++++++++++++++ >> 2 files changed, 57 insertions(+) >> >> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c >> index 6f10d88a34c5..9429c50cc1bc 100644 >> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c >> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c >> @@ -1696,6 +1696,7 @@ int analogix_dp_resume(struct analogix_dp_device *dp) >> if (dp->plat_data->power_on) >> dp->plat_data->power_on(dp->plat_data); >> >> + phy_set_mode(dp->phy, PHY_MODE_DP); >> phy_power_on(dp->phy); >> >> analogix_dp_init_dp(dp); >> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c >> index 3afc73c858c4..613ce504bea6 100644 >> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c >> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c >> @@ -11,6 +11,7 @@ >> #include >> #include >> #include >> +#include >> >> #include >> >> @@ -513,10 +514,25 @@ void analogix_dp_enable_sw_function(struct analogix_dp_device *dp) >> void analogix_dp_set_link_bandwidth(struct analogix_dp_device *dp, u32 bwtype) >> { >> u32 reg; >> + int ret; >> >> reg = bwtype; >> if ((bwtype == DP_LINK_BW_2_7) || (bwtype == DP_LINK_BW_1_62)) >> writel(reg, dp->reg_base + ANALOGIX_DP_LINK_BW_SET); >> + >> + if (dp->phy) { >> + union phy_configure_opts phy_cfg = {0}; >> + >> + phy_cfg.dp.lanes = dp->link_train.lane_count; > > Should not be necessary, you are only setting the .set_rate. Indeed, this can be dropped. > >> + phy_cfg.dp.link_rate = >> + drm_dp_bw_code_to_link_rate(dp->link_train.link_rate) / 100; >> + phy_cfg.dp.set_rate = true; >> + ret = phy_configure(dp->phy, &phy_cfg); >> + if (ret && ret != -EOPNOTSUPP) { >> + dev_err(dp->dev, "%s: phy_configure() failed: %d\n", __func__, ret); >> + return; >> + } >> + } >> } >> >> void analogix_dp_get_link_bandwidth(struct analogix_dp_device *dp, u32 *bwtype) >> @@ -530,9 +546,22 @@ void analogix_dp_get_link_bandwidth(struct analogix_dp_device *dp, u32 *bwtype) >> void analogix_dp_set_lane_count(struct analogix_dp_device *dp, u32 count) >> { >> u32 reg; >> + int ret; >> >> reg = count; >> writel(reg, dp->reg_base + ANALOGIX_DP_LANE_COUNT_SET); >> + >> + if (dp->phy) { >> + union phy_configure_opts phy_cfg = {0}; >> + >> + phy_cfg.dp.lanes = dp->link_train.lane_count; >> + phy_cfg.dp.set_lanes = true; >> + ret = phy_configure(dp->phy, &phy_cfg); >> + if (ret && ret != -EOPNOTSUPP) { >> + dev_err(dp->dev, "%s: phy_configure() failed: %d\n", __func__, ret); >> + return; >> + } >> + } >> } >> >> void analogix_dp_get_lane_count(struct analogix_dp_device *dp, u32 *count) >> @@ -546,10 +575,37 @@ void analogix_dp_get_lane_count(struct analogix_dp_device *dp, u32 *count) >> void analogix_dp_set_lane_link_training(struct analogix_dp_device *dp) >> { >> u8 lane; >> + int ret; >> >> for (lane = 0; lane < dp->link_train.lane_count; lane++) >> writel(dp->link_train.training_lane[lane], >> dp->reg_base + ANALOGIX_DP_LN0_LINK_TRAINING_CTL + 4 * lane); >> + >> + if (dp->phy) { >> + union phy_configure_opts phy_cfg = {0}; >> + >> + for (lane = 0; lane < dp->link_train.lane_count; lane++) { >> + u8 training_lane = dp->link_train.training_lane[lane]; >> + u8 vs, pe; >> + >> + vs = (training_lane & DP_TRAIN_VOLTAGE_SWING_MASK) >> >> + DP_TRAIN_VOLTAGE_SWING_SHIFT; >> + pe = (training_lane & DP_TRAIN_PRE_EMPHASIS_MASK) >> >> + DP_TRAIN_PRE_EMPHASIS_SHIFT; >> + phy_cfg.dp.voltage[lane] = vs; >> + phy_cfg.dp.pre[lane] = pe; >> + } >> + >> + phy_cfg.dp.lanes = dp->link_train.lane_count; >> + phy_cfg.dp.link_rate = >> + drm_dp_bw_code_to_link_rate(dp->link_train.link_rate) / 100; > > This two should not be necessary, please drop them. These two are necessary for rk_hdptx_phy_set_voltage(), so they cannot be dropped. > >> + phy_cfg.dp.set_voltages = true; >> + ret = phy_configure(dp->phy, &phy_cfg); >> + if (ret && ret != -EOPNOTSUPP) { >> + dev_err(dp->dev, "%s: phy_configure() failed: %d\n", __func__, ret); >> + return; >> + } >> + } >> } >> >> u32 analogix_dp_get_lane_link_training(struct analogix_dp_device *dp, u8 lane) >> -- >> 2.34.1 >> > Best regards, Damon _______________________________________________ Linux-rockchip mailing list Linux-rockchip@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-rockchip