Re: [PATCH v3 1/2] Documentation: bindings: add DT documentation for Rockchip USB2PHY

Heiko Stübner
2016-06-06T12:33:27Z

Am Montag, 6. Juni 2016, 12:27:54 schrieb Mark Rutland:
> On Mon, Jun 06, 2016 at 05:20:03PM +0800, Frank Wang wrote:
> > Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
> > ---
> >
> > Changes in v3:
> > - Added 'clocks' and 'clock-names' optional properties.
> > - Specified 'otg-port' and 'host-port' as the sub-node name.
> >
> > Changes in v2:
> > - Changed vbus_host optional property from gpio to regulator.
> > - Specified vbus_otg-supply optional property.
> > - Specified otg_id and otg_bvalid property.
> >
> > .../bindings/phy/phy-rockchip-inno-usb2.txt | 60
> > ++++++++++++++++++++ 1 file changed, 60 insertions(+)
> > create mode 100644
> > Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt>
> > diff --git
> > a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt
> > b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt new
> > file mode 100644
> > index 0000000..0b4bbbb
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt
> > @@ -0,0 +1,60 @@
> > +ROCKCHIP USB2.0 PHY WITH INNO IP BLOCK
> > +
> > +Required properties (phy (parent) node):
> > + - compatible : should be one of the listed compatibles:
> > + * "rockchip,rk3366-usb2phy"
> > + * "rockchip,rk3399-usb2phy"
> > + - #clock-cells : should be 0.
> > + - clock-output-names : specify the 480m output clock name.
> > +
> > +Optional properties:
> > + - clocks : phandle + phy specifier pair, for the input clock of phy.
> > + - clock-names : input clock name of phy, must be "phyclk".
> > + - vbus_host-supply : phandle to a regulator that supplies host vbus.
> > + - vbus_otg-supply : phandle to a regulator that supplies otg vbus.
>
> Nit: s/_/-/ here.

Something I only stumbled over yesterday for the first time on my rk3288-
popmetal: The phy subnodes seem to be able to use a generic phy-supply
property from inside the phy-core itself, see:

https://github.com/mmind/linux-rockchip/commit/93739f521fc65f44524b00c9aaf6db46bca94e02#diff-ddf3e45ebb753d6debf57022003a1a57R597

for my WIP code for that other board.

> Otherwise the rest of this looks generally fine, though I'm confused as
> to how you address the programming interface(s), given none are
> described.

I think that comes generally down to phy_power_on and phy_power_off from the
host driver (ehci / dwc2 / whatever) using the generic phy interface. The usb2
phys on Rockchip SoCs seem always pretty easy to handle, while the new
additional typeC phy seems to require more work

Heiko

> > +
> > +Required nodes : a sub-node is required for each port the phy provides.
> > + The sub-node name is used to identify host or otg port,
> > + and shall be the following entries:
> > + * "otg-port" : the name of otg port.
> > + * "host-port" : the name of host port.
> > +
> > +Required properties (port (child) node):
> > + - #phy-cells : must be 0. See ./phy-bindings.txt for details.
> > + - interrupts : specify an interrupt for each entry in interrupt-names.
> > + - interrupt-names : a list which shall be the following entries:
> > + * "otg_id" : for the otg id interrupt.
> > + * "otg_bvalid" : for the otg vbus interrupt.
> > + * "linestate" : for the host/otg linestate interrupt.
> > +
> > +Example:
> > +
> > +grf: syscon@ff770000 {
> > + compatible = "rockchip,rk3366-grf", "syscon", "simple-mfd";
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > +
> > +...
> > +
> > + u2phy: usb2-phy {
> > + compatible = "rockchip,rk3366-usb2phy";
> > + #clock-cells = <0>;
> > + clock-output-names = "sclk_otgphy0_480m";
> > +
> > + u2phy_otg: otg-port {
> > + #phy-cells = <0>;
> > + interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>,
> > + <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>,
> > + <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
> > + interrupt-names = "otg_id", "otg_bvalid", "linestate";
> > + status = "okay";
> > + };
> > +
> > + u2phy_host: host-port {
> > + #phy-cells = <0>;
> > + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
> > + interrupt-names = "linestate";
> > + status = "okay";
> > + };
> > + };
> > +};