From mboxrd@z Thu Jan 1 00:00:00 1970 From: Mylene Josserand Subject: Re: [PATCH v2 2/2] clk: rockchip: rk3288: Handle clock tree for rk3288w Date: Thu, 2 Apr 2020 08:35:05 +0200 Message-ID: <7c21a7d6-a24f-dbc6-4eaa-548ddfc0f73e@collabora.com> References: <20200401153513.423683-1-mylene.josserand@collabora.com> <20200401153513.423683-3-mylene.josserand@collabora.com> Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Return-path: In-Reply-To: Content-Language: en-US Sender: linux-kernel-owner@vger.kernel.org To: Geert Uytterhoeven Cc: Heiko Stuebner , Linux ARM , Michael Turquette , Stephen Boyd , Linux Kernel Mailing List , "open list:ARM/Rockchip SoC..." , linux-clk , Collabora Kernel ML , kever.yang@rock-chips.com List-Id: linux-rockchip.vger.kernel.org Hi Geert, On 4/1/20 6:56 PM, Geert Uytterhoeven wrote: > Hi Mylène, > > On Wed, Apr 1, 2020 at 5:35 PM Mylène Josserand > wrote: >> The revision rk3288w has a different clock tree about >> "hclk_vio" clock, according to the BSP kernel code. >> >> This patch handles this difference by detecting which SOC it is >> and creating the div accordingly. Because we are using >> soc_device_match function, we need to delay the registration >> of this clock later than others to have time to get SoC revision. >> >> Otherwise, because of CLK_OF_DECLARE uses, clock tree will be >> created too soon to have time to detect SoC's revision. >> >> Signed-off-by: Mylène Josserand > > Thanks for your patch! Thanks for your review! > >> --- a/drivers/clk/rockchip/clk-rk3288.c >> +++ b/drivers/clk/rockchip/clk-rk3288.c >> @@ -914,10 +923,15 @@ static struct syscore_ops rk3288_clk_syscore_ops = { >> .resume = rk3288_clk_resume, >> }; >> >> +static const struct soc_device_attribute rk3288w[] = { >> + { .soc_id = "RK32xx", .revision = "RK3288w" }, >> + { /* sentinel */ } >> +}; >> + >> +static struct rockchip_clk_provider *ctx; >> + >> static void __init rk3288_clk_init(struct device_node *np) >> { >> - struct rockchip_clk_provider *ctx; >> - >> rk3288_cru_base = of_iomap(np, 0); >> if (!rk3288_cru_base) { >> pr_err("%s: could not map cru region\n", __func__); >> @@ -955,3 +969,17 @@ static void __init rk3288_clk_init(struct device_node *np) >> rockchip_clk_of_add_provider(np, ctx); >> } >> CLK_OF_DECLARE(rk3288_cru, "rockchip,rk3288-cru", rk3288_clk_init); >> + >> +static int __init rk3288_hclkvio_register(void) >> +{ > > This function will always be called, even when running a (multi-platform) > kernel on a non-rk3288 platform. So you need some protection against > that. erg, good point, I didn't think about that. > >> + /* Check for the rk3288w revision as clock tree is different */ >> + if (soc_device_match(rk3288w)) >> + rockchip_clk_register_branches(ctx, rk3288w_hclkvio_branch, >> + ARRAY_SIZE(rk3288w_hclkvio_branch)); >> + else >> + rockchip_clk_register_branches(ctx, rk3288_hclkvio_branch, >> + ARRAY_SIZE(rk3288_hclkvio_branch)); > > Note that soc_device_match() returns a struct soc_device_attribute > pointer. If you would store the rockchip_clk_branch array pointer and > size in rk3288w[...].data (i.e. a pointer to a struct containing that > info), for both the r83288w and normal rk3288 variants, you could > simplify this to: > > attr = soc_device_match(rk3288w); > if (attr) { > struct rk3288_branch_array *p = attr->data; > rockchip_clk_register_branches(ctx, p->branches, p->len); > } > > That would handle the not-running-on-rk3288 issue as well. Nice, thank you for the explanation and the code, very useful :) Best regards, Mylène