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auth=pass smtp.auth=dsimic@manjaro.org smtp.mailfrom=dsimic@manjaro.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240228_024235_679380_59DD08EE X-CRM114-Status: GOOD ( 15.24 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org Hello Anand, On 2024-02-27 15:58, Dragan Simic wrote: > On 2024-02-27 13:49, Anand Moon wrote: >> On Tue, 27 Feb 2024 at 00:39, Dragan Simic wrote: >>> On 2024-02-26 19:23, Anand Moon wrote: >>> > As per RK3568 Datasheet and TRM add missing cache information to >>> > the Rockchip RK3566 and RK3568 SoC. >>> > >>> > - Each Cortex-A55 core has 32KB of L1 instruction cache available and >>> > 32KB of L1 data cache available with ECC. >>> > - Along with 512KB Unified L3 cache with ECC. >>> > >>> > With adding instruction cache and data cache and a write buffer to >>> > reduce the effect of main memory bandwidth and latency on data >>> > access performance. >>> > >>> > Signed-off-by: Anand Moon >>> >>> I was about to send my own patch that adds the same missing cache >>> information, so please allow me to describe the proposed way to move >>> forward. >>> >>> The way I see it, your commit summary and description need a rather >>> complete rewrite, to be more readable, more accurate, and to avoid >>> including an irrelevant (and slightly misleading) description of the >>> general role of caches. >>> >>> Also, the changes to the dtsi file would benefit from small touch-ups >>> here and there, for improved consistency, etc. >>> >>> With all that in mind, I propose that you withdraw your patch and let >>> me send my patch that will addresses all these issues, of course with >>> a proper tag that lists you as a co-developer. I think that would >>> save us a fair amount of time going back and forth. >>> >>> I hope you agree. >> >> I have no issue with this,.If you have a better version plz share >> this. > > Thank you, I'll send my patch within the next couple of days. Here's a brief update... Basically, not all of the cache-size values found in your patch were correct, but I've got all of them calculated again, double-checked, and cross-compared with the way values in my earlier patch for the RK3399 SoC dtsi were calculated. [2] It all checked out just fine. It's all based on the RK3566 and RK3568 SoC datasheets and a couple of ARM specifications, which I'll describe in detail in my patch description. I'll send the patch after I test it a bit, to make sure it all works as expected. [1] https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=b72633ba5cfa932405832de25d0f0a11716903b4 _______________________________________________ Linux-rockchip mailing list Linux-rockchip@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-rockchip