From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3597CE95A67 for ; Sun, 8 Oct 2023 22:19:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:From:References:Cc:To: Subject:MIME-Version:Date:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=kLND3agVaanHFeViKouGmLRunMz5QFrDGhe6OPaiXkU=; b=YcSRjda7HIPhm3 hsFWx8ag7VkPgQpjPosl3Yp3LJm8T524YRDDHuGJBTJsDTdWptTcANIYxkyW2dmgB6jZ5V8y7l17N ABIwUTcdzfIFMotVYsdj96slyUg8VovxFWZu8x6GBuzQeG3WkNgynxslJPnr3TC9Fo/NfuASTVdL9 8GepLYqJQUvkKEv8N2jZg3MGaq4r9J2H/aB/nFg1Pa4zPvmCdcQfWNo1Jc9HZ2B2Jo2hCPmYC2ngH yYgQWlzo8twY7RxgSSKa2QjpxKnnBWg1zFIj3f2XUBYbYH+U7RAP1Hjl15U9xfMMm3uQ0GVvUnid2 Lk1yWlV9WxBWVQctQrcA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qpc7J-009OV7-1M; Sun, 08 Oct 2023 22:19:17 +0000 Received: from ams.source.kernel.org ([2604:1380:4601:e00::1]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qpc7E-009OTF-30; Sun, 08 Oct 2023 22:19:14 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by ams.source.kernel.org (Postfix) with ESMTP id 729D2B80CAF; Sun, 8 Oct 2023 22:19:11 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id D7C6AC433C7; Sun, 8 Oct 2023 22:19:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1696803550; bh=05vPfLU2yIkLwnr16KJ7BkjZqNGNPvyMsiVoRgVyMWI=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=GLQPOLsfHm1nrFWusCYAG+KfDebAqF8gspuEqRy1ZbgxBJoSn49zKwVh2sQi1iINy a3P8Q0/Fg6ropEdOUBLY/DTewkwlPV7uwJOciXmtx5Cd/LxMez7kYwbAR+dvfYFD5C bLDxMFM9u+Iz4+kpo/gccTjN/ZSyrA7BXcKn2npxSkEfozKVTmumy/m0y+xAZqhtQx 9uhi8h7jUpPKmDqYCZW4BUklxJ4ipLkoc43jvsbhLPdBnuMbRcWcpY/qh0GozxOBPw oaVPD6BPlVwzG7gwE7o+/8N8+1myUIsGoe7pu93MFKakShO/Dnc2SBux9AnFNRG1LG M9rv5hzsCmlEQ== Message-ID: <98c448be-8ea8-a0bd-62cc-3bc3a5cf5569@kernel.org> Date: Mon, 9 Oct 2023 07:19:04 +0900 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.15.1 Subject: Re: [PATCH v7 18/26] PM / devfreq: rockchip-dfi: account for multiple DDRMON_CTRL registers Content-Language: en-US To: Sascha Hauer , linux-rockchip@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, Heiko Stuebner , Kyungmin Park , MyungJoo Ham , Will Deacon , Mark Rutland , kernel@pengutronix.de, Michael Riesch , Robin Murphy , Vincent Legoll , Rob Herring , Krzysztof Kozlowski , Conor Dooley , devicetree@vger.kernel.org, Sebastian Reichel , Jonathan Cameron References: <20230704093242.583575-1-s.hauer@pengutronix.de> <20230704093242.583575-19-s.hauer@pengutronix.de> From: Chanwoo Choi In-Reply-To: <20230704093242.583575-19-s.hauer@pengutronix.de> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231008_151913_231665_F676FDB8 X-CRM114-Status: GOOD ( 27.76 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org On 23. 7. 4. 18:32, Sascha Hauer wrote: > The currently supported RK3399 has a set of registers per channel, but > it has only a single DDRMON_CTRL register. With upcoming RK3588 this > will be different, the RK3588 has a DDRMON_CTRL register per channel. > > Instead of expecting a single DDRMON_CTRL register, loop over the > channels and write the channel specific DDRMON_CTRL register. Break > out early out of the loop when there is only a single DDRMON_CTRL > register like on the RK3399. > > Reviewed-by: Jonathan Cameron > Reviewed-by: Sebastian Reichel > Signed-off-by: Sascha Hauer > --- > drivers/devfreq/event/rockchip-dfi.c | 72 ++++++++++++++++++---------- > 1 file changed, 48 insertions(+), 24 deletions(-) > > diff --git a/drivers/devfreq/event/rockchip-dfi.c b/drivers/devfreq/event/rockchip-dfi.c > index 85ec93fd41858..2362d3953ba40 100644 > --- a/drivers/devfreq/event/rockchip-dfi.c > +++ b/drivers/devfreq/event/rockchip-dfi.c > @@ -113,12 +113,13 @@ struct rockchip_dfi { > int burst_len; > int buswidth[DMC_MAX_CHANNELS]; > int ddrmon_stride; > + bool ddrmon_ctrl_single; > }; > > static int rockchip_dfi_enable(struct rockchip_dfi *dfi) > { > void __iomem *dfi_regs = dfi->regs; > - int ret = 0; > + int i, ret = 0; > > mutex_lock(&dfi->mutex); > > @@ -132,29 +133,41 @@ static int rockchip_dfi_enable(struct rockchip_dfi *dfi) > goto out; > } > > - /* clear DDRMON_CTRL setting */ > - writel_relaxed(HIWORD_UPDATE(0, DDRMON_CTRL_TIMER_CNT_EN | DDRMON_CTRL_SOFTWARE_EN | > - DDRMON_CTRL_HARDWARE_EN), dfi_regs + DDRMON_CTRL); > + for (i = 0; i < DMC_MAX_CHANNELS; i++) { > + u32 ctrl = 0; > > - /* set ddr type to dfi */ > - switch (dfi->ddr_type) { > - case ROCKCHIP_DDRTYPE_LPDDR2: > - case ROCKCHIP_DDRTYPE_LPDDR3: > - writel_relaxed(HIWORD_UPDATE(DDRMON_CTRL_LPDDR23, DDRMON_CTRL_DDR_TYPE_MASK), > - dfi_regs + DDRMON_CTRL); > - break; > - case ROCKCHIP_DDRTYPE_LPDDR4: > - case ROCKCHIP_DDRTYPE_LPDDR4X: > - writel_relaxed(HIWORD_UPDATE(DDRMON_CTRL_LPDDR4, DDRMON_CTRL_DDR_TYPE_MASK), > - dfi_regs + DDRMON_CTRL); > - break; > - default: > - break; > - } > + if (!(dfi->channel_mask & BIT(i))) > + continue; > > - /* enable count, use software mode */ > - writel_relaxed(HIWORD_UPDATE(DDRMON_CTRL_SOFTWARE_EN, DDRMON_CTRL_SOFTWARE_EN), > - dfi_regs + DDRMON_CTRL); > + /* clear DDRMON_CTRL setting */ > + writel_relaxed(HIWORD_UPDATE(0, DDRMON_CTRL_TIMER_CNT_EN | > + DDRMON_CTRL_SOFTWARE_EN | DDRMON_CTRL_HARDWARE_EN), > + dfi_regs + i * dfi->ddrmon_stride + DDRMON_CTRL); > + > + /* set ddr type to dfi */ > + switch (dfi->ddr_type) { > + case ROCKCHIP_DDRTYPE_LPDDR2: > + case ROCKCHIP_DDRTYPE_LPDDR3: > + ctrl = DDRMON_CTRL_LPDDR23; > + break; > + case ROCKCHIP_DDRTYPE_LPDDR4: > + case ROCKCHIP_DDRTYPE_LPDDR4X: > + ctrl = DDRMON_CTRL_LPDDR4; > + break; > + default: > + break; > + } > + > + writel_relaxed(HIWORD_UPDATE(ctrl, DDRMON_CTRL_DDR_TYPE_MASK), > + dfi_regs + i * dfi->ddrmon_stride + DDRMON_CTRL); > + > + /* enable count, use software mode */ > + writel_relaxed(HIWORD_UPDATE(DDRMON_CTRL_SOFTWARE_EN, DDRMON_CTRL_SOFTWARE_EN), > + dfi_regs + i * dfi->ddrmon_stride + DDRMON_CTRL); > + > + if (dfi->ddrmon_ctrl_single) > + break; > + } > out: > mutex_unlock(&dfi->mutex); > > @@ -164,6 +177,7 @@ static int rockchip_dfi_enable(struct rockchip_dfi *dfi) > static void rockchip_dfi_disable(struct rockchip_dfi *dfi) > { > void __iomem *dfi_regs = dfi->regs; > + int i; > > mutex_lock(&dfi->mutex); > > @@ -174,8 +188,17 @@ static void rockchip_dfi_disable(struct rockchip_dfi *dfi) > if (dfi->usecount > 0) > goto out; > > - writel_relaxed(HIWORD_UPDATE(0, DDRMON_CTRL_SOFTWARE_EN), > - dfi_regs + DDRMON_CTRL); > + for (i = 0; i < DMC_MAX_CHANNELS; i++) { > + if (!(dfi->channel_mask & BIT(i))) > + continue; > + > + writel_relaxed(HIWORD_UPDATE(0, DDRMON_CTRL_SOFTWARE_EN), > + dfi_regs + i * dfi->ddrmon_stride + DDRMON_CTRL); > + > + if (dfi->ddrmon_ctrl_single) > + break; > + } > + > clk_disable_unprepare(dfi->clk); > out: > mutex_unlock(&dfi->mutex); > @@ -666,6 +689,7 @@ static int rk3399_dfi_init(struct rockchip_dfi *dfi) > dfi->buswidth[1] = FIELD_GET(RK3399_PMUGRF_OS_REG2_BW_CH1, val) == 0 ? 4 : 2; > > dfi->ddrmon_stride = 0x14; > + dfi->ddrmon_ctrl_single = true; > > return 0; > }; Even if rk3568 has the only one channle and don't need to check whether 'dfi->ddrmon_ctrl_single' is true or not because of 'if (!(dfi->channel_mask & BIT(i)))', I recommand the add 'dfi->ddrmon_ctrl_single = true;' for rk3568 in order to provide the number of DDRMON_CTRL reigster of rk3568. If rk3568 doesn't have the 'ddrmon_ctrl_single', actually it is not easy to catch what why are there no initilization for rk3568. -- Best Regards, Samsung Electronics Chanwoo Choi _______________________________________________ Linux-rockchip mailing list Linux-rockchip@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-rockchip