From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 41B68CCF9F8 for ; Wed, 12 Nov 2025 08:22:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=DyfMkeBtYWuYTo4e1wv4xA0bq9+ZzfIWSHpCiG2neeU=; b=FI9wsOhXyMMPtp L/T8wL+bFzE4c8uN4v3xOHlyABlYmaGV4v1eVP/VB7OmQLNuG0JkvUhUPt/DNHulDZ5QDaVYxnPBr OynM5p35zqCYzwD+wmHkF2k/EOyGSvp8HVjYBcRybOj3PEAY7MQFAJPPZMs8LgFM3vspV0mXTQ/G2 X7iChIPkb90zoxMUzF5e2BgVKCyrK3BWXxJEe1AzmcoFn3CANjHE8VRVvZncVszn4RAwE/nPAz4oy 1gkc7cSa5dTvs8Nlm2giI0yuD60q2+OOZqlpC8itSjMjKPmhjVD2MfcfsBKmRgb5uVuHx15GpDYay v/FnOufioC+N0glKqqJA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1vJ67t-00000008KZl-0k5u; Wed, 12 Nov 2025 08:22:49 +0000 Received: from sea.source.kernel.org ([172.234.252.31]) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1vJ67q-00000008KZ2-2BJz; Wed, 12 Nov 2025 08:22:47 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sea.source.kernel.org (Postfix) with ESMTP id 9A9C841573; Wed, 12 Nov 2025 08:22:45 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id A174BC4CEF8; Wed, 12 Nov 2025 08:22:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1762935765; bh=WHWCVmYt6UtQ3D5Ri8XoM/WvWGHNmlnb2EcUM8qufBk=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=kttxp00Xc7Q2NVR9zWtAQOW32+K5IUJtvvbjIacWFrREkJHKtXZvOqAE9Gua6PoGC Z0PWHqSpMfxReJv7iL5UYQPsbL046fDjJOWbbV4bdQ4pdjMz2nIzAIHZhMw7bzayUP y2Bv+7T/1TtBofUmqHq5O+CejsEDVgK3i6OQG2/ijVcXuHJBdoNk3MTvk2hn7OOdM5 4L32vutb2OpX5twJ0FaMH2B6Hocia+8TeMb5mZAZkTeNOGVOALNy25ugZsQxFkScZ+ F5ZGrNhFI8NY7qx2IFdGhctYLQpV0z7JBTaVUMm/cMNC1+rmxzdT6Bx+4s4v6urya+ S/b1vretnjh2g== Date: Wed, 12 Nov 2025 09:22:36 +0100 From: Niklas Cassel To: Bjorn Helgaas Cc: Shawn Lin , Manivannan Sadhasivam , Lorenzo Pieralisi , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Rob Herring , Heiko Stuebner , Kever Yang , Simon Xue , Damien Le Moal , Dragan Simic , FUKAUMI Naoki , Diederik de Haas , Richard Zhu , Frank Li , Lucas Stach , Shawn Guo , Sascha Hauer , Fabio Estevam , Conor Dooley , Krzysztof Kozlowski , Thierry Reding , Jonathan Hunter , Hans Zhang , linux-tegra@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, kernel@pengutronix.de, Bjorn Helgaas Subject: Re: [PATCH 1/4] PCI: dwc: Advertise L1 PM Substates only if driver requests it Message-ID: References: <20251111221621.2208606-1-helgaas@kernel.org> <20251111221621.2208606-2-helgaas@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20251111221621.2208606-2-helgaas@kernel.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20251112_002246_579910_CA5C61C4 X-CRM114-Status: GOOD ( 11.20 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org On Tue, Nov 11, 2025 at 04:16:08PM -0600, Bjorn Helgaas wrote: > --- a/drivers/pci/controller/dwc/pcie-designware-host.c > +++ b/drivers/pci/controller/dwc/pcie-designware-host.c > @@ -1060,6 +1060,8 @@ int dw_pcie_setup_rc(struct dw_pcie_rp *pp) > PCI_COMMAND_MASTER | PCI_COMMAND_SERR; > dw_pcie_writel_dbi(pci, PCI_COMMAND, val); > > + dw_pcie_config_l1ss(pci); The name dw_pcie_config_l1ss() sounds like we are enabling l1ss. I know naming is hard. Perhaps dw_pcie_disable_unsupported_l1ss() ? Or something similar. > --- a/drivers/pci/controller/dwc/pcie-qcom.c > +++ b/drivers/pci/controller/dwc/pcie-qcom.c > @@ -1067,6 +1067,8 @@ static int qcom_pcie_init_2_7_0(struct qcom_pcie *pcie) > val &= ~REQ_NOT_ENTR_L1; > writel(val, pcie->parf + PARF_PM_CTRL); > > + pci->l1ss_support = true; > + > val = readl(pcie->parf + PARF_AXI_MSTR_WR_ADDR_HALT_V2); > val |= EN; > writel(val, pcie->parf + PARF_AXI_MSTR_WR_ADDR_HALT_V2); While it seems like ops_2_7_0 is the only type that explicitly does a register write to enable L1ss, other versions might have the register as enabled by default, so it would be nice if Mani could confirm exactly which versions that should set l1ss_support = true. Kind regards, Niklas _______________________________________________ Linux-rockchip mailing list Linux-rockchip@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-rockchip