From: Rudi Heitbaum <rudi@heitbaum.com>
To: heiko@sntech.de
Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
devicetree@vger.kernel.org, linux-rockchip@lists.infradead.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, rudi@heitbaum.com
Subject: [PATCH] arm64: dts: rockchip: rk3399pro-vmarc-som: add i2c2 scl timing
Date: Mon, 24 Aug 2026 03:06:43 +0000 [thread overview]
Message-ID: <aou1Q5-hdF7kRVpe@0d3a7a881997> (raw)
The hym8563 on i2c2 does not ack:
rtc-hym8563 2-0051: could not init device, -6
It is also the ext_clock for sdio-pwrseq, so wifi does not come up
either.
i2c2 runs at 400 kHz with no scl edge times. The core defaults both to
300 ns and rk3x-i2c calculates a 900 ns high period, which is short for
this bus - it acks at 100 kHz. Set the edges to the values i2c3 already
uses, giving 1050 ns at 400 kHz.
Tested on a Radxa ROCK Pi N10: rtc0 registers and keeps time across a
reboot, and wifi activates.
Signed-off-by: Rudi Heitbaum <rudi@heitbaum.com>
---
arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
index 64e6ba345739..074f09c6d11c 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
@@ -296,6 +296,8 @@ &i2c1 {
&i2c2 {
clock-frequency = <400000>;
+ i2c-scl-falling-time-ns = <15>;
+ i2c-scl-rising-time-ns = <450>;
status = "okay";
hym8563: rtc@51 {
--
2.53.0
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reply other threads:[~2026-08-24 3:07 UTC|newest]
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