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Received: by smtp.zohomail.com with SMTPS id 1794266956303190.50034302404822; Mon, 9 Nov 2026 15:29:16 -0800 (PST) Received: by venus (Postfix, from userid 1000) id A5582180317; Tue, 10 Nov 2026 00:29:11 +0100 (CET) Date: Tue, 10 Nov 2026 00:29:11 +0100 From: Sebastian Reichel To: ricardo@pardini.net Cc: Vinod Koul , Neil Armstrong , Manivannan Sadhasivam , Heiko Stuebner , Andrew Powers-Holmes , linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, stable@vger.kernel.org, Yifeng Zhao Subject: Re: [PATCH] phy: rockchip: naneng-combphy: fix RK3588 SATA pipe_con1 register offset Message-ID: References: <20261109-rk3588-combphy-sata2-6g-v1-1-e9135c91de6a@pardini.net> X-Archived-By: MIME-Version: 1.0 In-Reply-To: <20261109-rk3588-combphy-sata2-6g-v1-1-e9135c91de6a@pardini.net> X-Zoho-Virus-Status: 1 X-Zoho-AV-Stamp: zmail-av-0.7.7.1.5.4/291.452.71 X-ZohoMailClient: External X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261109_152925_845144_E4620750 X-CRM114-Status: GOOD ( 33.07 ) X-Spam-Score: -2.1 (--) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: multipart/mixed; boundary="===============1671283668889467542==" Sender: "Linux-rockchip" X-Spam-Status: No, score=-18.9 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI, MENTIONS_GIT_HOSTING,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 --===============1671283668889467542== Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="6roxkdhx6bgac7mu" Content-Disposition: inline --6roxkdhx6bgac7mu Content-Type: text/plain; protected-headers=v1; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Subject: Re: [PATCH] phy: rockchip: naneng-combphy: fix RK3588 SATA pipe_con1 register offset MIME-Version: 1.0 Hi, On Mon, Nov 09, 2026 at 02:12:47AM +0100, Ricardo Pardini via B4 Relay wrot= e: > From: Ricardo Pardini >=20 > On RK3588, the sata2 PHY speed is selected by sata2_phy_spdmode in > PHP_GRF_PHP_CON1[1:0] (offset 0x0004), with sata2_phy_rx_err in bit 2. > rk3588_combphy_grfcfgs has pipe_con1_for_sata at offset 0x0000 though, > so the value 0x2 (6.0 Gb/s, rx_err cleared) ends up in PHP_GRF_PHP_CON0 > and CON1 is never written. >=20 > This leaves sata2 at its 1.5 Gb/s reset value, so the link only trains > at 1.5 Gb/s, even with a 6 Gb/s capable disk and no SControl speed > limit. sata0 and sata1 are not affected: their speed fields are in > PHP_GRF_PHP_CON0 and are set by pipe_con0_for_sata. >=20 > The register layout is described in the RK3588 TRM V1.0 Part1, section > 6.17 "PHP_GRF Register Description". Rockchip fixed this in their BSP > kernel in 2022 by moving pipe_con1_for_sata to offset 0x0004. Drop the last sentence. It's not relevant for somebody checking the git log in a year or two. > Tested with an mSATA SSD on sata2 (combphy2_psu). Before: >=20 > ata2: SATA link up 1.5 Gbps (SStatus 113 SControl 300) > Timing O_DIRECT disk reads: 374 MB in 3.01 seconds =3D 124.45 MB/sec >=20 > After: >=20 > ata2: SATA link up 6.0 Gbps (SStatus 133 SControl 300) > Timing O_DIRECT disk reads: 1266 MB in 3.00 seconds =3D 421.78 MB/sec >=20 > Fixes: a03c44277253 ("phy: rockchip: Add naneng combo phy support for RK3= 588") > Cc: stable@vger.kernel.org > Link: https://github.com/rockchip-linux/kernel/commit/2f5fe2c0bbd4fa95102= aadd60da1100989103aa0 > Cc: Yifeng Zhao > Signed-off-by: Ricardo Pardini > --- The patch is 1:1 from Yifeng Zhao with a better commit message. You should keep him as the patch author with his Signed-off-by followed by your Signed-off-by. Feel free to also add my R-b tag. E.g. like this: > ... (the commit message) >=20 > Fixes: a03c44277253 ("phy: rockchip: Add naneng combo phy support for RK3= 588") > Cc: stable@vger.kernel.org > Signed-off-by: Yifeng Zhao > [add proper commit message] > Signed-off-by: Ricardo Pardini Otherwise: Reviewed-by: Sebastian Reichel > This fixes the pipe_con1 GRF offset for SATA in the RK3588 combphy > table, so sata2 links train at 6 Gb/s instead of being stuck at > 1.5 Gb/s. >=20 > I found it when an mSATA SSD on sata2 would only link at 1.5 Gb/s, > and traced it to Rockchip's BSP kernel, which fixed the same offset in > 2022 in a commit titled "config sata2 rate to 6G for rk3588" (linked > in the patch). The RK3588 TRM V1.0 Part1 (section 6.17) agrees: > sata2_phy_spdmode is in PHP_GRF_PHP_CON1, while the sata0/sata1 speed > fields are in PHP_GRF_PHP_CON0 and already set correctly. > > The misplaced write lands in PHP_GRF_PHP_CON0[2:0], which are the PCIe > link reset grant bits, and turns on the one for pcie3x2 whenever a > combphy is put in SATA mode. I don't know of any effect from that, but > this patch stops it too. You can add the info about this writing the PCIe link reset grant bits for pcie3x2 to the commit message and drop the previous three paragraphs from below the fold that are basically repeating the info =66rom the commit message. Greetings, -- Sebastian > Only sata2 was tested. U-Boot has the same table and the same problem; > a fix is being sent there separately. > --- > drivers/phy/rockchip/phy-rockchip-naneng-combphy.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) >=20 > diff --git a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c b/drivers= /phy/rockchip/phy-rockchip-naneng-combphy.c > index 3102a99128f6..c469222dba8b 100644 > --- a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c > +++ b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c > @@ -1395,7 +1395,7 @@ static const struct rockchip_combphy_grfcfg rk3588_= combphy_grfcfgs =3D { > .con3_for_sata =3D { 0x000c, 15, 0, 0x00, 0x0407 }, > /* pipe-grf */ > .pipe_con0_for_sata =3D { 0x0000, 11, 5, 0x00, 0x22 }, > - .pipe_con1_for_sata =3D { 0x0000, 2, 0, 0x00, 0x2 }, > + .pipe_con1_for_sata =3D { 0x0004, 2, 0, 0x00, 0x2 }, > .pipe_pcie1l0_sel =3D { 0x0100, 0, 0, 0x01, 0x0 }, > .pipe_pcie1l1_sel =3D { 0x0100, 1, 1, 0x01, 0x0 }, > }; >=20 > --- > base-commit: 6628e7d4c6b25c8d18f1345e3a20d21829aae7e4 > change-id: 20261024-rk3588-combphy-sata2-6g-03bb30151552 >=20 > Best regards, > -- =20 > Ricardo Pardini >=20 >=20 >=20 --6roxkdhx6bgac7mu Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEE72YNB0Y/i3JqeVQT2O7X88g7+poFAmryV0MACgkQ2O7X88g7 +pr2OhAAmxrt9iWQqsLZ88EeVj0HWviV+7WVM8l74gh7cXl2x4t1sM/LeqbmRjzi d//J3Wd59neQxBNR4R0iKVhn6OGSmFUnnYJsh8y7lDNkrIxiYuLWoiA+ibdnwvrg XvTpfaKuPuRCZ+BD7I5ibL3QCiNjxhr/4ZPk01GlG2jdAfV5qlsOb1kecyXHHWOy qJ3NIPD++XrsvgE6nyjvYQv4hTuZgvf/Rj0nDC4IgRVG6ysqaIAcisPGFxX3HvnN 4d5hkLciRnBxU7JFWWqG+EsY7sR4xKQtPSbzVmw8u1pcWVTDDUqOMRiHcRvGsELf DLWspqOSOfUG9t6GKRWTB92lYUxGMJWGRLQTd7SjT3YoQUoGZHLmaVz+l54XoDmR w9zw4smrTd0RN4ckh4GkSgKKHTeTYYWIDUuYEXDfjFZcFUlGAEV2hAxutSvUhjTM FqqJ6cytW2wx2BBf4bXKYHnHj1PD4a9GOh+WZniZhxbDZ/P7cDLjKhIsOIUtrLhM 58iB1LN6GhOWyoX59uacdaS0sKLv0+0ktoaqhlzQc+b+cUH/wvMSB6EA18l7fuG1 oPJRUaxjae41lSiiB9/vldvadH94Hs14OeKB+pWtGRrehN5/BydrVY9MbGI7BwiC jxBGSOsZNZ+XcMi50/eN1ZJOQP3DhWKvJir0MxrvoPGDH0y+3lY= =sZwb -----END PGP SIGNATURE----- --6roxkdhx6bgac7mu-- --===============1671283668889467542== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Linux-rockchip mailing list Linux-rockchip@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-rockchip --===============1671283668889467542==--