From: Quentin Schulz <quentin.schulz@cherry.de>
To: Heiko Stuebner <heiko@sntech.de>
Cc: linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org,
Heiko Stuebner <heiko.stuebner@cherry.de>
Subject: Re: [PATCH 3/3] arm64: dts: rockchip: add pinctrl for clk-generator GPIO on rk3588-tiger
Date: Thu, 5 Feb 2026 17:49:15 +0100 [thread overview]
Message-ID: <c8816ada-bb46-4c15-a3a8-a06dac5acdbd@cherry.de> (raw)
In-Reply-To: <20260205102104.394991-4-heiko@sntech.de>
Hi Heiko,
On 2/5/26 11:21 AM, Heiko Stuebner wrote:
> From: Heiko Stuebner <heiko.stuebner@cherry.de>
>
> While specific driver in the Linux-Kernel handles GPIOs gracefully without
> matching pinctrl entries, this might not be true for other operating
> systems. So having pinctrl entries makes the hardware-description
> more complete.
>
> The somewhat similar rk3588-jaguar board has a pinctrl entry already,
> so also add one for rk3588-tiger.
>
> Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
> ---
> arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi
> index 259fb125e13f..91057b166690 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi
> @@ -58,6 +58,8 @@ pcie_refclk: pcie-clock-generator {
> clock-frequency = <100000000>;
> clock-output-names = "pcie3_refclk";
> enable-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>; /* PCIE30X4_CLKREQN_M1_L */
> + pinctrl-names = "default";
> + pinctrl-0 = <&pcie30x4_clkreqn_m1_l>;
> vdd-supply = <&vcca_3v3_s0>;
> };
>
> @@ -357,6 +359,12 @@ module_led_pin: module-led-pin {
> };
> };
>
> + pcie30x4 {
> + pcie30x4_clkreqn_m1_l: pcie30x4-clkreqn-m1-l {
> + rockchip,pins = <4 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
So this is interesting because it made me double-check the schematics
and I think we did a mistake on Jaguar.
This one here is fine as this SoC pin is connected to the PDn pin of the
IC which has an internal Pull-Up, so the state is defined.
However, on Jaguar this signal controls a transistor and there's no
external Pull-Up or Pull-Down between the SoC and the transistor gate so
we probably should not have pull_none for the pinconf. The default reset
state of this pin in Pull-Up so maybe we should go with that such that
there's no difference between the reset default and the time between
application of the pinconf by the core and asserting of the pin by the
driver. What do you think?
As for Tiger, this is fine, so:
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Thanks!
Quentin
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next prev parent reply other threads:[~2026-02-05 16:51 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-05 10:21 [PATCH 0/3] Move to gated-fixed-clock for Theobroma/Cherry boards Heiko Stuebner
2026-02-05 10:21 ` [PATCH 1/3] arm64: dts: rockchip: use gated-fixed-clock for pcie-refclk on rk3588-jaguar Heiko Stuebner
2026-02-05 15:58 ` Quentin Schulz
2026-02-05 10:21 ` [PATCH 2/3] arm64: dts: rockchip: use gated-fixed-clock for pcie-refclk on rk3588-tiger Heiko Stuebner
2026-02-05 10:21 ` [PATCH 3/3] arm64: dts: rockchip: add pinctrl for clk-generator GPIO " Heiko Stuebner
2026-02-05 16:49 ` Quentin Schulz [this message]
2026-02-09 16:27 ` Heiko Stübner
2026-02-09 17:12 ` Quentin Schulz
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