Re: [PATCH 2/2] arm64: dts: rockchip: Add ArmSoM CM5 and CM5-IO

["Jiaxing Hu" <gahing@gahingwoo.com>]

(Replying from my own domain; v1 went out as huhuvmb88@gmail.com. Same
person, I will use this address from v2 on.)

Thanks. Most of this is valid, v2 coming. I ran dtbs_check too; it agrees
and finds more.

> [High] Type-C DP Altmode configuration errors (SVID format, missing
> mode-switch, and misplaced SVID)

Correct, and worse. dtbs_check rejects the node: the altmodes child must be
named "displayport", not altmode@0 with a reg, and svid must be /bits/ 16.
The svid I put on &usbdp_phy is not in that binding at all (it has
additionalProperties: false), and mode-switch is missing.

> [High] Wireless (SYN43752 WiFi/BT) missing child nodes and unreferenced
> pinctrls
> [Low] The gmac0_rst pinctrl is defined but omitted from &gmac0

Correct. bt_reg_on, wifi_host_wake_irq and gmac0_rst are all unreferenced.
I will drop them rather than guess at wifi/bt child nodes, and drop the
WiFi/BT claim from the commit message.

> [Medium] ES8388 audio is advertised in the commit message but
> functionally missing

Correct. The node is disabled and its compatible is wrong too (the binding
wants everest,es8328). Dropping the node and the claim.

> [Medium] Missing vmmc-supply and vqmmc-supply for the eMMC

This one I do not think holds. Every rk3576 board upstream (sige5,
evb1/evb2, roc-pc, nanopi-r76s, dshanpi-a1) uses full-pwr-cycle-in-suspend
without supplies, and dtbs_check does not flag it.

Not in the report, but also fixed in v2: the fusb302 port node is not
allowed by its binding (the role-switch endpoint belongs in the
connector's ports), and the wifi-poweren-gpio pinctrl node name collides
with gpio-consumer.

Also the PHY reset. I had it as snps,reset-gpios, which is both misspelled
(the schema property is singular) and deprecated. v2 describes it on the
MDIO bus instead:

	&mdio0 {
		reset-gpios = <&gpio2 RK_PB3 GPIO_ACTIVE_LOW>;
		reset-delay-us = <20000>;
		reset-post-delay-us = <100000>;
		rgmii_phy0: phy@1 { ... };
	};

That is the only spelling that works here. __mdiobus_register() releases a
bus level reset before mdiobus_scan_bus_c22(), whereas a per-PHY
reset-gpios is applied by phylib only after the PHY has been found, which
never happens for a PHY that boots held in reset. Checked all three on
hardware: per-PHY reset leaves the PHY dark, the bus level reset brings it
up and the link comes up at 1000 Mbit/s.

dtbs_check is clean on v2, with no deprecated properties left.

Jiaxing



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