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Tue, 14 Feb 2023 17:39:44 -0800 (PST) Received: from [10.225.163.116] (unknown [10.225.163.116]) by usg-ed-osssrv.wdc.com (Postfix) with ESMTPSA id 4PGgjn1BCDz1RvLy; Tue, 14 Feb 2023 17:39:40 -0800 (PST) Message-ID: Date: Wed, 15 Feb 2023 10:39:39 +0900 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.7.1 Subject: Re: [PATCH v2 9/9] PCI: rockchip: Add parameter check for RK3399 PCIe endpoint core set_msi() Content-Language: en-US To: Rick Wertenbroek , alberto.dassatti@heig-vd.ch Cc: xxm@rock-chips.com, rick.wertenbroek@heig-vd.ch, Rob Herring , Krzysztof Kozlowski , Heiko Stuebner , Shawn Lin , Lorenzo Pieralisi , =?UTF-8?Q?Krzysztof_Wilczy=c5=84ski?= , Bjorn Helgaas , Jani Nikula , Greg Kroah-Hartman , Rodrigo Vivi , Mikko Kovanen , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org References: <20230214140858.1133292-1-rick.wertenbroek@gmail.com> <20230214140858.1133292-10-rick.wertenbroek@gmail.com> From: Damien Le Moal Organization: Western Digital Research In-Reply-To: <20230214140858.1133292-10-rick.wertenbroek@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230214_173950_678232_BBEC5CD1 X-CRM114-Status: GOOD ( 25.29 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org On 2/14/23 23:08, Rick Wertenbroek wrote: > The RK3399 PCIe endpoint core supports only a single PCIe physcial > function (function number 0), therefore return -EINVAL if set_msi() is > called with a function number greater than 0. > The PCIe standard only allows the multi message capability (MMC) value > to be up to 0x5 (32 messages), therefore return -EINVAL if set_msi() is > called with a MMC value of over 0x5. > > Signed-off-by: Rick Wertenbroek > --- > drivers/pci/controller/pcie-rockchip-ep.c | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/drivers/pci/controller/pcie-rockchip-ep.c b/drivers/pci/controller/pcie-rockchip-ep.c > index b7865a94e..80634b690 100644 > --- a/drivers/pci/controller/pcie-rockchip-ep.c > +++ b/drivers/pci/controller/pcie-rockchip-ep.c > @@ -294,6 +294,16 @@ static int rockchip_pcie_ep_set_msi(struct pci_epc *epc, u8 fn, u8 vfn, > struct rockchip_pcie *rockchip = &ep->rockchip; > u32 flags; > > + if (fn) { > + dev_err(&epc->dev, "This endpoint controller only supports a single physical function\n"); > + return -EINVAL; > + } Checking this here is late... Given that at most only one physical function is supported, the check should be in rockchip_pcie_parse_ep_dt(). Something like: err = of_property_read_u8(dev->of_node, "max-functions", &ep->epc->max_functions); if (err < 0 || ep->epc->max_functions > 1) ep->epc->max_functions = 1; And all the macros with the (fn) argument could also be simplified (argument fn removed) since fn will always be 0. > + > + if (mmc > 0x5) { > + dev_err(&epc->dev, "Number of MSI IRQs cannot be more than 32\n"); Long line. Please split it after the comma. > + return -EINVAL; > + } > + > flags = rockchip_pcie_read(rockchip, > ROCKCHIP_PCIE_EP_FUNC_BASE(fn) + > ROCKCHIP_PCIE_EP_MSI_CTRL_REG); Another nice cleanup: define ROCKCHIP_PCIE_EP_MSI_CTRL_REG to include the ROCKCHIP_PCIE_EP_FUNC_BASE(fn) addition so that we do not have to do it here all the time. -- Damien Le Moal Western Digital Research _______________________________________________ Linux-rockchip mailing list Linux-rockchip@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-rockchip