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[83.97.153.254]) by smtp.gmail.com with ESMTPSA id p13-20020a05600c468d00b0040eaebc4e8fsm8120643wmo.1.2024.01.27.01.48.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 27 Jan 2024 01:48:11 -0800 (PST) Message-ID: Subject: Re: [PATCH 3/3] spi: spi-rockchip: Fix unused chip select line when using gpio cs From: Luis de Arquer To: linux-spi@vger.kernel.org, linux-rockchip@lists.infradead.org Cc: broonie@kernel.org, heiko@sntech.de, linux-arm-kernel@lists.infradead.org, Robin Murphy , luis.dearquer@inertim.com Date: Sat, 27 Jan 2024 10:48:00 +0100 In-Reply-To: References: User-Agent: Evolution 3.44.4-0ubuntu2 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240127_014814_794942_65C89A46 X-CRM114-Status: UNSURE ( 6.99 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org On Fri, 2024-01-26 at 20:47 +0100, Luis de Arquer wrote: > This change allows the DT to use native c1 for a device while leaving > native cs0 reserved for allowing gpio cs operation > Actually, I think this comment is the other way around -reserve cs1 and use cs0 for device. Before, it was using cs0 for gpio operation always. > > - ROCKCHIP_SPI_SET_BITS(rs->regs + ROCKCHIP_SPI_SER, 1); > + ROCKCHIP_SPI_SET_BITS(rs->regs + ROCKCHIP_SPI_SER, ctlr->unused_native_cs); s/ctlr->unused_native_cs/BIT(ctlr->unused_native_cs)/ I mixed up cs numbers and bitmask, sorry. I'll fix for v2 Luis _______________________________________________ Linux-rockchip mailing list Linux-rockchip@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-rockchip