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Tue, 8 Jul 2025 05:03:25 +0000 (GMT) From: "Devang Tailor" To: "'Krzysztof Kozlowski'" , , , , , , , , , , , In-Reply-To: <3c794a74-30d6-4a16-8bdb-4345b3b5e453@kernel.org> Subject: RE: [PATCH 2/3] rtc: s3c: support for exynosautov9 on-chip RTC Date: Tue, 8 Jul 2025 10:33:24 +0530 Message-ID: <156b01dbefc5$a3a29aa0$eae7cfe0$@samsung.com> Precedence: bulk X-Mailing-List: linux-rtc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Mailer: Microsoft Outlook 16.0 Thread-Index: AQHhFGtl4NDuGuGnv9eMR4cSGFTkLQJ+nj8RASbVNToBv3LqZbPyOoLA Content-Language: en-in X-CMS-MailID: 20250708050327epcas5p3fe6bf00544af5113930cb1fe0378823a X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" X-Sendblock-Type: REQ_APPROVE CMS-TYPE: 105P cpgsPolicy: CPGSC10-542,Y X-CFilter-Loop: Reflected X-CMS-RootMailID: 20250702051532epcas5p381e97531e4df64f556e8aba86c5532d9 References: <20250702052426.2404256-1-dev.tailor@samsung.com> <20250702052426.2404256-3-dev.tailor@samsung.com> <3c794a74-30d6-4a16-8bdb-4345b3b5e453@kernel.org> Hi Krzysztof, > -----Original Message----- > From: Krzysztof Kozlowski > Sent: 07 July 2025 14:54 > To: Devang Tailor ; > alexandre.belloni=40bootlin.com; robh=40kernel.org; krzk+dt=40kernel.org; > conor+dt=40kernel.org; alim.akhtar=40samsung.com; linux-rtc=40vger.kernel= .org; > devicetree=40vger.kernel.org; linux-kernel=40vger.kernel.org; inux-arm- > kernel=40lists.infradead.org; linux-samsung-soc=40vger.kernel.org; > faraz.ata=40samsung.com > Subject: Re: =5BPATCH 2/3=5D rtc: s3c: support for exynosautov9 on-chip R= TC >=20 > On 02/07/2025 07:24, Devang Tailor wrote: > > The on-chip RTC of this SoC is almost similar to the previous versions > > of SoC. Hence re-use the existing driver with platform specific change > > to enable RTC. > > > > This has been tested with 'hwclock' & 'date' utilities > > > > Signed-off-by: Devang Tailor > > --- > > drivers/rtc/rtc-s3c.c =7C 26 ++++++++++++++++++++++++++ > > drivers/rtc/rtc-s3c.h =7C 4 ++++ > > 2 files changed, 30 insertions(+) > > > > diff --git a/drivers/rtc/rtc-s3c.c b/drivers/rtc/rtc-s3c.c index > > 5dd575865adf..00686aa805f2 100644 > > --- a/drivers/rtc/rtc-s3c.c > > +++ b/drivers/rtc/rtc-s3c.c > > =40=40 -384,6 +384,23 =40=40 static void s3c6410_rtc_disable(struct s3c= _rtc > *info) > > writew(con, info->base + S3C2410_RTCCON); =7D > > > > +static void exynosautov9_rtc_disable(struct s3c_rtc *info) =7B > > + unsigned int con; > > + > > + con =3D readb(info->base + S3C2410_RTCCON); > > + con &=3D =7ES3C2410_RTCCON_RTCEN; > > + writeb(con, info->base + S3C2410_RTCCON); > > + > > + con =3D readb(info->base + EXYNOSAUTOV9_TICCON0); > > + con &=3D =7EEXYNOSAUTOV9_TICCON_TICEN; > > + writeb(con, info->base + EXYNOSAUTOV9_TICCON0); > > + > > + con =3D readb(info->base + EXYNOSAUTOV9_TICCON1); > > + con &=3D =7EEXYNOSAUTOV9_TICCON_TICEN; > > + writeb(con, info->base + EXYNOSAUTOV9_TICCON1); >=20 > You clear these bits during disable, but why aren't they set during enabl= e? > Why is this asymmetric? This should be clearly explained, but both commit > msg and code is completely silent. OK. I will correct in V2 patch >=20 > > +=7D > > + > > static void s3c_rtc_remove(struct platform_device *pdev) =7B > > struct s3c_rtc *info =3D platform_get_drvdata(pdev); =40=40 -574,6 +5= 91,12 > > =40=40 static struct s3c_rtc_data const s3c6410_rtc_data =3D =7B > > .disable =3D s3c6410_rtc_disable, > > =7D; > > > > +static struct s3c_rtc_data const exynosautov9_rtc_data =3D =7B >=20 > Please put const after static. I tried to keep it similar to the existing format, I will correct it in V2 = patch. >=20 >=20 >=20 > Best regards, > Krzysztof