[rtc-linux] [PATCH] rtc: ds1307: ensure that any pending alarm is cleared before a new alarm is enabled

[Nicolas Boullis <nboullis@debian.org>]

If a previously-set alarm was disabled and then triggered, it may still=20
be pending when a new alarm is configured.

Then, if the alarm is enabled before the pending alarm is cleared, then=20
an interrupt is immediately raised.

Unfortunately, when the alarm is cleared and enabled during the same I=C2=
=B2C=20
block write, the chip (at least the DS1339 I have) considers that the=20
alarm is enabled before it is cleared, and raises an interrupt.

This patch ensures that the pending alarm is cleared before the alarm is=20
enabled.

Signed-off-by: Nicolas Boullis <nboullis@debian.org>

---

This solves the same problem my =E2=80=9Crtc: ds1307: clear the interrupts =
on=20
probe=E2=80=9D patch was meant to solve, but I think in a better way since =
the=20
alarm may be triggered after power-on.

diff --git a/drivers/rtc/rtc-ds1307.c b/drivers/rtc/rtc-ds1307.c
index b2156ee..cceac0f 100644
--- a/drivers/rtc/rtc-ds1307.c
+++ b/drivers/rtc/rtc-ds1307.c
@@ -538,12 +542,8 @@ static int ds1337_set_alarm(struct device *dev, struct=
 rtc_wkalrm *t)
 	buf[5] =3D 0;
 	buf[6] =3D 0;
=20
-	/* optionally enable ALARM1 */
+	/* disable alarms */
 	buf[7] =3D control & ~(DS1337_BIT_A1IE | DS1337_BIT_A2IE);
-	if (t->enabled) {
-		dev_dbg(dev, "alarm IRQ armed\n");
-		buf[7] |=3D DS1337_BIT_A1IE;	/* only ALARM1 is used */
-	}
 	buf[8] =3D status & ~(DS1337_BIT_A1I | DS1337_BIT_A2I);
=20
 	ret =3D ds1307->write_block_data(client,
@@ -553,6 +553,13 @@ static int ds1337_set_alarm(struct device *dev, struct=
 rtc_wkalrm *t)
 		return ret;
 	}
=20
+	/* optionally enable ALARM1 */
+	if (t->enabled) {
+		dev_dbg(dev, "alarm IRQ armed\n");
+		buf[7] |=3D DS1337_BIT_A1IE;	/* only ALARM1 is used */
+		i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, buf[7]);
+	}
+
 	return 0;
 }
=20

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