Re: [PATCH v5 1/4] dt-bindings: rtc: add schema for NXP S32G2/S32G3 SoCs

[Rob Herring <robh@kernel.org>]

On Tue, Nov 26, 2024 at 01:49:37PM +0200, Ciprian Costea wrote:
> From: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
> 
> RTC tracks clock time during system suspend and it is used as a wakeup
> source on S32G2/S32G3 architecture.
> 
> RTC from S32G2/S32G3 is not battery-powered and it is not kept alive
> during system reset.
> 
> Co-developed-by: Bogdan-Gabriel Roman <bogdan-gabriel.roman@nxp.com>
> Signed-off-by: Bogdan-Gabriel Roman <bogdan-gabriel.roman@nxp.com>
> Co-developed-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
> Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
> Signed-off-by: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
> ---
>  .../devicetree/bindings/rtc/nxp,s32g-rtc.yaml | 69 +++++++++++++++++++
>  1 file changed, 69 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/rtc/nxp,s32g-rtc.yaml
> 
> diff --git a/Documentation/devicetree/bindings/rtc/nxp,s32g-rtc.yaml b/Documentation/devicetree/bindings/rtc/nxp,s32g-rtc.yaml
> new file mode 100644
> index 000000000000..89414a0d926c
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/rtc/nxp,s32g-rtc.yaml
> @@ -0,0 +1,69 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/rtc/nxp,s32g-rtc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: NXP S32G2/S32G3 Real Time Clock (RTC)
> +
> +maintainers:
> +  - Bogdan Hamciuc <bogdan.hamciuc@nxp.com>
> +  - Ciprian Marian Costea <ciprianmarian.costea@nxp.com>
> +
> +description:
> +  RTC hardware module present on S32G2/S32G3 SoCs is used as a wakeup source.
> +  It is not kept alive during system reset and it is not battery-powered.
> +
> +properties:
> +  compatible:
> +    oneOf:
> +      - enum:
> +          - nxp,s32g2-rtc
> +      - items:
> +          - const: nxp,s32g3-rtc
> +          - const: nxp,s32g2-rtc
> +
> +  reg:
> +    maxItems: 1
> +
> +  interrupts:
> +    maxItems: 1
> +
> +  clocks:
> +    items:
> +      - description: ipg clock drives the access to the RTC iomapped registers
> +      - description: Clock source for the RTC module. Can be selected between
> +          4 different clock sources using an integrated hardware mux.
> +          On S32G2/S32G3 SoCs, 'source0' is the SIRC clock (~32KHz) and it is
> +          available during standby and runtime. 'source1' is reserved and cannot
> +          be used. 'source2' is the FIRC clock and it is only available during
> +          runtime providing a better resolution (~48MHz). 'source3' is an external
> +          RTC clock source which can be additionally added in hardware.

Is switching the clock source at run-time possible? For example, use the 
48MHz at runtime and switch to 32kHz or external clock during suspend. 
If so, you need to list all possible clock sources. Really, you probably 
should no matter what as you need to describe what's in the h/w, not 
configuration (though configuration is okay when it's fixed for the 
device).

> +
> +  clock-names:
> +    items:
> +      - const: ipg
> +      - enum: [ source0, source1, source2, source3 ]

You can do:

maxItems: 5
items:
  - const: ipg
additionalItems:
  pattern: '^source[0-4]$'

Though I will have to relax constraints on 'additionalItems' to avoid a 
warning.

Rob