[PATCH v3 0/6] rtc: zynqmp: fixes for read and set offset

[PATCH v3 0/6] rtc: zynqmp: fixes for read and set offset

[Tomas Melin]

Add improvements for read and set offset functions.
The basic functionality is still the same, but offset correction values
are now updated to match with expected.

The RTC calibration value operates with full ticks,
and fractional ticks which are a 1/16 of a full tick.
The 16 lowest bits in the calibration registers are for the full ticks
and value matches the external oscillator in Hz. Through that,
the maximum and minimum offset values can be calculated dynamically,
as they depend on the input frequency used.

For docs on the calibration register, see
https://docs.amd.com/r/en-US/ug1087-zynq-ultrascale-registers/CALIB_READ-RTC-Register

Due to rounding errors (different number of fract ticks),
offset readback will differ slightly depending on
if the offset is negative or positive. This is however well below the granularity
provided by the hardware.

For example
$ echo 34335 > offset 
$ cat offset 
34335
$ echo -34335 > offset 
$ cat offset 
-34326

Signed-off-by: Tomas Melin <tomas.melin@vaisala.com>
---
Changes in v3:
- Add commit for limiting building of driver to zynqmp arch.
- Reorder variable declarations in set_offset
- Link to v2: https://lore.kernel.org/r/20260108-zynqmp-rtc-updates-v2-0-864c161fa83d@vaisala.com

Changes in v2:
- Add commit introducing check for calibration value overflow
- Update comments
- Align data types across set and read
- Rename fract_tick as fract_data conforming to data sheet
- Further improve on set offset calculation logic
- Link to v1: https://lore.kernel.org/r/20251201-zynqmp-rtc-updates-v1-0-33875c1e385b@vaisala.com

---
Tomas Melin (6):
      rtc: zynqmp: declare dependency on arch
      rtc: zynqmp: correct frequency value
      rtc: zynqmp: check calibration max value
      rtc: zynqmp: rework read_offset
      rtc: zynqmp: rework set_offset
      rtc: zynqmp: use dynamic max and min offset ranges

 drivers/rtc/Kconfig      |  2 +-
 drivers/rtc/rtc-zynqmp.c | 74 ++++++++++++++++++++++++++----------------------
 2 files changed, 41 insertions(+), 35 deletions(-)
---
base-commit: cd635e33b0113287c94021be53d2a7c61a1614e9
change-id: 20251201-zynqmp-rtc-updates-d260364cc01b

Best regards,
-- 
Tomas Melin <tomas.melin@vaisala.com>

[PATCH v3 1/6] rtc: zynqmp: declare dependency on arch

[Tomas Melin]

Driver is compatible with RTC controller found on zynqmp.
Configure dependency to enable building only when zynqmp architecture
is enabled.

Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Tomas Melin <tomas.melin@vaisala.com>
---
 drivers/rtc/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index 2933c41c77c88e60df721fe65b9c8afb995ae51e..46b497524cbfb5d0c1662dcaddbb6d28b4ae2abe 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -1376,7 +1376,7 @@ config RTC_DRV_OPTEE
 
 config RTC_DRV_ZYNQMP
 	tristate "Xilinx Zynq Ultrascale+ MPSoC RTC"
-	depends on OF && HAS_IOMEM
+	depends on OF && HAS_IOMEM && ARCH_ZYNQMP
 	help
 	  If you say yes here you get support for the RTC controller found on
 	  Xilinx Zynq Ultrascale+ MPSoC.

-- 
2.47.3

[PATCH v3 2/6] rtc: zynqmp: correct frequency value

[Tomas Melin]

Fix calibration value in case a clock reference is provided.
The actual calibration value written into register is
frequency - 1.

Reviewed-by: Harini T <harini.t@amd.com>
Tested-by: Harini T <harini.t@amd.com>
Signed-off-by: Tomas Melin <tomas.melin@vaisala.com>
---
 drivers/rtc/rtc-zynqmp.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/rtc/rtc-zynqmp.c b/drivers/rtc/rtc-zynqmp.c
index 3baa2b481d9f2008750046005283b98a0d546c5c..856bc1678e7d31144f320ae9f75fc58c742a2a64 100644
--- a/drivers/rtc/rtc-zynqmp.c
+++ b/drivers/rtc/rtc-zynqmp.c
@@ -345,7 +345,10 @@ static int xlnx_rtc_probe(struct platform_device *pdev)
 					   &xrtcdev->freq);
 		if (ret)
 			xrtcdev->freq = RTC_CALIB_DEF;
+	} else {
+		xrtcdev->freq--;
 	}
+
 	ret = readl(xrtcdev->reg_base + RTC_CALIB_RD);
 	if (!ret)
 		writel(xrtcdev->freq, (xrtcdev->reg_base + RTC_CALIB_WR));

-- 
2.47.3

[PATCH v3 3/6] rtc: zynqmp: check calibration max value

[Tomas Melin]

Enable check to not overflow the calibration
max value.

Reviewed-by: Harini T <harini.t@amd.com>
Tested-by: Harini T <harini.t@amd.com>
Signed-off-by: Tomas Melin <tomas.melin@vaisala.com>
---
 drivers/rtc/rtc-zynqmp.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/rtc/rtc-zynqmp.c b/drivers/rtc/rtc-zynqmp.c
index 856bc1678e7d31144f320ae9f75fc58c742a2a64..caacce3725e2ef3803ea42d40e77ceaeb7d7b914 100644
--- a/drivers/rtc/rtc-zynqmp.c
+++ b/drivers/rtc/rtc-zynqmp.c
@@ -349,6 +349,11 @@ static int xlnx_rtc_probe(struct platform_device *pdev)
 		xrtcdev->freq--;
 	}
 
+	if (xrtcdev->freq > RTC_TICK_MASK) {
+		dev_err(&pdev->dev, "Invalid RTC calibration value\n");
+		return -EINVAL;
+	}
+
 	ret = readl(xrtcdev->reg_base + RTC_CALIB_RD);
 	if (!ret)
 		writel(xrtcdev->freq, (xrtcdev->reg_base + RTC_CALIB_WR));

-- 
2.47.3

[PATCH v3 4/6] rtc: zynqmp: rework read_offset

[Tomas Melin]

read_offset() was using static frequency for determining
the tick offset. It was also using remainder from do_div()
operation as tick_mult value which caused the offset to be
incorrect.

At the same time, rework function to improve readability.
It is worth noting, that due to rounding errors, the offset
readback will differ slightly for positive and negative
calibration values.

Reviewed-by: Harini T <harini.t@amd.com>
Tested-by: Harini T <harini.t@amd.com>
Signed-off-by: Tomas Melin <tomas.melin@vaisala.com>
---
 drivers/rtc/rtc-zynqmp.c | 25 ++++++++++++++++---------
 1 file changed, 16 insertions(+), 9 deletions(-)

diff --git a/drivers/rtc/rtc-zynqmp.c b/drivers/rtc/rtc-zynqmp.c
index caacce3725e2ef3803ea42d40e77ceaeb7d7b914..6740c3aed1897d4b50a02c4823a746d9c2ae2655 100644
--- a/drivers/rtc/rtc-zynqmp.c
+++ b/drivers/rtc/rtc-zynqmp.c
@@ -178,21 +178,28 @@ static void xlnx_init_rtc(struct xlnx_rtc_dev *xrtcdev)
 static int xlnx_rtc_read_offset(struct device *dev, long *offset)
 {
 	struct xlnx_rtc_dev *xrtcdev = dev_get_drvdata(dev);
-	unsigned long long rtc_ppb = RTC_PPB;
-	unsigned int tick_mult = do_div(rtc_ppb, xrtcdev->freq);
-	unsigned int calibval;
+	unsigned int calibval, fract_data, fract_part;
+	int freq = xrtcdev->freq;
+	int max_tick, tick_mult;
 	long offset_val;
 
+	/* Tick to offset multiplier */
+	tick_mult = DIV_ROUND_CLOSEST(RTC_PPB, freq);
+
 	calibval = readl(xrtcdev->reg_base + RTC_CALIB_RD);
 	/* Offset with seconds ticks */
-	offset_val = calibval & RTC_TICK_MASK;
-	offset_val = offset_val - RTC_CALIB_DEF;
-	offset_val = offset_val * tick_mult;
+	max_tick = calibval & RTC_TICK_MASK;
+	offset_val = max_tick - freq;
+	/* Convert to ppb */
+	offset_val *= tick_mult;
 
 	/* Offset with fractional ticks */
-	if (calibval & RTC_FR_EN)
-		offset_val += ((calibval & RTC_FR_MASK) >> RTC_FR_DATSHIFT)
-			* (tick_mult / RTC_FR_MAX_TICKS);
+	if (calibval & RTC_FR_EN) {
+		fract_data = (calibval & RTC_FR_MASK) >> RTC_FR_DATSHIFT;
+		fract_part = DIV_ROUND_UP(tick_mult, RTC_FR_MAX_TICKS);
+		offset_val += (fract_part * fract_data);
+	}
+
 	*offset = offset_val;
 
 	return 0;

-- 
2.47.3

[PATCH v3 5/6] rtc: zynqmp: rework set_offset

[Tomas Melin]

set_offset was using remainder of do_div as tick_mult which resulted in
wrong offset. Calibration value also assumed builtin calibration default.
Update fract_offset to correctly calculate the value for
negative offset and replace the for loop with division.

Tested-by: Harini T <harini.t@amd.com>
Signed-off-by: Tomas Melin <tomas.melin@vaisala.com>
---
 drivers/rtc/rtc-zynqmp.c | 33 +++++++++++++--------------------
 1 file changed, 13 insertions(+), 20 deletions(-)

diff --git a/drivers/rtc/rtc-zynqmp.c b/drivers/rtc/rtc-zynqmp.c
index 6740c3aed1897d4b50a02c4823a746d9c2ae2655..1bc957b3a9058aa1d809696c13662ecef0437a92 100644
--- a/drivers/rtc/rtc-zynqmp.c
+++ b/drivers/rtc/rtc-zynqmp.c
@@ -208,13 +208,13 @@ static int xlnx_rtc_read_offset(struct device *dev, long *offset)
 static int xlnx_rtc_set_offset(struct device *dev, long offset)
 {
 	struct xlnx_rtc_dev *xrtcdev = dev_get_drvdata(dev);
-	unsigned long long rtc_ppb = RTC_PPB;
-	unsigned int tick_mult = do_div(rtc_ppb, xrtcdev->freq);
-	unsigned char fract_tick = 0;
+	int max_tick, tick_mult, fract_offset, fract_part;
+	int freq = xrtcdev->freq;
 	unsigned int calibval;
-	short int  max_tick;
-	int fract_offset;
+	int fract_data = 0;
 
+	/* Tick to offset multiplier */
+	tick_mult = DIV_ROUND_CLOSEST(RTC_PPB, xrtcdev->freq);
 	if (offset < RTC_MIN_OFFSET || offset > RTC_MAX_OFFSET)
 		return -ERANGE;
 
@@ -223,29 +223,22 @@ static int xlnx_rtc_set_offset(struct device *dev, long offset)
 
 	/* Number fractional ticks for given offset */
 	if (fract_offset) {
-		if (fract_offset < 0) {
-			fract_offset = fract_offset + tick_mult;
+		fract_part = DIV_ROUND_UP(tick_mult, RTC_FR_MAX_TICKS);
+		fract_data = fract_offset / fract_part;
+		/* Subtract one from max_tick while adding fract_offset */
+		if (fract_offset < 0 && fract_data) {
 			max_tick--;
-		}
-		if (fract_offset > (tick_mult / RTC_FR_MAX_TICKS)) {
-			for (fract_tick = 1; fract_tick < 16; fract_tick++) {
-				if (fract_offset <=
-				    (fract_tick *
-				     (tick_mult / RTC_FR_MAX_TICKS)))
-					break;
-			}
+			fract_data += RTC_FR_MAX_TICKS;
 		}
 	}
 
 	/* Zynqmp RTC uses second and fractional tick
 	 * counters for compensation
 	 */
-	calibval = max_tick + RTC_CALIB_DEF;
-
-	if (fract_tick)
-		calibval |= RTC_FR_EN;
+	calibval = max_tick + freq;
 
-	calibval |= (fract_tick << RTC_FR_DATSHIFT);
+	if (fract_data)
+		calibval |= (RTC_FR_EN | (fract_data << RTC_FR_DATSHIFT));
 
 	writel(calibval, (xrtcdev->reg_base + RTC_CALIB_WR));
 

-- 
2.47.3

[PATCH v3 6/6] rtc: zynqmp: use dynamic max and min offset ranges

[Tomas Melin]

Maximum and minimum offsets in ppb that can be handled are dependent on
the rtc clock frequency and what can fit in the 16-bit register field.

Reviewed-by: Harini T <harini.t@amd.com>
Tested-by: Harini T <harini.t@amd.com>
Signed-off-by: Tomas Melin <tomas.melin@vaisala.com>
---
 drivers/rtc/rtc-zynqmp.c | 8 +++-----
 1 file changed, 3 insertions(+), 5 deletions(-)

diff --git a/drivers/rtc/rtc-zynqmp.c b/drivers/rtc/rtc-zynqmp.c
index 1bc957b3a9058aa1d809696c13662ecef0437a92..8fc2f838707c32297e812ef1b8a195ff55f849e3 100644
--- a/drivers/rtc/rtc-zynqmp.c
+++ b/drivers/rtc/rtc-zynqmp.c
@@ -44,8 +44,6 @@
 #define RTC_FR_MASK		0xF0000
 #define RTC_FR_MAX_TICKS	16
 #define RTC_PPB			1000000000LL
-#define RTC_MIN_OFFSET		-32768000
-#define RTC_MAX_OFFSET		32767000
 
 struct xlnx_rtc_dev {
 	struct rtc_device	*rtc;
@@ -215,12 +213,12 @@ static int xlnx_rtc_set_offset(struct device *dev, long offset)
 
 	/* Tick to offset multiplier */
 	tick_mult = DIV_ROUND_CLOSEST(RTC_PPB, xrtcdev->freq);
-	if (offset < RTC_MIN_OFFSET || offset > RTC_MAX_OFFSET)
-		return -ERANGE;
-
 	/* Number ticks for given offset */
 	max_tick = div_s64_rem(offset, tick_mult, &fract_offset);
 
+	if (freq + max_tick > RTC_TICK_MASK || (freq + max_tick < 1))
+		return -ERANGE;
+
 	/* Number fractional ticks for given offset */
 	if (fract_offset) {
 		fract_part = DIV_ROUND_UP(tick_mult, RTC_FR_MAX_TICKS);

-- 
2.47.3

Re: [PATCH v3 1/6] rtc: zynqmp: declare dependency on arch

[Michal Simek]

On 1/19/26 10:51, Tomas Melin wrote:
> Driver is compatible with RTC controller found on zynqmp.
> Configure dependency to enable building only when zynqmp architecture
> is enabled.
> 
> Reported-by: kernel test robot <lkp@intel.com>

do you have any link what exactly has been reported?

M

> Signed-off-by: Tomas Melin <tomas.melin@vaisala.com>
> ---
>   drivers/rtc/Kconfig | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
> index 2933c41c77c88e60df721fe65b9c8afb995ae51e..46b497524cbfb5d0c1662dcaddbb6d28b4ae2abe 100644
> --- a/drivers/rtc/Kconfig
> +++ b/drivers/rtc/Kconfig
> @@ -1376,7 +1376,7 @@ config RTC_DRV_OPTEE
>   
>   config RTC_DRV_ZYNQMP
>   	tristate "Xilinx Zynq Ultrascale+ MPSoC RTC"
> -	depends on OF && HAS_IOMEM
> +	depends on OF && HAS_IOMEM && ARCH_ZYNQMP
>   	help
>   	  If you say yes here you get support for the RTC controller found on
>   	  Xilinx Zynq Ultrascale+ MPSoC.
> 

Re: [PATCH v3 1/6] rtc: zynqmp: declare dependency on arch

[Michal Simek]

On 1/19/26 10:51, Tomas Melin wrote:
> Driver is compatible with RTC controller found on zynqmp.
> Configure dependency to enable building only when zynqmp architecture
> is enabled.
> 
> Reported-by: kernel test robot <lkp@intel.com>
> Signed-off-by: Tomas Melin <tomas.melin@vaisala.com>
> ---
>   drivers/rtc/Kconfig | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
> index 2933c41c77c88e60df721fe65b9c8afb995ae51e..46b497524cbfb5d0c1662dcaddbb6d28b4ae2abe 100644
> --- a/drivers/rtc/Kconfig
> +++ b/drivers/rtc/Kconfig
> @@ -1376,7 +1376,7 @@ config RTC_DRV_OPTEE
>   
>   config RTC_DRV_ZYNQMP
>   	tristate "Xilinx Zynq Ultrascale+ MPSoC RTC"
> -	depends on OF && HAS_IOMEM
> +	depends on OF && HAS_IOMEM && ARCH_ZYNQMP


    arm-linux-gnueabi-ld: drivers/rtc/rtc-zynqmp.o: in function 
`xlnx_rtc_read_offset':
 >> rtc-zynqmp.c:(.text.xlnx_rtc_read_offset+0xd0): undefined reference to 
`__aeabi_ldivmod'

You should use macros like div_u64() to fix it instead of have driver enabled 
only for ZynqMP.

M

Re: [PATCH v3 1/6] rtc: zynqmp: declare dependency on arch

[Tomas Melin]

Hi,

On 21/01/2026 14:16, Michal Simek wrote:
> 
> 
> On 1/19/26 10:51, Tomas Melin wrote:
>> Driver is compatible with RTC controller found on zynqmp.
>> Configure dependency to enable building only when zynqmp architecture
>> is enabled.
>>
>> Reported-by: kernel test robot <lkp@intel.com>
>> Signed-off-by: Tomas Melin <tomas.melin@vaisala.com>
>> ---
>>   drivers/rtc/Kconfig | 2 +-
>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
>> index 2933c41c77c88e60df721fe65b9c8afb995ae51e..46b497524cbfb5d0c1662dcaddbb6d28b4ae2abe 100644
>> --- a/drivers/rtc/Kconfig
>> +++ b/drivers/rtc/Kconfig
>> @@ -1376,7 +1376,7 @@ config RTC_DRV_OPTEE
>>   
>>   config RTC_DRV_ZYNQMP
>>   	tristate "Xilinx Zynq Ultrascale+ MPSoC RTC"
>> -	depends on OF && HAS_IOMEM
>> +	depends on OF && HAS_IOMEM && ARCH_ZYNQMP
> 
> 
>     arm-linux-gnueabi-ld: drivers/rtc/rtc-zynqmp.o: in function 
> `xlnx_rtc_read_offset':
>  >> rtc-zynqmp.c:(.text.xlnx_rtc_read_offset+0xd0): undefined reference to 
> `__aeabi_ldivmod'
> 
> You should use macros like div_u64() to fix it instead of have driver enabled 
> only for ZynqMP.
I can do it that way if you prefer such approach.

Thanks,
Tomas


> 
> M
> 

Re: [PATCH v3 1/6] rtc: zynqmp: declare dependency on arch

[Michal Simek]

On 1/22/26 13:25, Tomas Melin wrote:
> Hi,
> 
> On 21/01/2026 14:16, Michal Simek wrote:
>>
>>
>> On 1/19/26 10:51, Tomas Melin wrote:
>>> Driver is compatible with RTC controller found on zynqmp.
>>> Configure dependency to enable building only when zynqmp architecture
>>> is enabled.
>>>
>>> Reported-by: kernel test robot <lkp@intel.com>
>>> Signed-off-by: Tomas Melin <tomas.melin@vaisala.com>
>>> ---
>>>    drivers/rtc/Kconfig | 2 +-
>>>    1 file changed, 1 insertion(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
>>> index 2933c41c77c88e60df721fe65b9c8afb995ae51e..46b497524cbfb5d0c1662dcaddbb6d28b4ae2abe 100644
>>> --- a/drivers/rtc/Kconfig
>>> +++ b/drivers/rtc/Kconfig
>>> @@ -1376,7 +1376,7 @@ config RTC_DRV_OPTEE
>>>    
>>>    config RTC_DRV_ZYNQMP
>>>    	tristate "Xilinx Zynq Ultrascale+ MPSoC RTC"
>>> -	depends on OF && HAS_IOMEM
>>> +	depends on OF && HAS_IOMEM && ARCH_ZYNQMP
>>
>>
>>      arm-linux-gnueabi-ld: drivers/rtc/rtc-zynqmp.o: in function
>> `xlnx_rtc_read_offset':
>>   >> rtc-zynqmp.c:(.text.xlnx_rtc_read_offset+0xd0): undefined reference to
>> `__aeabi_ldivmod'
>>
>> You should use macros like div_u64() to fix it instead of have driver enabled
>> only for ZynqMP.
> I can do it that way if you prefer such approach.

Definitely because this driver could be called from different architectures. 
RISC-V or x86.

Thanks,
Michal