* [PATCH V7 1/3] dt-bindings: rtc: zynqmp: Add clock information @ 2022-06-10 11:37 Srinivas Neeli 2022-06-10 11:37 ` [PATCH V7 2/3] rtc: zynqmp: Add calibration set and get support Srinivas Neeli 2022-06-10 11:37 ` [PATCH V7 3/3] rtc: zynqmp: Updated calibration value Srinivas Neeli 0 siblings, 2 replies; 6+ messages in thread From: Srinivas Neeli @ 2022-06-10 11:37 UTC (permalink / raw) To: a.zummo, alexandre.belloni, robh+dt, krzysztof.kozlowski+dt, michal.simek, sgoud, shubhraj, srinivas.neeli, neelisrinivas18 Cc: devicetree, linux-rtc, linux-arm-kernel, linux-kernel, git, Srinivas Neeli Added clock information and deprecated calibration support. Signed-off-by: Srinivas Neeli <srinivas.neeli@xilinx.com> --- Changes in V7: -None Changes in V6: -Removed dtc warnings. Changes in V5: -Removed quotes and _clk suffix from clocknames. Changes in V4: - Deprecated calibrtion support Changes in V3: - New patch --- .../devicetree/bindings/rtc/xlnx,zynqmp-rtc.yaml | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/rtc/xlnx,zynqmp-rtc.yaml b/Documentation/devicetree/bindings/rtc/xlnx,zynqmp-rtc.yaml index bdb72d3ddf2a..638dd1d8bb26 100644 --- a/Documentation/devicetree/bindings/rtc/xlnx,zynqmp-rtc.yaml +++ b/Documentation/devicetree/bindings/rtc/xlnx,zynqmp-rtc.yaml @@ -23,8 +23,15 @@ properties: reg: maxItems: 1 + clocks: + items: + - description: rtc_clk is the operating frequency of crystal. + + clock-names: + maxItems: 1 + interrupts: - minItems: 2 + maxItems: 2 interrupt-names: items: @@ -39,6 +46,7 @@ properties: minimum: 0x1 maximum: 0x1FFFFF default: 0x198233 + deprecated: true required: - compatible @@ -61,5 +69,7 @@ examples: interrupts = <0 26 4>, <0 27 4>; interrupt-names = "alarm", "sec"; calibration = <0x198233>; + clock-names = "rtc_clk"; + clocks = <&rtc_clk>; }; }; -- 2.25.1 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH V7 2/3] rtc: zynqmp: Add calibration set and get support 2022-06-10 11:37 [PATCH V7 1/3] dt-bindings: rtc: zynqmp: Add clock information Srinivas Neeli @ 2022-06-10 11:37 ` Srinivas Neeli 2022-06-10 11:37 ` [PATCH V7 3/3] rtc: zynqmp: Updated calibration value Srinivas Neeli 1 sibling, 0 replies; 6+ messages in thread From: Srinivas Neeli @ 2022-06-10 11:37 UTC (permalink / raw) To: a.zummo, alexandre.belloni, robh+dt, krzysztof.kozlowski+dt, michal.simek, sgoud, shubhraj, srinivas.neeli, neelisrinivas18 Cc: devicetree, linux-rtc, linux-arm-kernel, linux-kernel, git, Srinivas Neeli Zynqmp RTC controller has a calibration feature to compensate time deviation due to input clock inaccuracy. Set and get calibration API's are used for setting and getting calibration value from the controller calibration register. Signed-off-by: Srinivas Neeli <srinivas.neeli@xilinx.com> --- Changes in V7: -Removed calibration default value update from this patch. Changes in V6: -None Changes in V5: -None Changes in V4: -Updated MIN and MAX calibration values. Changes in V3: -Calculated tick_mult using crystal frequency. -Calibration register updating based on crystal frequency in probe. -Supressed MIN an MAX calibration values,Will send separate patch in future. Changes in V2: -Removed unused macro. -Updated code with review comments. --- drivers/rtc/rtc-zynqmp.c | 113 ++++++++++++++++++++++++++++++++------- 1 file changed, 94 insertions(+), 19 deletions(-) diff --git a/drivers/rtc/rtc-zynqmp.c b/drivers/rtc/rtc-zynqmp.c index f440bb52be92..39b23f88ee26 100644 --- a/drivers/rtc/rtc-zynqmp.c +++ b/drivers/rtc/rtc-zynqmp.c @@ -6,6 +6,7 @@ * */ +#include <linux/clk.h> #include <linux/delay.h> #include <linux/init.h> #include <linux/io.h> @@ -40,13 +41,19 @@ #define RTC_CALIB_MASK 0x1FFFFF #define RTC_ALRM_MASK BIT(1) #define RTC_MSEC 1000 +#define RTC_FR_MASK 0xF0000 +#define RTC_FR_MAX_TICKS 16 +#define RTC_PPB 1000000000LL +#define RTC_MIN_OFFSET -32768000 +#define RTC_MAX_OFFSET 32767000 struct xlnx_rtc_dev { struct rtc_device *rtc; void __iomem *reg_base; int alarm_irq; int sec_irq; - unsigned int calibval; + struct clk *rtc_clk; + unsigned int freq; }; static int xlnx_rtc_set_time(struct device *dev, struct rtc_time *tm) @@ -61,13 +68,6 @@ static int xlnx_rtc_set_time(struct device *dev, struct rtc_time *tm) */ new_time = rtc_tm_to_time64(tm) + 1; - /* - * Writing into calibration register will clear the Tick Counter and - * force the next second to be signaled exactly in 1 second period - */ - xrtcdev->calibval &= RTC_CALIB_MASK; - writel(xrtcdev->calibval, (xrtcdev->reg_base + RTC_CALIB_WR)); - writel(new_time, xrtcdev->reg_base + RTC_SET_TM_WR); /* @@ -173,15 +173,76 @@ static void xlnx_init_rtc(struct xlnx_rtc_dev *xrtcdev) rtc_ctrl = readl(xrtcdev->reg_base + RTC_CTRL); rtc_ctrl |= RTC_BATT_EN; writel(rtc_ctrl, xrtcdev->reg_base + RTC_CTRL); +} - /* - * Based on crystal freq of 33.330 KHz - * set the seconds counter and enable, set fractions counter - * to default value suggested as per design spec - * to correct RTC delay in frequency over period of time. +static int xlnx_rtc_read_offset(struct device *dev, long *offset) +{ + struct xlnx_rtc_dev *xrtcdev = dev_get_drvdata(dev); + unsigned long long rtc_ppb = RTC_PPB; + unsigned int tick_mult = do_div(rtc_ppb, xrtcdev->freq); + unsigned int calibval; + long offset_val; + + calibval = readl(xrtcdev->reg_base + RTC_CALIB_RD); + /* Offset with seconds ticks */ + offset_val = calibval & RTC_TICK_MASK; + offset_val = offset_val - RTC_CALIB_DEF; + offset_val = offset_val * tick_mult; + + /* Offset with fractional ticks */ + if (calibval & RTC_FR_EN) + offset_val += ((calibval & RTC_FR_MASK) >> RTC_FR_DATSHIFT) + * (tick_mult / RTC_FR_MAX_TICKS); + *offset = offset_val; + + return 0; +} + +static int xlnx_rtc_set_offset(struct device *dev, long offset) +{ + struct xlnx_rtc_dev *xrtcdev = dev_get_drvdata(dev); + unsigned long long rtc_ppb = RTC_PPB; + unsigned int tick_mult = do_div(rtc_ppb, xrtcdev->freq); + unsigned char fract_tick; + unsigned int calibval; + short int max_tick; + int fract_offset; + + if (offset < RTC_MIN_OFFSET || offset > RTC_MAX_OFFSET) + return -ERANGE; + + /* Number ticks for given offset */ + max_tick = div_s64_rem(offset, tick_mult, &fract_offset); + + /* Number fractional ticks for given offset */ + if (fract_offset) { + if (fract_offset < 0) { + fract_offset = fract_offset + tick_mult; + max_tick--; + } + if (fract_offset > (tick_mult / RTC_FR_MAX_TICKS)) { + for (fract_tick = 1; fract_tick < 16; fract_tick++) { + if (fract_offset <= + (fract_tick * + (tick_mult / RTC_FR_MAX_TICKS))) + break; + } + } + } + + /* Zynqmp RTC uses second and fractional tick + * counters for compensation */ - xrtcdev->calibval &= RTC_CALIB_MASK; - writel(xrtcdev->calibval, (xrtcdev->reg_base + RTC_CALIB_WR)); + calibval = max_tick + RTC_CALIB_DEF; + + if (fract_tick) + calibval |= RTC_FR_EN; + + calibval |= (fract_tick << RTC_FR_DATSHIFT); + + writel(calibval, (xrtcdev->reg_base + RTC_CALIB_WR)); + + return 0; } static const struct rtc_class_ops xlnx_rtc_ops = { @@ -190,6 +251,8 @@ static const struct rtc_class_ops xlnx_rtc_ops = { .read_alarm = xlnx_rtc_read_alarm, .set_alarm = xlnx_rtc_set_alarm, .alarm_irq_enable = xlnx_rtc_alarm_irq_enable, + .read_offset = xlnx_rtc_read_offset, + .set_offset = xlnx_rtc_set_offset, }; static irqreturn_t xlnx_rtc_interrupt(int irq, void *id) @@ -255,10 +318,22 @@ static int xlnx_rtc_probe(struct platform_device *pdev) return ret; } - ret = of_property_read_u32(pdev->dev.of_node, "calibration", - &xrtcdev->calibval); - if (ret) - xrtcdev->calibval = RTC_CALIB_DEF; + /* Getting the rtc_clk info */ + xrtcdev->rtc_clk = devm_clk_get_optional(&pdev->dev, "rtc_clk"); + if (IS_ERR(xrtcdev->rtc_clk)) { + if (PTR_ERR(xrtcdev->rtc_clk) != -EPROBE_DEFER) + dev_warn(&pdev->dev, "Device clock not found.\n"); + } + xrtcdev->freq = clk_get_rate(xrtcdev->rtc_clk); + if (!xrtcdev->freq) { + ret = of_property_read_u32(pdev->dev.of_node, "calibration", + &xrtcdev->freq); + if (ret) + xrtcdev->freq = RTC_CALIB_DEF; + } + ret = readl(xrtcdev->reg_base + RTC_CALIB_RD); + if (!ret) + writel(xrtcdev->freq, (xrtcdev->reg_base + RTC_CALIB_WR)); xlnx_init_rtc(xrtcdev); -- 2.25.1 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH V7 3/3] rtc: zynqmp: Updated calibration value 2022-06-10 11:37 [PATCH V7 1/3] dt-bindings: rtc: zynqmp: Add clock information Srinivas Neeli 2022-06-10 11:37 ` [PATCH V7 2/3] rtc: zynqmp: Add calibration set and get support Srinivas Neeli @ 2022-06-10 11:37 ` Srinivas Neeli 2022-06-10 12:03 ` Alexandre Belloni 1 sibling, 1 reply; 6+ messages in thread From: Srinivas Neeli @ 2022-06-10 11:37 UTC (permalink / raw) To: a.zummo, alexandre.belloni, robh+dt, krzysztof.kozlowski+dt, michal.simek, sgoud, shubhraj, srinivas.neeli, neelisrinivas18 Cc: devicetree, linux-rtc, linux-arm-kernel, linux-kernel, git, Srinivas Neeli As per RTC spec default calibration value is 0x7FFF. Signed-off-by: Srinivas Neeli <srinivas.neeli@xilinx.com> --- Changes in V7: -New patch -TRM not updated yet, Internal design document contains 0x7FFF as default value. TRM Will update in next release. --- drivers/rtc/rtc-zynqmp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/rtc/rtc-zynqmp.c b/drivers/rtc/rtc-zynqmp.c index 39b23f88ee26..1dd389b891fe 100644 --- a/drivers/rtc/rtc-zynqmp.c +++ b/drivers/rtc/rtc-zynqmp.c @@ -37,7 +37,7 @@ #define RTC_OSC_EN BIT(24) #define RTC_BATT_EN BIT(31) -#define RTC_CALIB_DEF 0x198233 +#define RTC_CALIB_DEF 0x7FFF #define RTC_CALIB_MASK 0x1FFFFF #define RTC_ALRM_MASK BIT(1) #define RTC_MSEC 1000 -- 2.25.1 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH V7 3/3] rtc: zynqmp: Updated calibration value 2022-06-10 11:37 ` [PATCH V7 3/3] rtc: zynqmp: Updated calibration value Srinivas Neeli @ 2022-06-10 12:03 ` Alexandre Belloni 2022-06-10 15:04 ` Neeli, Srinivas 0 siblings, 1 reply; 6+ messages in thread From: Alexandre Belloni @ 2022-06-10 12:03 UTC (permalink / raw) To: Srinivas Neeli Cc: a.zummo, robh+dt, krzysztof.kozlowski+dt, michal.simek, sgoud, shubhraj, srinivas.neeli, neelisrinivas18, devicetree, linux-rtc, linux-arm-kernel, linux-kernel, git On 10/06/2022 17:07:09+0530, Srinivas Neeli wrote: > As per RTC spec default calibration value is 0x7FFF. > Having that as a second patch breaks the calculation in your previous patch, really, this should just be a single patch. > Signed-off-by: Srinivas Neeli <srinivas.neeli@xilinx.com> > --- > Changes in V7: > -New patch > -TRM not updated yet, Internal design document contains 0x7FFF as > default value. TRM Will update in next release. > --- > drivers/rtc/rtc-zynqmp.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/rtc/rtc-zynqmp.c b/drivers/rtc/rtc-zynqmp.c > index 39b23f88ee26..1dd389b891fe 100644 > --- a/drivers/rtc/rtc-zynqmp.c > +++ b/drivers/rtc/rtc-zynqmp.c > @@ -37,7 +37,7 @@ > #define RTC_OSC_EN BIT(24) > #define RTC_BATT_EN BIT(31) > > -#define RTC_CALIB_DEF 0x198233 > +#define RTC_CALIB_DEF 0x7FFF > #define RTC_CALIB_MASK 0x1FFFFF > #define RTC_ALRM_MASK BIT(1) > #define RTC_MSEC 1000 > -- > 2.25.1 > -- Alexandre Belloni, co-owner and COO, Bootlin Embedded Linux and Kernel engineering https://bootlin.com ^ permalink raw reply [flat|nested] 6+ messages in thread
* RE: [PATCH V7 3/3] rtc: zynqmp: Updated calibration value 2022-06-10 12:03 ` Alexandre Belloni @ 2022-06-10 15:04 ` Neeli, Srinivas 2022-06-11 14:48 ` Alexandre Belloni 0 siblings, 1 reply; 6+ messages in thread From: Neeli, Srinivas @ 2022-06-10 15:04 UTC (permalink / raw) To: Alexandre Belloni, Srinivas Neeli Cc: a.zummo@towertech.it, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, michal.simek@xilinx.com, sgoud@xilinx.com, shubhraj@xilinx.com, neelisrinivas18@gmail.com, devicetree@vger.kernel.org, linux-rtc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, git@xilinx.com [AMD Official Use Only - General] Hi, > -----Original Message----- > From: Alexandre Belloni <alexandre.belloni@bootlin.com> > Sent: Friday, June 10, 2022 5:34 PM > To: Srinivas Neeli <srinivas.neeli@xilinx.com> > Cc: a.zummo@towertech.it; robh+dt@kernel.org; > krzysztof.kozlowski+dt@linaro.org; michal.simek@xilinx.com; > sgoud@xilinx.com; shubhraj@xilinx.com; Neeli, Srinivas > <srinivas.neeli@amd.com>; neelisrinivas18@gmail.com; > devicetree@vger.kernel.org; linux-rtc@vger.kernel.org; linux-arm- > kernel@lists.infradead.org; linux-kernel@vger.kernel.org; git@xilinx.com > Subject: Re: [PATCH V7 3/3] rtc: zynqmp: Updated calibration value > > On 10/06/2022 17:07:09+0530, Srinivas Neeli wrote: > > As per RTC spec default calibration value is 0x7FFF. > > > > Having that as a second patch breaks the calculation in your previous patch, > really, this should just be a single patch. Can I swap 3/3 and 2/3, Will that be fine ?. > > > Signed-off-by: Srinivas Neeli <srinivas.neeli@xilinx.com> > > --- > > Changes in V7: > > -New patch > > -TRM not updated yet, Internal design document contains 0x7FFF as > > default value. TRM Will update in next release. > > --- > > drivers/rtc/rtc-zynqmp.c | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/drivers/rtc/rtc-zynqmp.c b/drivers/rtc/rtc-zynqmp.c index > > 39b23f88ee26..1dd389b891fe 100644 > > --- a/drivers/rtc/rtc-zynqmp.c > > +++ b/drivers/rtc/rtc-zynqmp.c > > @@ -37,7 +37,7 @@ > > #define RTC_OSC_EN BIT(24) > > #define RTC_BATT_EN BIT(31) > > > > -#define RTC_CALIB_DEF 0x198233 > > +#define RTC_CALIB_DEF 0x7FFF > > #define RTC_CALIB_MASK 0x1FFFFF > > #define RTC_ALRM_MASK BIT(1) > > #define RTC_MSEC 1000 > > -- > > 2.25.1 > > > > -- > Alexandre Belloni, co-owner and COO, Bootlin > Embedded Linux and Kernel engineering > https://bootlin.com ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH V7 3/3] rtc: zynqmp: Updated calibration value 2022-06-10 15:04 ` Neeli, Srinivas @ 2022-06-11 14:48 ` Alexandre Belloni 0 siblings, 0 replies; 6+ messages in thread From: Alexandre Belloni @ 2022-06-11 14:48 UTC (permalink / raw) To: Neeli, Srinivas Cc: Srinivas Neeli, a.zummo@towertech.it, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, michal.simek@xilinx.com, sgoud@xilinx.com, shubhraj@xilinx.com, neelisrinivas18@gmail.com, devicetree@vger.kernel.org, linux-rtc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, git@xilinx.com On 10/06/2022 15:04:31+0000, Neeli, Srinivas wrote: > [AMD Official Use Only - General] > > Hi, > > > -----Original Message----- > > From: Alexandre Belloni <alexandre.belloni@bootlin.com> > > Sent: Friday, June 10, 2022 5:34 PM > > To: Srinivas Neeli <srinivas.neeli@xilinx.com> > > Cc: a.zummo@towertech.it; robh+dt@kernel.org; > > krzysztof.kozlowski+dt@linaro.org; michal.simek@xilinx.com; > > sgoud@xilinx.com; shubhraj@xilinx.com; Neeli, Srinivas > > <srinivas.neeli@amd.com>; neelisrinivas18@gmail.com; > > devicetree@vger.kernel.org; linux-rtc@vger.kernel.org; linux-arm- > > kernel@lists.infradead.org; linux-kernel@vger.kernel.org; git@xilinx.com > > Subject: Re: [PATCH V7 3/3] rtc: zynqmp: Updated calibration value > > > > On 10/06/2022 17:07:09+0530, Srinivas Neeli wrote: > > > As per RTC spec default calibration value is 0x7FFF. > > > > > > > Having that as a second patch breaks the calculation in your previous patch, > > really, this should just be a single patch. > > Can I swap 3/3 and 2/3, Will that be fine ?. That would be better, yes > > > > > > Signed-off-by: Srinivas Neeli <srinivas.neeli@xilinx.com> > > > --- > > > Changes in V7: > > > -New patch > > > -TRM not updated yet, Internal design document contains 0x7FFF as > > > default value. TRM Will update in next release. > > > --- > > > drivers/rtc/rtc-zynqmp.c | 2 +- > > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > > > diff --git a/drivers/rtc/rtc-zynqmp.c b/drivers/rtc/rtc-zynqmp.c index > > > 39b23f88ee26..1dd389b891fe 100644 > > > --- a/drivers/rtc/rtc-zynqmp.c > > > +++ b/drivers/rtc/rtc-zynqmp.c > > > @@ -37,7 +37,7 @@ > > > #define RTC_OSC_EN BIT(24) > > > #define RTC_BATT_EN BIT(31) > > > > > > -#define RTC_CALIB_DEF 0x198233 > > > +#define RTC_CALIB_DEF 0x7FFF > > > #define RTC_CALIB_MASK 0x1FFFFF > > > #define RTC_ALRM_MASK BIT(1) > > > #define RTC_MSEC 1000 > > > -- > > > 2.25.1 > > > > > > > -- > > Alexandre Belloni, co-owner and COO, Bootlin > > Embedded Linux and Kernel engineering > > https://bootlin.com -- Alexandre Belloni, co-owner and COO, Bootlin Embedded Linux and Kernel engineering https://bootlin.com ^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2022-06-11 14:48 UTC | newest] Thread overview: 6+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2022-06-10 11:37 [PATCH V7 1/3] dt-bindings: rtc: zynqmp: Add clock information Srinivas Neeli 2022-06-10 11:37 ` [PATCH V7 2/3] rtc: zynqmp: Add calibration set and get support Srinivas Neeli 2022-06-10 11:37 ` [PATCH V7 3/3] rtc: zynqmp: Updated calibration value Srinivas Neeli 2022-06-10 12:03 ` Alexandre Belloni 2022-06-10 15:04 ` Neeli, Srinivas 2022-06-11 14:48 ` Alexandre Belloni
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