* Re: [PATCH 15/25] power: reset: Add basic power reset driver for RDA8810PL
From: Krzysztof Kozlowski @ 2025-09-17 0:45 UTC (permalink / raw)
To: dang.huynh, Manivannan Sadhasivam, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Linus Walleij,
Bartosz Golaszewski, Alexandre Belloni, Michael Turquette,
Stephen Boyd, Philipp Zabel, Sebastian Reichel, Vinod Koul,
Kees Cook, Gustavo A. R. Silva, Ulf Hansson
Cc: linux-arm-kernel, linux-unisoc, devicetree, linux-kernel,
linux-gpio, linux-rtc, linux-clk, linux-pm, dmaengine,
linux-hardening, linux-mmc
In-Reply-To: <20250917-rda8810pl-drivers-v1-15-9ca9184ca977@mainlining.org>
On 17/09/2025 22:25, Dang Huynh via B4 Relay wrote:
> From: Dang Huynh <dang.huynh@mainlining.org>
>
> This basic driver can only reboot, powering off requires the modem
> firmware which we don't have yet.
>
> Signed-off-by: Dang Huynh <dang.huynh@mainlining.org>
> ---
> MAINTAINERS | 6 +++++
> drivers/power/reset/Kconfig | 9 +++++++
> drivers/power/reset/Makefile | 1 +
> drivers/power/reset/rda-reboot.c | 58 ++++++++++++++++++++++++++++++++++++++++
> 4 files changed, 74 insertions(+)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index cbe2ab8af6dcd40dd1456d9df55673dace3c87b2..5ec24d8657bffb55c160947a930980e428c6a6b7 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -21399,6 +21399,12 @@ S: Maintained
> F: Documentation/devicetree/bindings/clock/rda,8810pl-apsyscon.yaml
> F: drivers/clk/rda/clk-rda8810.c
>
> +RDA MICRO MODEM RESET DRIVER
> +M: Dang Huynh <dang.huynh@mainlining.org>
> +S: Maintained
> +F: Documentation/devicetree/bindings/power/reset/rda,md-reset.yaml
> +F: drivers/power/reset/rda-reboot.c
> +
> RDA MICRO REAL TIME CLOCK DRIVER
> M: Dang Huynh <dang.huynh@mainlining.org>
> S: Maintained
> diff --git a/drivers/power/reset/Kconfig b/drivers/power/reset/Kconfig
> index 77ea3129c70806929f3c248667db42f05f5f1d27..de9b1afb94d14a5d23286ddb302af4107d649c12 100644
> --- a/drivers/power/reset/Kconfig
> +++ b/drivers/power/reset/Kconfig
> @@ -205,6 +205,15 @@ config POWER_RESET_QNAP
>
> Say Y if you have a QNAP NAS.
>
> +config POWER_RESET_RDA
> + bool "RDA Micro Reset Driver"
> + depends on ARCH_RDA
|| COMPILE_TEST
everywhere, for all your drivers.
> + help
> + This driver supports soft resetting RDA Micro boards by writing
> + magic values to the modem register.
> +
> + Say Y if you have a board with RDA Micro SoC.
> +
> config POWER_RESET_REGULATOR
> bool "Regulator subsystem power-off driver"
> depends on OF && REGULATOR
> diff --git a/drivers/power/reset/Makefile b/drivers/power/reset/Makefile
> index b7c2b5940be9971548a5527384d1931abff11c4c..14371230410dad2852489160f4fc23d8fd087d6e 100644
> --- a/drivers/power/reset/Makefile
> +++ b/drivers/power/reset/Makefile
> @@ -22,6 +22,7 @@ obj-$(CONFIG_POWER_RESET_ODROID_GO_ULTRA_POWEROFF) += odroid-go-ultra-poweroff.o
> obj-$(CONFIG_POWER_RESET_PIIX4_POWEROFF) += piix4-poweroff.o
> obj-$(CONFIG_POWER_RESET_LTC2952) += ltc2952-poweroff.o
> obj-$(CONFIG_POWER_RESET_QNAP) += qnap-poweroff.o
> +obj-$(CONFIG_POWER_RESET_RDA) += rda-reboot.o
> obj-$(CONFIG_POWER_RESET_REGULATOR) += regulator-poweroff.o
> obj-$(CONFIG_POWER_RESET_RESTART) += restart-poweroff.o
> obj-$(CONFIG_POWER_RESET_ST) += st-poweroff.o
> diff --git a/drivers/power/reset/rda-reboot.c b/drivers/power/reset/rda-reboot.c
> new file mode 100644
> index 0000000000000000000000000000000000000000..d87b063ba67d847f8e869e50a6c01427b2866889
> --- /dev/null
> +++ b/drivers/power/reset/rda-reboot.c
> @@ -0,0 +1,58 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Copyright (c) 2025, Dang Huynh <dang.huynh@mainlining.org>
> + *
> + * Based on drivers/power/reset/msm-poweroff.c:
> + * Copyright (c) 2013, The Linux Foundation. All rights reserved.
> + */
> +
> +#include <linux/err.h>
> +#include <linux/init.h>
> +#include <linux/kernel.h>
> +#include <linux/io.h>
> +#include <linux/of.h>
> +#include <linux/platform_device.h>
> +#include <linux/module.h>
> +#include <linux/reboot.h>
> +#include <linux/pm.h>
> +#include <linux/mfd/syscon.h>
> +
> +static void __iomem *rda_md_sysctrl;
No, no singletons.
> +
> +static int do_rda_reboot(struct sys_off_data *data)
> +{
> + /* unprotect md registers */
> + writel(0x00A50001, rda_md_sysctrl);
> +
> + /* reset all */
> + writel(0x80000000, rda_md_sysctrl + 4);
> +
> + return NOTIFY_DONE;
> +}
> +
> +static int rda_reboot_probe(struct platform_device *pdev)
> +{
> + rda_md_sysctrl = devm_platform_ioremap_resource(pdev, 0);
> + if (IS_ERR(rda_md_sysctrl))
> + return PTR_ERR(rda_md_sysctrl);
> +
> + devm_register_sys_off_handler(&pdev->dev, SYS_OFF_MODE_RESTART,
> + 128, do_rda_reboot, NULL);
> +
> + return 0;
> +}
> +
> +static const struct of_device_id of_rda_reboot_match[] = {
> + { .compatible = "rda,md-reset", },
> + {},
> +};
> +MODULE_DEVICE_TABLE(of, of_rda_reboot_match);
> +
> +static struct platform_driver rda_reboot_driver = {
> + .probe = rda_reboot_probe,
> + .driver = {
> + .name = "rda-reboot",
> + .of_match_table = of_match_ptr(of_rda_reboot_match),
Drop of_match_ptr, you have warnings here.
> + },
> +};
> +builtin_platform_driver(rda_reboot_driver);
>
Best regards,
Krzysztof
^ permalink raw reply
* Re: [PATCH 16/25] dts: unisoc: rda8810pl: Enable modem reset
From: Krzysztof Kozlowski @ 2025-09-17 0:46 UTC (permalink / raw)
To: dang.huynh, Manivannan Sadhasivam, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Linus Walleij,
Bartosz Golaszewski, Alexandre Belloni, Michael Turquette,
Stephen Boyd, Philipp Zabel, Sebastian Reichel, Vinod Koul,
Kees Cook, Gustavo A. R. Silva, Ulf Hansson
Cc: linux-arm-kernel, linux-unisoc, devicetree, linux-kernel,
linux-gpio, linux-rtc, linux-clk, linux-pm, dmaengine,
linux-hardening, linux-mmc
In-Reply-To: <20250917-rda8810pl-drivers-v1-16-9ca9184ca977@mainlining.org>
On 17/09/2025 22:25, Dang Huynh via B4 Relay wrote:
> From: Dang Huynh <dang.huynh@mainlining.org>
>
> This allows us to reboot the board from the OS.
>
> Signed-off-by: Dang Huynh <dang.huynh@mainlining.org>
> ---
> arch/arm/boot/dts/unisoc/rda8810pl.dtsi | 5 +++++
> 1 file changed, 5 insertions(+)
Please don't do patch per one node. Add logical chunks, but not that
detailed. There are no dependencies here, so way you organize patches
and split them is just confusing.
Best regards,
Krzysztof
^ permalink raw reply
* Re: [PATCH 22/25] mmc: host: Add RDA Micro SD/MMC driver
From: Krzysztof Kozlowski @ 2025-09-17 0:48 UTC (permalink / raw)
To: dang.huynh, Manivannan Sadhasivam, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Linus Walleij,
Bartosz Golaszewski, Alexandre Belloni, Michael Turquette,
Stephen Boyd, Philipp Zabel, Sebastian Reichel, Vinod Koul,
Kees Cook, Gustavo A. R. Silva, Ulf Hansson
Cc: linux-arm-kernel, linux-unisoc, devicetree, linux-kernel,
linux-gpio, linux-rtc, linux-clk, linux-pm, dmaengine,
linux-hardening, linux-mmc
In-Reply-To: <20250917-rda8810pl-drivers-v1-22-9ca9184ca977@mainlining.org>
On 17/09/2025 22:25, Dang Huynh via B4 Relay wrote:
> From: Dang Huynh <dang.huynh@mainlining.org>
>
> RDA Micro RDA8810PL includes an SD/MMC controller. This controller
> supports SD/SDIO/MMC interface.
>
> Signed-off-by: Dang Huynh <dang.huynh@mainlining.org>
> ---
> MAINTAINERS | 6 +
> drivers/mmc/host/Kconfig | 12 +
> drivers/mmc/host/Makefile | 1 +
> drivers/mmc/host/rda-mmc.c | 853 +++++++++++++++++++++++++++++++++++++++++++++
> 4 files changed, 872 insertions(+)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 91be43782f4ba8aacb629002d357a66704f10b2b..33e04ce35dcc4cbadd715ec9199f2453237b8002 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -21417,6 +21417,12 @@ S: Maintained
> F: Documentation/devicetree/bindings/rtc/rda,8810pl-rtc.yaml
> F: drivers/rtc/rtc-rda.c
>
> +RDA MICRO SECURE DIGITAL AND MULTIMEDIA CARD DRIVER
> +M: Dang Huynh <dang.huynh@mainlining.org>
> +S: Maintained
> +F: Documentation/devicetree/bindings/mmc/rda,mmc.yaml
> +F: drivers/mmc/host/rda-mmc.c
> +
> RDACM20 Camera Sensor
> M: Jacopo Mondi <jacopo+renesas@jmondi.org>
> M: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
> index 4afa0130779d97ca9d1c0ed2102b0babdedcaeeb..352a6eb4e30793b7311c7877c238a7fe31121123 100644
> --- a/drivers/mmc/host/Kconfig
> +++ b/drivers/mmc/host/Kconfig
> @@ -1040,6 +1040,18 @@ config MMC_MTK
> This is needed if support for any SD/SDIO/MMC devices is required.
> If unsure, say N.
>
> +config MMC_RDA
> + tristate "RDA Micro SD/MMC Card Interface support"
> + depends on ARCH_RDA
Missing compile test
> + depends on COMMON_CLK
> + depends on HAS_DMA
> + help
> + This selects the RDA Micro Secure digital and Multimedia card interface. The
> + controller supports SD/SDIO/MMC interface.
> + If you have a board with RDA SoC and it uses this interface, say Y or M here.
> +
> + If unsure, say N.
...
> +};
> +MODULE_DEVICE_TABLE(of, rda_mmc_dt_ids);
> +
> +static struct platform_driver rda_mmc_driver = {
> + .probe = rda_mmc_probe,
> + .remove = rda_mmc_remove,
> + .driver = {
> + .name = "rda-mmc",
> + .probe_type = PROBE_PREFER_ASYNCHRONOUS,
> + .of_match_table = rda_mmc_dt_ids,
> + },
> +};
> +module_platform_driver(rda_mmc_driver);
> +
> +MODULE_AUTHOR("Dang Huynh <dang.huynh@mainlining.org>");
> +MODULE_LICENSE("GPL");
> +MODULE_DESCRIPTION("MMC/SD driver for RDA platform");
> +MODULE_ALIAS("platform:rda-mmc");
You should not need MODULE_ALIAS() in normal cases. If you need it,
usually it means your device ID table is wrong (e.g. misses either
entries or MODULE_DEVICE_TABLE()). MODULE_ALIAS() is not a substitute
for incomplete ID table.
>
Best regards,
Krzysztof
^ permalink raw reply
* Re: [PATCH v2 1/6] dt-bindings: rtc: Add ST m41t93
From: Krzysztof Kozlowski @ 2025-09-17 0:52 UTC (permalink / raw)
To: Akhilesh Patil
Cc: alexandre.belloni, krzk+dt, robh, conor+dt, skhan, linux-rtc,
devicetree, linux-kernel, akhileshpatilvnit
In-Reply-To: <20250915141951.GA3239298@bhairav-test.ee.iitb.ac.in>
On 15/09/2025 16:19, Akhilesh Patil wrote:
>>> +$id: http://devicetree.org/schemas/rtc/st,m41t93.yaml#
>>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>>> +
>>> +title: ST M41T93 RTC and compatible
>>> +
>>> +maintainers:
>>> + - linux-rtc@vger.kernel.org
>>
>> Not much improved. This should be a person responsible/caring about this
>> hardware support in the kernel. Why would we want to take the binding if
>> no one cares about it?
>
> Okay. As per get_maintainer.pl, linux driver corresponding to this binding does not have a dedicated
> maintainer, hence it shows rtc subsystem maintainer (Alexandre Belloni).
And what did I express at v1?
> Looking forward for your suggestion here.
> What do you suggest to keep maintainer as Rob Herring or/and me ? as I see in
> such cases Rob is the maintainer.
No, I really doubt Rob cares about this particular hardware. Neither do
I, nor Conor.
Best regards,
Krzysztof
^ permalink raw reply
* Re: [PATCH 17/25] drivers: gpio: rda: Make direction register unreadable
From: Bartosz Golaszewski @ 2025-09-17 8:00 UTC (permalink / raw)
To: dang.huynh
Cc: Dang Huynh via B4 Relay, linux-arm-kernel, linux-unisoc,
devicetree, linux-kernel, linux-gpio, linux-rtc, linux-clk,
linux-pm, dmaengine, linux-hardening, linux-mmc,
Manivannan Sadhasivam, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Linus Walleij, Bartosz Golaszewski,
Alexandre Belloni, Michael Turquette, Stephen Boyd, Philipp Zabel,
Sebastian Reichel, Vinod Koul, Kees Cook, Gustavo A. R. Silva,
Ulf Hansson
In-Reply-To: <20250917-rda8810pl-drivers-v1-17-9ca9184ca977@mainlining.org>
On Tue, 16 Sep 2025 22:25:14 +0200, Dang Huynh via B4 Relay
<devnull+dang.huynh.mainlining.org@kernel.org> said:
> From: Dang Huynh <dang.huynh@mainlining.org>
>
> The register doesn't like to be read, this causes the SD Card
> Card Detect GPIO to misbehaves in the OS.
>
Hi!
Sorry but this message is unintelligible, please say precisely what is going
on and why you need this and why it won't break existing users.
Also: the title should be "gpio: rda: ...".
Bartosz
> Signed-off-by: Dang Huynh <dang.huynh@mainlining.org>
> ---
> drivers/gpio/gpio-rda.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpio/gpio-rda.c b/drivers/gpio/gpio-rda.c
> index b4db8553a2371ae407fdb7e681d0f82c4d9f74b7..56aaa9f33d29469dfb1bf86ed7b63c54b413c89c 100644
> --- a/drivers/gpio/gpio-rda.c
> +++ b/drivers/gpio/gpio-rda.c
> @@ -245,7 +245,7 @@ static int rda_gpio_probe(struct platform_device *pdev)
> .clr = rda_gpio->base + RDA_GPIO_CLR,
> .dirout = rda_gpio->base + RDA_GPIO_OEN_SET_OUT,
> .dirin = rda_gpio->base + RDA_GPIO_OEN_SET_IN,
> - .flags = BGPIOF_READ_OUTPUT_REG_SET,
> + .flags = BGPIOF_READ_OUTPUT_REG_SET | BGPIOF_UNREADABLE_REG_DIR,
> };
>
> ret = gpio_generic_chip_init(&rda_gpio->chip, &config);
>
> --
> 2.51.0
>
>
>
^ permalink raw reply
* Re: [PATCH 00/25] RDA8810PL Clock, RTC and MMC driver
From: Manivannan Sadhasivam @ 2025-09-17 10:03 UTC (permalink / raw)
To: dang.huynh
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Linus Walleij,
Bartosz Golaszewski, Alexandre Belloni, Michael Turquette,
Stephen Boyd, Philipp Zabel, Sebastian Reichel, Vinod Koul,
Kees Cook, Gustavo A. R. Silva, Ulf Hansson, linux-arm-kernel,
linux-unisoc, devicetree, linux-kernel, linux-gpio, linux-rtc,
linux-clk, linux-pm, dmaengine, linux-hardening, linux-mmc
In-Reply-To: <20250917-rda8810pl-drivers-v1-0-9ca9184ca977@mainlining.org>
On Wed, Sep 17, 2025 at 03:24:57AM GMT, Dang Huynh via B4 Relay wrote:
> This patch series aims to add support for Clock/Reset, Real-Time Clock and
> SDMMC on the RDA Micro RDA8810PL platform.
>
> It also adds Intelligent Flow Controller (IOW, a DMA controller) which is
> important for working with this MMC IP.
>
> Tested on the Orange Pi 2G-IOT.
>
Thanks for work! Is it possible to split this patchset logically to ease
reviewing and also merging? It currently touches different subsystems and has 25
patches.
You could easily split this into different series adding Clock/Reset, RTC, IFC,
SDMMC and other misc patches in one series.
- Mani
> Signed-off-by: Dang Huynh <dang.huynh@mainlining.org>
> ---
> Dang Huynh (25):
> ARM: dts: unisoc: rda8810pl: Add label to GPIO nodes
> drivers: gpio: rda: Make IRQ optional
> dt-bindings: gpio: rda: Make interrupts optional
> rtc: Add timestamp for the end of 2127
> dt-bindings: rtc: Add RDA Micro RDA8810PL RTC
> rtc: Add driver for RDA Micro SoC
> ARM: dts: unisoc: rda8810pl: Enable Real-Time Clock
> ARM: dts: unisoc: rda8810pl: Enable ARM PMU
> dt-bindings: clock: Add RDA Micro RDA8810PL clock/reset controller
> drivers: clk: Add Clock and Reset Driver for RDA Micro RDA8810PL SoC
> dts: unisoc: rda8810pl: Enable clock/reset driver
> dts: unisoc: rda8810pl: Add OPP for CPU and define L2 cache
> dts: unisoc: orangepi: Disable UART with no users
> dt-bindings: power: reset: Add RDA Micro Modem Reset
> power: reset: Add basic power reset driver for RDA8810PL
> dts: unisoc: rda8810pl: Enable modem reset
> drivers: gpio: rda: Make direction register unreadable
> dt-bindings: dma: Add RDA IFC DMA
> dmaengine: Add RDA IFC driver
> dts: unisoc: rda8810pl: Enable IFC
> dt-bindings: mmc: Add RDA SDMMC controller
> mmc: host: Add RDA Micro SD/MMC driver
> dts: unisoc: rda8810pl: Add SDMMC controllers
> dts: unisoc: orangepi-2g: Enable SD Card
> dts: unisoc: orangepi-i96: Enable SD Card
>
> .../bindings/clock/rda,8810pl-apsyscon.yaml | 44 ++
> Documentation/devicetree/bindings/dma/rda,ifc.yaml | 42 +
> .../devicetree/bindings/gpio/gpio-rda.yaml | 3 -
> Documentation/devicetree/bindings/mmc/rda,mmc.yaml | 91 +++
> .../bindings/power/reset/rda,md-reset.yaml | 36 +
> .../devicetree/bindings/rtc/rda,8810pl-rtc.yaml | 30 +
> MAINTAINERS | 30 +
> .../boot/dts/unisoc/rda8810pl-orangepi-2g-iot.dts | 24 +-
> .../arm/boot/dts/unisoc/rda8810pl-orangepi-i96.dts | 24 +-
> arch/arm/boot/dts/unisoc/rda8810pl.dtsi | 115 ++-
> drivers/clk/Kconfig | 1 +
> drivers/clk/Makefile | 1 +
> drivers/clk/rda/Kconfig | 14 +
> drivers/clk/rda/Makefile | 2 +
> drivers/clk/rda/clk-rda8810.c | 770 +++++++++++++++++++
> drivers/dma/Kconfig | 10 +
> drivers/dma/Makefile | 1 +
> drivers/dma/rda-ifc.c | 450 +++++++++++
> drivers/gpio/gpio-rda.c | 4 +-
> drivers/mmc/host/Kconfig | 12 +
> drivers/mmc/host/Makefile | 1 +
> drivers/mmc/host/rda-mmc.c | 853 +++++++++++++++++++++
> drivers/power/reset/Kconfig | 9 +
> drivers/power/reset/Makefile | 1 +
> drivers/power/reset/rda-reboot.c | 58 ++
> drivers/rtc/Kconfig | 11 +
> drivers/rtc/Makefile | 1 +
> drivers/rtc/rtc-rda.c | 356 +++++++++
> include/dt-bindings/clock/rda,8810pl-apclk.h | 79 ++
> include/dt-bindings/dma/rda-ifc.h | 28 +
> include/linux/rtc.h | 1 +
> 31 files changed, 3079 insertions(+), 23 deletions(-)
> ---
> base-commit: 590b221ed4256fd6c34d3dea77aa5bd6e741bbc1
> change-id: 20250916-rda8810pl-drivers-9a5271452635
>
> Best regards,
> --
> Dang Huynh <dang.huynh@mainlining.org>
>
>
--
மணிவண்ணன் சதாசிவம்
^ permalink raw reply
* [PATCH RESEND v5 0/2] Samsung S2MPG10 PMIC MFD-based drivers
From: André Draszik @ 2025-09-17 14:39 UTC (permalink / raw)
To: Krzysztof Kozlowski, Lee Jones, Rob Herring, Conor Dooley,
Sylwester Nawrocki, Chanwoo Choi, Alim Akhtar, Michael Turquette,
Stephen Boyd, Russell King, Catalin Marinas, Will Deacon,
Alexandre Belloni
Cc: Peter Griffin, Tudor Ambarus, Will McVicker, kernel-team,
linux-kernel, linux-samsung-soc, devicetree, linux-clk,
linux-arm-kernel, linux-rtc, André Draszik,
Krzysztof Kozlowski
Original cover letter further down.
This is a resend of two patches from the original series that haven't
been merged yet. That series was merged except for the attached two
patches here. Other than rebasing against next-20250729 there are no
changes to them.
Lee, I think Stephen's intention was to get these two merged via the
MFD tree please.
Original cover letter:
----------------------
This series adds initial support for the Samsung S2MPG10 PMIC using the
MFD framework. This is a PMIC for mobile applications and is used on
the Google Pixel 6 and 6 Pro (oriole / raven).
*** dependency note ***
To compile, this depends on the Samsung ACPM driver in Linux next with
the following additional patches:
https://lore.kernel.org/all/20250324-acpm-atomic-v2-0-7d87746e1765@linaro.org/
https://lore.kernel.org/all/20250319-acpm-fixes-v2-0-ac2c1bcf322b@linaro.org/
https://lore.kernel.org/all/20250327-acpm-children-v1-0-0afe15ee2ff7@linaro.org/
*** dependency note end ***
+++ Kconfig update +++
There is a Kconfig symbol update in this series, because the existing
Samsung S2M driver has been split into core and transport (I2C & ACPM)
parts. CONFIG_MFD_SEC_CORE is now truly a core driver, and
the I2C code that was part of it is now enabled via CONFIG_MFD_SEC_I2C.
This was necessary because unlike the other S2M PMICs, S2MPG10 doesn't
talk via I2C, but via the Samsung ACPM firmware.
+++ Kconfig update end +++
This series must be applied in-order, due to interdependencies of some
of the patches. There are also various cleanup patches to the S2M
drivers. I've kept them ordered as:
* DT bindings (patches 1 ... 3)
* s2m mfd prep for adding S2MPG10 support (patches 4 ... 7)
* split S2M mfd driver into s2m-core and s2m-i2c, including the
kconfig symbol update (patch 8)
* S2MPG10 core driver (patch 9)
* s2m mfd driver cleanup patches (patches 10 ... 23)
* S2MPG10 clock driver (patch 24)
* s2m RTC prep for adding S2MPG10 (patch 25 ... 26)
* S2MPG10 RTC driver (patch 27)
* s2m RTC cleanup patches (patches 28 ... 31)
I realise these are many, but since some prep-work was required to be
able to add S2MPG anyway, I wanted to get the cleanup patches in as
well :-) Let me know if I should postpone them to a later date instead.
The S2MPG10 includes buck converters, various LDOs, power meters, RTC,
clock outputs, and additional GPIOs interfaces.
This series adds support in the top-level device driver, and for the
RTC and clock. Importantly, having the RTC driver allows to do a proper
reset of the system. Drivers or driver updates for the other components
will be added in future patches.
This will need a DT update for Oriole / Raven to enable this device. I
will send that out separately.
Cheers,
Andre'
Signed-off-by: André Draszik <andre.draszik@linaro.org>
---
Changes in v5:
- just a rebase & resend of the last two remaining patches
- no other changes
- Link to v4: https://lore.kernel.org/r/20250409-s2mpg10-v4-0-d66d5f39b6bf@linaro.org
Changes in v4:
- various updates to sec-acpm (patch 9, Lee)
- cache enum type in patch 25 (Krzysztof)
- collect tags
- Link to v3: https://lore.kernel.org/r/20250403-s2mpg10-v3-0-b542b3505e68@linaro.org
Changes in v3:
- Krzysztof:
- keep 'regulators' subnode required even for s2mpg10
- drop '$ref' and 'unevaluatedProperties' from pmic subnode, use
'additionalProperties' instead
- add some regulators to examples since s2mpg10 requires them as of
v3
- sec-acpm:
- use an enum for struct sec_acpm_bus_context::type
- consistent name space for all functions sec_pmic_acpm_... to be
similar to i2c and consistent in this file
- Link to v2: https://lore.kernel.org/r/20250328-s2mpg10-v2-0-b54dee33fb6b@linaro.org
Changes in v2:
- Rob:
- make PMIC node a child of ACPM, and all related changes (binding,
driver)
- Krzysztof:
- merge defconfig updates into patch changing the symbols (patch 8)
- split MODULE_AUTHOR update into a separate patch
- better alignment fix (patch 11)
- merge two s2dos05/s2mpu05 related patches into one (patch 14)
- myself:
- keep PMIC DT parsing in core, not in transport driver
- several updates in sec-acpm.c, see separate entries in patch 9
- fix typo in patch 17
- collect tags
- Link to v1: https://lore.kernel.org/r/20250323-s2mpg10-v1-0-d08943702707@linaro.org
---
André Draszik (2):
dt-bindings: clock: samsung,s2mps11: add s2mpg10
clk: s2mps11: add support for S2MPG10 PMIC clock
Documentation/devicetree/bindings/clock/samsung,s2mps11.yaml | 1 +
drivers/clk/clk-s2mps11.c | 8 ++++++++
2 files changed, 9 insertions(+)
---
base-commit: 54efec8782214652b331c50646013f8526570e8d
change-id: 20250321-s2mpg10-ef5d1ebd3043
Best regards,
--
André Draszik <andre.draszik@linaro.org>
^ permalink raw reply
* [PATCH RESEND v5 1/2] dt-bindings: clock: samsung,s2mps11: add s2mpg10
From: André Draszik @ 2025-09-17 14:39 UTC (permalink / raw)
To: Krzysztof Kozlowski, Lee Jones, Rob Herring, Conor Dooley,
Sylwester Nawrocki, Chanwoo Choi, Alim Akhtar, Michael Turquette,
Stephen Boyd, Russell King, Catalin Marinas, Will Deacon,
Alexandre Belloni
Cc: Peter Griffin, Tudor Ambarus, Will McVicker, kernel-team,
linux-kernel, linux-samsung-soc, devicetree, linux-clk,
linux-arm-kernel, linux-rtc, André Draszik
In-Reply-To: <20250917-s2mpg10-v5-0-9f9c9c4a44d9@linaro.org>
The Samsung S2MPG10 clock controller is similar to the existing clock
controllers supported by this binding. Register offsets / layout are
slightly different, so it needs its own compatible.
Acked-by: Stephen Boyd <sboyd@kernel.org>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: André Draszik <andre.draszik@linaro.org>
---
Documentation/devicetree/bindings/clock/samsung,s2mps11.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/clock/samsung,s2mps11.yaml b/Documentation/devicetree/bindings/clock/samsung,s2mps11.yaml
index d5296e6053a1881650b8e8ff2524ea01689b7395..91d455155a606a60ed2006e57709466ae8d72664 100644
--- a/Documentation/devicetree/bindings/clock/samsung,s2mps11.yaml
+++ b/Documentation/devicetree/bindings/clock/samsung,s2mps11.yaml
@@ -25,6 +25,7 @@ description: |
properties:
compatible:
enum:
+ - samsung,s2mpg10-clk
- samsung,s2mps11-clk
- samsung,s2mps13-clk # S2MPS13 and S2MPS15
- samsung,s2mps14-clk
--
2.51.0.384.g4c02a37b29-goog
^ permalink raw reply related
* [PATCH RESEND v5 2/2] clk: s2mps11: add support for S2MPG10 PMIC clock
From: André Draszik @ 2025-09-17 14:39 UTC (permalink / raw)
To: Krzysztof Kozlowski, Lee Jones, Rob Herring, Conor Dooley,
Sylwester Nawrocki, Chanwoo Choi, Alim Akhtar, Michael Turquette,
Stephen Boyd, Russell King, Catalin Marinas, Will Deacon,
Alexandre Belloni
Cc: Peter Griffin, Tudor Ambarus, Will McVicker, kernel-team,
linux-kernel, linux-samsung-soc, devicetree, linux-clk,
linux-arm-kernel, linux-rtc, André Draszik,
Krzysztof Kozlowski
In-Reply-To: <20250917-s2mpg10-v5-0-9f9c9c4a44d9@linaro.org>
Add support for Samsung's S2MPG10 PMIC clock, which is similar to the
existing PMIC clocks supported by this driver.
S2MPG10 has three clock outputs @ 32kHz: AP, peri1 and peri2.
Acked-by: Stephen Boyd <sboyd@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: André Draszik <andre.draszik@linaro.org>
---
drivers/clk/clk-s2mps11.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/clk/clk-s2mps11.c b/drivers/clk/clk-s2mps11.c
index d4e9c3577b35dec8d9ec67c489b7b5ae27211f55..ff7ce12a5da6b437b5c92b9a32dcaf9423647cde 100644
--- a/drivers/clk/clk-s2mps11.c
+++ b/drivers/clk/clk-s2mps11.c
@@ -11,6 +11,7 @@
#include <linux/regmap.h>
#include <linux/clk-provider.h>
#include <linux/platform_device.h>
+#include <linux/mfd/samsung/s2mpg10.h>
#include <linux/mfd/samsung/s2mps11.h>
#include <linux/mfd/samsung/s2mps13.h>
#include <linux/mfd/samsung/s2mps14.h>
@@ -140,6 +141,9 @@ static int s2mps11_clk_probe(struct platform_device *pdev)
clk_data->num = S2MPS11_CLKS_NUM;
switch (hwid) {
+ case S2MPG10:
+ s2mps11_reg = S2MPG10_PMIC_RTCBUF;
+ break;
case S2MPS11X:
s2mps11_reg = S2MPS11_REG_RTC_CTRL;
break;
@@ -221,6 +225,7 @@ static void s2mps11_clk_remove(struct platform_device *pdev)
}
static const struct platform_device_id s2mps11_clk_id[] = {
+ { "s2mpg10-clk", S2MPG10},
{ "s2mps11-clk", S2MPS11X},
{ "s2mps13-clk", S2MPS13X},
{ "s2mps14-clk", S2MPS14X},
@@ -241,6 +246,9 @@ MODULE_DEVICE_TABLE(platform, s2mps11_clk_id);
*/
static const struct of_device_id s2mps11_dt_match[] __used = {
{
+ .compatible = "samsung,s2mpg10-clk",
+ .data = (void *)S2MPG10,
+ }, {
.compatible = "samsung,s2mps11-clk",
.data = (void *)S2MPS11X,
}, {
--
2.51.0.384.g4c02a37b29-goog
^ permalink raw reply related
* Re: [PATCH 09/25] dt-bindings: clock: Add RDA Micro RDA8810PL clock/reset controller
From: Conor Dooley @ 2025-09-17 20:40 UTC (permalink / raw)
To: Dang Huynh
Cc: Manivannan Sadhasivam, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Linus Walleij, Bartosz Golaszewski,
Alexandre Belloni, Michael Turquette, Stephen Boyd, Philipp Zabel,
Sebastian Reichel, Vinod Koul, Kees Cook, Gustavo A. R. Silva,
Ulf Hansson, linux-arm-kernel, linux-unisoc, devicetree,
linux-kernel, linux-gpio, linux-rtc, linux-clk, linux-pm,
dmaengine, linux-hardening, linux-mmc
In-Reply-To: <20250917-rda8810pl-drivers-v1-9-74866def1fe3@mainlining.org>
[-- Attachment #1: Type: text/plain, Size: 4076 bytes --]
On Wed, Sep 17, 2025 at 03:07:26AM +0700, Dang Huynh wrote:
> Add documentation describing the RDA8810PL Clock and Reset
> controller.
>
> Signed-off-by: Dang Huynh <dang.huynh@mainlining.org>
> ---
> .../bindings/clock/rda,8810pl-apsyscon.yaml | 44 ++++++++++++
> include/dt-bindings/clock/rda,8810pl-apclk.h | 79 ++++++++++++++++++++++
> 2 files changed, 123 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/clock/rda,8810pl-apsyscon.yaml b/Documentation/devicetree/bindings/clock/rda,8810pl-apsyscon.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..988b609403a96abc4964ab366daa6fec0514595c
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/rda,8810pl-apsyscon.yaml
> @@ -0,0 +1,44 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/rda,8810pl-apsyscon.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: RDA Micro RDA8810PL AP Clock Controller
> +
> +maintainers:
> + - Dang Huynh <dang.huynh@mainlining.org>
> +
> +properties:
> + compatible:
> + items:
> + - const: rda,8810pl-apsyscon
> + - const: syscon
> +
> + reg:
> + maxItems: 1
> +
> + '#clock-cells':
> + const: 1
> +
> + '#reset-cells':
> + const: 1
> +
> +required:
> + - compatible
> + - reg
> + - "#clock-cells"
> + - "#reset-cells"
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/rda,8810pl-apclk.h>
> +
> + ap_syscon: syscon@0 {
Drop the ap_syscon label, since it is unused.
> + compatible = "rda,8810pl-apsyscon", "syscon";
> + reg = <0x0 0x1000>;
> + #clock-cells = <1>;
> + #reset-cells = <1>;
> + };
> diff --git a/include/dt-bindings/clock/rda,8810pl-apclk.h b/include/dt-bindings/clock/rda,8810pl-apclk.h
> new file mode 100644
> index 0000000000000000000000000000000000000000..372358e72436a28c0775519f49626c9c5f4c6046
> --- /dev/null
> +++ b/include/dt-bindings/clock/rda,8810pl-apclk.h
> @@ -0,0 +1,79 @@
> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
> +
> +#ifndef _DT_BINDINGS_CLK_RDA8810_H_
> +#define _DT_BINDINGS_CLK_RDA8810_H_
> +
> +/* soc clocks */
> +#define CLK_CPU 0
> +#define CLK_BUS 1
> +#define CLK_MEM 2
> +
> +#define CLK_USB 3
> +#define CLK_AXI 4
> +#define CLK_GCG 5
> +#define CLK_AHB1 6
> +#define CLK_APB1 7
> +#define CLK_APB2 8
> +
> +#define CLK_GPU 9
> +#define CLK_VPU 10
> +#define CLK_VOC 11
> +#define CLK_SFLSH 12
> +
> +#define CLK_UART1 13
> +#define CLK_UART2 14
> +#define CLK_UART3 15
> +
> +#define CLK_VOC2 16
> +#define CLK_EMMC 17
> +
> +#define CLK_COUNT (CLK_EMMC + 1)
This is not permitted, if you need this define please add it to
the driver directly.
> +
> +/* resets */
> +#define RST_CPU 0
> +
> +#define RST_AXI_VOC 1
> +#define RST_AXI_DMA 2
> +#define RST_AXI_CONNECT 3
> +#define RST_AXI_VPU 4
> +
> +#define RST_GCG_GOUDA 5
> +#define RST_GCG_CAMERA 6
> +#define RST_GCG_LCDC 7
> +
> +#define RST_AHB1_USBC 8
> +#define RST_AHB1_SPIFLASH 9
> +
> +#define RST_APB1_TIMER 10
> +#define RST_APB1_KEYPAD 11
> +#define RST_APB1_GPIO 12
> +#define RST_APB1_PWM 13
> +#define RST_APB1_AIF 14
> +#define RST_APB1_AUIFC 15
> +#define RST_APB1_I2C1 16
> +#define RST_APB1_I2C2 17
> +#define RST_APB1_I2C3 18
> +#define RST_APB1_COMREGS 19
> +#define RST_APB1_DMC 20
> +#define RST_APB1_DDRPHY_P 21
> +
> +#define RST_APB2_IFC 22
> +#define RST_APB2_UART1 23
> +#define RST_APB2_UART2 24
> +#define RST_APB2_UART3 25
> +#define RST_APB2_SPI1 26
> +#define RST_APB2_SPI2 27
> +#define RST_APB2_SPI3 28
> +#define RST_APB2_SDMMC1 29
> +#define RST_APB2_SDMMC2 30
> +#define RST_APB2_SDMMC3 31
> +#define RST_APB2_NAND 32
> +
> +#define RST_MEM_GPU 33
> +#define RST_MEM_VPU 34
> +#define RST_MEM_DMC 35
> +#define RST_MEM_DDRPHY_P 36
> +
> +#define RST_COUNT (RST_MEM_DDRPHY_P + 1)
Ditto here.
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
^ permalink raw reply
* Re: [PATCH 05/25] dt-bindings: rtc: Add RDA Micro RDA8810PL RTC
From: Conor Dooley @ 2025-09-17 20:46 UTC (permalink / raw)
To: Dang Huynh
Cc: Manivannan Sadhasivam, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Linus Walleij, Bartosz Golaszewski,
Alexandre Belloni, Michael Turquette, Stephen Boyd, Philipp Zabel,
Sebastian Reichel, Vinod Koul, Kees Cook, Gustavo A. R. Silva,
Ulf Hansson, linux-arm-kernel, linux-unisoc, devicetree,
linux-kernel, linux-gpio, linux-rtc, linux-clk, linux-pm,
dmaengine, linux-hardening, linux-mmc
In-Reply-To: <20250917-rda8810pl-drivers-v1-5-74866def1fe3@mainlining.org>
[-- Attachment #1: Type: text/plain, Size: 1607 bytes --]
On Wed, Sep 17, 2025 at 03:07:22AM +0700, Dang Huynh wrote:
> Add documentation describing the RTC found in RDA8810PL SoC.
>
> Signed-off-by: Dang Huynh <dang.huynh@mainlining.org>
> ---
> .../devicetree/bindings/rtc/rda,8810pl-rtc.yaml | 30 ++++++++++++++++++++++
> 1 file changed, 30 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/rtc/rda,8810pl-rtc.yaml b/Documentation/devicetree/bindings/rtc/rda,8810pl-rtc.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..3ceae294921cc3211cd775d9b3890393196faf82
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/rtc/rda,8810pl-rtc.yaml
> @@ -0,0 +1,30 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/rtc/rda,8810pl-rtc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: RDA Micro RDA8810PL Real Time Clock
> +
> +maintainers:
> + - Dang Huynh <dang.huynh@mainlining.org>
> +
> +properties:
> + compatible:
> + const: rda,8810pl-rtc
> +
> + reg:
> + maxItems: 1
> +
> +required:
> + - compatible
> + - reg
Your driver implements functions that turn on an alarm irq, but there is
none mentioned here. What's going on there?
Additionally, there's no clocks property? For an onboard RTC I'd have
expected there to be a clock sourced outside of the block.
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + rtc@1a06000 {
> + compatible = "rda,8810pl-rtc";
> + reg = <0x1a06000 0x1000>;
> + };
>
> --
> 2.51.0
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
^ permalink raw reply
* Re: [PATCH 03/25] dt-bindings: gpio: rda: Make interrupts optional
From: Conor Dooley @ 2025-09-17 20:47 UTC (permalink / raw)
To: Dang Huynh
Cc: Manivannan Sadhasivam, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Linus Walleij, Bartosz Golaszewski,
Alexandre Belloni, Michael Turquette, Stephen Boyd, Philipp Zabel,
Sebastian Reichel, Vinod Koul, Kees Cook, Gustavo A. R. Silva,
Ulf Hansson, linux-arm-kernel, linux-unisoc, devicetree,
linux-kernel, linux-gpio, linux-rtc, linux-clk, linux-pm,
dmaengine, linux-hardening, linux-mmc
In-Reply-To: <20250917-rda8810pl-drivers-v1-3-74866def1fe3@mainlining.org>
[-- Attachment #1: Type: text/plain, Size: 52 bytes --]
Acked-by: Conor Dooley <conor.dooley@microchip.com>
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
^ permalink raw reply
* Re: [PATCH 05/25] dt-bindings: rtc: Add RDA Micro RDA8810PL RTC
From: Dang Huynh @ 2025-09-18 4:11 UTC (permalink / raw)
To: Conor Dooley
Cc: Manivannan Sadhasivam, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Linus Walleij, Bartosz Golaszewski,
Alexandre Belloni, Michael Turquette, Stephen Boyd, Philipp Zabel,
Sebastian Reichel, Vinod Koul, Kees Cook, Gustavo A. R. Silva,
Ulf Hansson, linux-arm-kernel, linux-unisoc, devicetree,
linux-kernel, linux-gpio, linux-rtc, linux-clk, linux-pm,
dmaengine, linux-hardening, linux-mmc
In-Reply-To: <20250917-contort-sassy-df07fd7515a0@spud>
On 2025-09-18 03:46, Conor Dooley wrote:
> On Wed, Sep 17, 2025 at 03:07:22AM +0700, Dang Huynh wrote:
>> Add documentation describing the RTC found in RDA8810PL SoC.
>>
>> Signed-off-by: Dang Huynh <dang.huynh@mainlining.org>
>> ---
>> .../devicetree/bindings/rtc/rda,8810pl-rtc.yaml | 30
>> ++++++++++++++++++++++
>> 1 file changed, 30 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/rtc/rda,8810pl-rtc.yaml
>> b/Documentation/devicetree/bindings/rtc/rda,8810pl-rtc.yaml
>> new file mode 100644
>> index
>> 0000000000000000000000000000000000000000..3ceae294921cc3211cd775d9b3890393196faf82
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/rtc/rda,8810pl-rtc.yaml
>> @@ -0,0 +1,30 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/rtc/rda,8810pl-rtc.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: RDA Micro RDA8810PL Real Time Clock
>> +
>> +maintainers:
>> + - Dang Huynh <dang.huynh@mainlining.org>
>> +
>> +properties:
>> + compatible:
>> + const: rda,8810pl-rtc
>> +
>> + reg:
>> + maxItems: 1
>> +
>> +required:
>> + - compatible
>> + - reg
>
> Your driver implements functions that turn on an alarm irq, but there
> is
> none mentioned here. What's going on there?
The RTC doesn't seem to have an AP IRQ associated. I can't find any
reference to it on downstream kernel and the docs.
>
> Additionally, there's no clocks property? For an onboard RTC I'd have
> expected there to be a clock sourced outside of the block.
>
>> +
>> +additionalProperties: false
>> +
>> +examples:
>> + - |
>> + rtc@1a06000 {
>> + compatible = "rda,8810pl-rtc";
>> + reg = <0x1a06000 0x1000>;
>> + };
>>
>> --
>> 2.51.0
^ permalink raw reply
* Re: [PATCH 00/25] RDA8810PL Clock, RTC and MMC driver
From: Dang Huynh @ 2025-09-18 5:02 UTC (permalink / raw)
To: Manivannan Sadhasivam
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Linus Walleij,
Bartosz Golaszewski, Alexandre Belloni, Michael Turquette,
Stephen Boyd, Philipp Zabel, Sebastian Reichel, Vinod Koul,
Kees Cook, Gustavo A. R. Silva, Ulf Hansson, linux-arm-kernel,
linux-unisoc, devicetree, linux-kernel, linux-gpio, linux-rtc,
linux-clk, linux-pm, dmaengine, linux-hardening, linux-mmc
In-Reply-To: <lnfervvwctvemjdmyue2aohlsqpfd5gsuzjho3u6mtdtewl4vr@saqnionh72am>
On 2025-09-17 17:03, Manivannan Sadhasivam wrote:
> On Wed, Sep 17, 2025 at 03:24:57AM GMT, Dang Huynh via B4 Relay wrote:
>> This patch series aims to add support for Clock/Reset, Real-Time Clock
>> and
>> SDMMC on the RDA Micro RDA8810PL platform.
>>
>> It also adds Intelligent Flow Controller (IOW, a DMA controller) which
>> is
>> important for working with this MMC IP.
>>
>> Tested on the Orange Pi 2G-IOT.
>>
>
> Thanks for work! Is it possible to split this patchset logically to
> ease
> reviewing and also merging? It currently touches different subsystems
> and has 25
> patches.
>
> You could easily split this into different series adding Clock/Reset,
> RTC, IFC,
> SDMMC and other misc patches in one series.
Will do. Is it possible for you to test it on your i96 board?
>
> - Mani
>
>> Signed-off-by: Dang Huynh <dang.huynh@mainlining.org>
>> ---
>> Dang Huynh (25):
>> ARM: dts: unisoc: rda8810pl: Add label to GPIO nodes
>> drivers: gpio: rda: Make IRQ optional
>> dt-bindings: gpio: rda: Make interrupts optional
>> rtc: Add timestamp for the end of 2127
>> dt-bindings: rtc: Add RDA Micro RDA8810PL RTC
>> rtc: Add driver for RDA Micro SoC
>> ARM: dts: unisoc: rda8810pl: Enable Real-Time Clock
>> ARM: dts: unisoc: rda8810pl: Enable ARM PMU
>> dt-bindings: clock: Add RDA Micro RDA8810PL clock/reset
>> controller
>> drivers: clk: Add Clock and Reset Driver for RDA Micro RDA8810PL
>> SoC
>> dts: unisoc: rda8810pl: Enable clock/reset driver
>> dts: unisoc: rda8810pl: Add OPP for CPU and define L2 cache
>> dts: unisoc: orangepi: Disable UART with no users
>> dt-bindings: power: reset: Add RDA Micro Modem Reset
>> power: reset: Add basic power reset driver for RDA8810PL
>> dts: unisoc: rda8810pl: Enable modem reset
>> drivers: gpio: rda: Make direction register unreadable
>> dt-bindings: dma: Add RDA IFC DMA
>> dmaengine: Add RDA IFC driver
>> dts: unisoc: rda8810pl: Enable IFC
>> dt-bindings: mmc: Add RDA SDMMC controller
>> mmc: host: Add RDA Micro SD/MMC driver
>> dts: unisoc: rda8810pl: Add SDMMC controllers
>> dts: unisoc: orangepi-2g: Enable SD Card
>> dts: unisoc: orangepi-i96: Enable SD Card
>>
>> .../bindings/clock/rda,8810pl-apsyscon.yaml | 44 ++
>> Documentation/devicetree/bindings/dma/rda,ifc.yaml | 42 +
>> .../devicetree/bindings/gpio/gpio-rda.yaml | 3 -
>> Documentation/devicetree/bindings/mmc/rda,mmc.yaml | 91 +++
>> .../bindings/power/reset/rda,md-reset.yaml | 36 +
>> .../devicetree/bindings/rtc/rda,8810pl-rtc.yaml | 30 +
>> MAINTAINERS | 30 +
>> .../boot/dts/unisoc/rda8810pl-orangepi-2g-iot.dts | 24 +-
>> .../arm/boot/dts/unisoc/rda8810pl-orangepi-i96.dts | 24 +-
>> arch/arm/boot/dts/unisoc/rda8810pl.dtsi | 115 ++-
>> drivers/clk/Kconfig | 1 +
>> drivers/clk/Makefile | 1 +
>> drivers/clk/rda/Kconfig | 14 +
>> drivers/clk/rda/Makefile | 2 +
>> drivers/clk/rda/clk-rda8810.c | 770
>> +++++++++++++++++++
>> drivers/dma/Kconfig | 10 +
>> drivers/dma/Makefile | 1 +
>> drivers/dma/rda-ifc.c | 450 +++++++++++
>> drivers/gpio/gpio-rda.c | 4 +-
>> drivers/mmc/host/Kconfig | 12 +
>> drivers/mmc/host/Makefile | 1 +
>> drivers/mmc/host/rda-mmc.c | 853
>> +++++++++++++++++++++
>> drivers/power/reset/Kconfig | 9 +
>> drivers/power/reset/Makefile | 1 +
>> drivers/power/reset/rda-reboot.c | 58 ++
>> drivers/rtc/Kconfig | 11 +
>> drivers/rtc/Makefile | 1 +
>> drivers/rtc/rtc-rda.c | 356 +++++++++
>> include/dt-bindings/clock/rda,8810pl-apclk.h | 79 ++
>> include/dt-bindings/dma/rda-ifc.h | 28 +
>> include/linux/rtc.h | 1 +
>> 31 files changed, 3079 insertions(+), 23 deletions(-)
>> ---
>> base-commit: 590b221ed4256fd6c34d3dea77aa5bd6e741bbc1
>> change-id: 20250916-rda8810pl-drivers-9a5271452635
>>
>> Best regards,
>> --
>> Dang Huynh <dang.huynh@mainlining.org>
>>
>>
^ permalink raw reply
* [PATCH 0/2] rtc: optee: Fix a couple error codes
From: Dan Carpenter @ 2025-09-18 9:48 UTC (permalink / raw)
To: Clément Le Goffic
Cc: Alexandre Belloni, Clément Léger, linux-kernel,
linux-rtc
Fix a couple error codes detected by Smatch.
Dan Carpenter (2):
rtc: optee: fix error code in probe()
rtc: optee: Fix error code in optee_rtc_read_alarm()
drivers/rtc/rtc-optee.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
--
2.51.0
^ permalink raw reply
* [PATCH 1/2] rtc: optee: fix error code in probe()
From: Dan Carpenter @ 2025-09-18 9:49 UTC (permalink / raw)
To: Clément Le Goffic
Cc: Clément Léger, Alexandre Belloni, linux-rtc,
linux-kernel
In-Reply-To: <cover.1758182509.git.dan.carpenter@linaro.org>
Return an error code if kthread_create() fails. Currently the code
returns success.
Fixes: 6266aea864fa ("rtc: optee: add alarm related rtc ops to optee rtc driver")
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
---
drivers/rtc/rtc-optee.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/rtc/rtc-optee.c b/drivers/rtc/rtc-optee.c
index 27db403e3047..7b44d7723cae 100644
--- a/drivers/rtc/rtc-optee.c
+++ b/drivers/rtc/rtc-optee.c
@@ -614,6 +614,7 @@ static int optee_rtc_probe(struct device *dev)
priv, "rtc_alarm_evt");
if (IS_ERR(priv->alarm_task)) {
dev_err(dev, "Failed to create alarm thread\n");
+ err = PTR_ERR(priv->alarm_task);
goto out_shm;
}
--
2.51.0
^ permalink raw reply related
* [PATCH 2/2] rtc: optee: Fix error code in optee_rtc_read_alarm()
From: Dan Carpenter @ 2025-09-18 9:49 UTC (permalink / raw)
To: Clément Le Goffic
Cc: Clément Léger, Alexandre Belloni, linux-rtc,
linux-kernel
In-Reply-To: <cover.1758182509.git.dan.carpenter@linaro.org>
Return "optee_alarm" instead of "alarm". The "alarm" pointer is a valid
pointer and not an error pointer.
Fixes: 6266aea864fa ("rtc: optee: add alarm related rtc ops to optee rtc driver")
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
---
drivers/rtc/rtc-optee.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/rtc/rtc-optee.c b/drivers/rtc/rtc-optee.c
index 7b44d7723cae..3d5662aa1bd8 100644
--- a/drivers/rtc/rtc-optee.c
+++ b/drivers/rtc/rtc-optee.c
@@ -299,7 +299,7 @@ static int optee_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
optee_alarm = tee_shm_get_va(priv->shm, 0);
if (IS_ERR(optee_alarm))
- return PTR_ERR(alarm);
+ return PTR_ERR(optee_alarm);
if (param[0].u.memref.size != sizeof(*optee_alarm))
return -EPROTO;
--
2.51.0
^ permalink raw reply related
* Re: [PATCH 05/25] dt-bindings: rtc: Add RDA Micro RDA8810PL RTC
From: Conor Dooley @ 2025-09-18 15:18 UTC (permalink / raw)
To: Dang Huynh
Cc: Manivannan Sadhasivam, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Linus Walleij, Bartosz Golaszewski,
Alexandre Belloni, Michael Turquette, Stephen Boyd, Philipp Zabel,
Sebastian Reichel, Vinod Koul, Kees Cook, Gustavo A. R. Silva,
Ulf Hansson, linux-arm-kernel, linux-unisoc, devicetree,
linux-kernel, linux-gpio, linux-rtc, linux-clk, linux-pm,
dmaengine, linux-hardening, linux-mmc
In-Reply-To: <c905fb3ace281280f1ac11c7fbe8e0aa@mainlining.org>
[-- Attachment #1: Type: text/plain, Size: 2104 bytes --]
On Thu, Sep 18, 2025 at 11:11:10AM +0700, Dang Huynh wrote:
> On 2025-09-18 03:46, Conor Dooley wrote:
> > On Wed, Sep 17, 2025 at 03:07:22AM +0700, Dang Huynh wrote:
> > > Add documentation describing the RTC found in RDA8810PL SoC.
> > >
> > > Signed-off-by: Dang Huynh <dang.huynh@mainlining.org>
> > > ---
> > > .../devicetree/bindings/rtc/rda,8810pl-rtc.yaml | 30
> > > ++++++++++++++++++++++
> > > 1 file changed, 30 insertions(+)
> > >
> > > diff --git
> > > a/Documentation/devicetree/bindings/rtc/rda,8810pl-rtc.yaml
> > > b/Documentation/devicetree/bindings/rtc/rda,8810pl-rtc.yaml
> > > new file mode 100644
> > > index 0000000000000000000000000000000000000000..3ceae294921cc3211cd775d9b3890393196faf82
> > > --- /dev/null
> > > +++ b/Documentation/devicetree/bindings/rtc/rda,8810pl-rtc.yaml
> > > @@ -0,0 +1,30 @@
> > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > > +%YAML 1.2
> > > +---
> > > +$id: http://devicetree.org/schemas/rtc/rda,8810pl-rtc.yaml#
> > > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > > +
> > > +title: RDA Micro RDA8810PL Real Time Clock
> > > +
> > > +maintainers:
> > > + - Dang Huynh <dang.huynh@mainlining.org>
> > > +
> > > +properties:
> > > + compatible:
> > > + const: rda,8810pl-rtc
> > > +
> > > + reg:
> > > + maxItems: 1
> > > +
> > > +required:
> > > + - compatible
> > > + - reg
> >
> > Your driver implements functions that turn on an alarm irq, but there is
> > none mentioned here. What's going on there?
> The RTC doesn't seem to have an AP IRQ associated. I can't find any
> reference to it on downstream kernel and the docs.
>
> >
> > Additionally, there's no clocks property? For an onboard RTC I'd have
> > expected there to be a clock sourced outside of the block.
What about the clock?
> >
> > > +
> > > +additionalProperties: false
> > > +
> > > +examples:
> > > + - |
> > > + rtc@1a06000 {
> > > + compatible = "rda,8810pl-rtc";
> > > + reg = <0x1a06000 0x1000>;
> > > + };
> > >
> > > --
> > > 2.51.0
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
^ permalink raw reply
* [PATCH] rtc: tegra: Add ACPI support
From: Kartik Rajput @ 2025-09-19 11:12 UTC (permalink / raw)
To: alexandre.belloni, thierry.reding, jonathanh, andriy.shevchenko,
linux-rtc, linux-tegra, linux-kernel
Cc: Kartik Rajput
Add ACPI support for Tegra RTC, which is available on Tegra241 and
Tegra410. Both Tegra241 and Tegra410 use the same ACPI ID 'NVDA0280'.
The RTC clock is configured by UEFI before the kernel boots.
Signed-off-by: Kartik Rajput <kkartik@nvidia.com>
---
drivers/rtc/rtc-tegra.c | 28 ++++++++++++++++++++--------
1 file changed, 20 insertions(+), 8 deletions(-)
diff --git a/drivers/rtc/rtc-tegra.c b/drivers/rtc/rtc-tegra.c
index 46788db89953..40617c82070f 100644
--- a/drivers/rtc/rtc-tegra.c
+++ b/drivers/rtc/rtc-tegra.c
@@ -5,6 +5,7 @@
* Copyright (c) 2010-2019, NVIDIA Corporation.
*/
+#include <linux/acpi.h>
#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/init.h>
@@ -274,6 +275,12 @@ static const struct of_device_id tegra_rtc_dt_match[] = {
};
MODULE_DEVICE_TABLE(of, tegra_rtc_dt_match);
+static const struct acpi_device_id tegra_rtc_acpi_match[] = {
+ { "NVDA0280", 0 },
+ { }
+};
+MODULE_DEVICE_TABLE(acpi, tegra_rtc_acpi_match);
+
static int tegra_rtc_probe(struct platform_device *pdev)
{
struct tegra_rtc_info *info;
@@ -300,13 +307,15 @@ static int tegra_rtc_probe(struct platform_device *pdev)
info->rtc->ops = &tegra_rtc_ops;
info->rtc->range_max = U32_MAX;
- info->clk = devm_clk_get(&pdev->dev, NULL);
- if (IS_ERR(info->clk))
- return PTR_ERR(info->clk);
+ if (is_of_node(dev_fwnode(&pdev->dev))) {
+ info->clk = devm_clk_get(&pdev->dev, NULL);
+ if (IS_ERR(info->clk))
+ return PTR_ERR(info->clk);
- ret = clk_prepare_enable(info->clk);
- if (ret < 0)
- return ret;
+ ret = clk_prepare_enable(info->clk);
+ if (ret < 0)
+ return ret;
+ }
/* set context info */
info->pdev = pdev;
@@ -338,7 +347,8 @@ static int tegra_rtc_probe(struct platform_device *pdev)
return 0;
disable_clk:
- clk_disable_unprepare(info->clk);
+ if (is_of_node(dev_fwnode(&pdev->dev)))
+ clk_disable_unprepare(info->clk);
return ret;
}
@@ -346,7 +356,8 @@ static void tegra_rtc_remove(struct platform_device *pdev)
{
struct tegra_rtc_info *info = platform_get_drvdata(pdev);
- clk_disable_unprepare(info->clk);
+ if (is_of_node(dev_fwnode(&pdev->dev)))
+ clk_disable_unprepare(info->clk);
}
#ifdef CONFIG_PM_SLEEP
@@ -404,6 +415,7 @@ static struct platform_driver tegra_rtc_driver = {
.driver = {
.name = "tegra_rtc",
.of_match_table = tegra_rtc_dt_match,
+ .acpi_match_table = tegra_rtc_acpi_match,
.pm = &tegra_rtc_pm_ops,
},
};
--
2.43.0
^ permalink raw reply related
* [PATCH v6 1/4] dt-bindings: rtc: Document NVIDIA VRS RTC
From: Shubhi Garg @ 2025-09-19 13:59 UTC (permalink / raw)
To: Lee Jones, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Catalin Marinas, Will Deacon, Alexandre Belloni, Jonathan Hunter
Cc: devicetree, linux-arm-kernel, linux-rtc, linux-tegra, Shubhi Garg
Add device tree bindings for NVIDIA VRS (Voltage Regulator Specification)
RTC device. NVIDIA VRS is a Power Management IC (PMIC) that implements a
power sequencing solution with I2C interface. The device includes RTC
which provides functionality to get/set system time, retain system
time across boot, wake system from suspend and shutdown state.
Supported platforms:
- NVIDIA Jetson AGX Orin Developer Kit
- NVIDIA IGX Orin Development Kit
- NVIDIA Jetson Orin NX Developer Kit
- NVIDIA Jetson Orin Nano Developer Kit
Signed-off-by: Shubhi Garg <shgarg@nvidia.com>
---
v6:
- compatible name fixes to "nvidia,vrs-10"
- changed dtb node name to pmic@3c
v5:
- moved device tree bindings from mfd to rtc
- changed dtb node name to rtc@3c
- changed compatible string to "nvidia,vrs10-rtc"
v4:
- no changes
v3:
- fixed device tree node name to generic "pmic@3c"
- fixed indentation
v2:
- fixed copyrights
- updated description with RTC information
- added status node in dtb node example
.../bindings/rtc/nvidia,vrs10-rtc.yaml | 59 +++++++++++++++++++
1 file changed, 59 insertions(+)
create mode 100644 Documentation/devicetree/bindings/rtc/nvidia,vrs10-rtc.yaml
diff --git a/Documentation/devicetree/bindings/rtc/nvidia,vrs10-rtc.yaml b/Documentation/devicetree/bindings/rtc/nvidia,vrs10-rtc.yaml
new file mode 100644
index 000000000000..e8f3c25607e0
--- /dev/null
+++ b/Documentation/devicetree/bindings/rtc/nvidia,vrs10-rtc.yaml
@@ -0,0 +1,59 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/rtc/nvidia,vrs10-rtc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NVIDIA Voltage Regulator Specification Real Time Clock
+
+maintainers:
+ - Shubhi Garg <shgarg@nvidia.com>
+
+description:
+ NVIDIA VRS-10 (Voltage Regulator Specification) is a Power Management IC
+ (PMIC) that implements a power sequencing solution with I2C interface.
+ The device includes a real-time clock (RTC) with 32kHz clock output and
+ backup battery support, alarm functionality for system wake-up from
+ suspend and shutdown states, OTP memory for power sequencing configuration,
+ and an interrupt controller for managing VRS events.
+
+properties:
+ compatible:
+ const: nvidia,vrs-10
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ interrupt-controller: true
+
+ '#interrupt-cells':
+ const: 2
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - interrupt-controller
+ - '#interrupt-cells'
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+ i2c {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pmic@3c {
+ compatible = "nvidia,vrs-10";
+ reg = <0x3c>;
+ interrupt-parent = <&pmc>;
+ interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ };
--
2.43.0
^ permalink raw reply related
* Re: [PATCH 06/25] rtc: Add driver for RDA Micro SoC
From: kernel test robot @ 2025-09-19 13:59 UTC (permalink / raw)
To: Dang Huynh via B4 Relay, Manivannan Sadhasivam, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Linus Walleij,
Bartosz Golaszewski, Alexandre Belloni, Michael Turquette,
Stephen Boyd, Philipp Zabel, Sebastian Reichel, Vinod Koul,
Kees Cook, Gustavo A. R. Silva, Ulf Hansson
Cc: oe-kbuild-all, linux-arm-kernel, linux-unisoc, devicetree,
linux-kernel, linux-gpio, linux-rtc, linux-clk, linux-pm,
dmaengine, linux-hardening, linux-mmc, Dang Huynh
In-Reply-To: <20250917-rda8810pl-drivers-v1-6-9ca9184ca977@mainlining.org>
Hi Dang,
kernel test robot noticed the following build errors:
[auto build test ERROR on 590b221ed4256fd6c34d3dea77aa5bd6e741bbc1]
url: https://github.com/intel-lab-lkp/linux/commits/Dang-Huynh-via-B4-Relay/ARM-dts-unisoc-rda8810pl-Add-label-to-GPIO-nodes/20250917-043025
base: 590b221ed4256fd6c34d3dea77aa5bd6e741bbc1
patch link: https://lore.kernel.org/r/20250917-rda8810pl-drivers-v1-6-9ca9184ca977%40mainlining.org
patch subject: [PATCH 06/25] rtc: Add driver for RDA Micro SoC
config: m68k-allmodconfig (https://download.01.org/0day-ci/archive/20250919/202509192152.OXdK6bpd-lkp@intel.com/config)
compiler: m68k-linux-gcc (GCC) 15.1.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250919/202509192152.OXdK6bpd-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202509192152.OXdK6bpd-lkp@intel.com/
All errors (new ones prefixed by >>):
drivers/rtc/rtc-rda.c: In function 'rda_rtc_settime':
>> drivers/rtc/rtc-rda.c:67:15: error: implicit declaration of function 'FIELD_PREP' [-Wimplicit-function-declaration]
67 | low = FIELD_PREP(RDA_SEC_MASK, tm->tm_sec) |
| ^~~~~~~~~~
drivers/rtc/rtc-rda.c: In function 'rda_rtc_readtime':
>> drivers/rtc/rtc-rda.c:128:22: error: implicit declaration of function 'FIELD_GET' [-Wimplicit-function-declaration]
128 | tm->tm_sec = FIELD_GET(RDA_SEC_MASK, low);
| ^~~~~~~~~
vim +/FIELD_PREP +67 drivers/rtc/rtc-rda.c
50
51 static int rda_rtc_settime(struct device *dev, struct rtc_time *tm)
52 {
53 struct rda_rtc *rtc = dev_get_drvdata(dev);
54 u32 high, low;
55 int ret;
56
57 ret = rtc_valid_tm(tm);
58 if (ret < 0)
59 return ret;
60
61 /*
62 * The number of years since 1900 in kernel,
63 * but it is defined since 2000 by HW.
64 * The number of mons' range is from 0 to 11 in kernel,
65 * but it is defined from 1 to 12 by HW.
66 */
> 67 low = FIELD_PREP(RDA_SEC_MASK, tm->tm_sec) |
68 FIELD_PREP(RDA_MIN_MASK, tm->tm_min) |
69 FIELD_PREP(RDA_HRS_MASK, tm->tm_hour);
70
71 high = FIELD_PREP(RDA_MDAY_MASK, tm->tm_mday) |
72 FIELD_PREP(RDA_MON_MASK, tm->tm_mon + 1) |
73 FIELD_PREP(RDA_YEAR_MASK, tm->tm_year - 100) |
74 FIELD_PREP(RDA_WDAY_MASK, tm->tm_wday);
75
76 ret = regmap_write(rtc->regmap, RDA_RTC_CAL_LOAD_LOW_REG, low);
77 if (ret < 0) {
78 dev_err(dev, "Failed to update RTC low register: %d\n", ret);
79 return ret;
80 }
81
82 ret = regmap_write(rtc->regmap, RDA_RTC_CAL_LOAD_HIGH_REG, high);
83 if (ret < 0) {
84 dev_err(dev, "Failed to update RTC low register: %d\n", ret);
85 return ret;
86 }
87
88 ret = regmap_update_bits(rtc->regmap, RDA_RTC_CMD_REG, RDA_RTC_CMD_CAL_LOAD, 1);
89 if (ret < 0) {
90 dev_err(dev, "Failed to update RTC cal load register: %d\n", ret);
91 return ret;
92 }
93
94 return 0;
95 }
96
97 static int rda_rtc_readtime(struct device *dev, struct rtc_time *tm)
98 {
99 struct rda_rtc *rtc = dev_get_drvdata(dev);
100 unsigned int high, low;
101 int ret;
102
103 /*
104 * Check if RTC data is valid.
105 *
106 * When this bit is set, it means the data in the RTC is invalid
107 * or not configured.
108 */
109 ret = regmap_test_bits(rtc->regmap, RDA_RTC_STA_REG, RDA_RTC_STA_NOT_PROG);
110 if (ret < 0) {
111 dev_err(dev, "Failed to read RTC status: %d\n", ret);
112 return ret;
113 } else if (ret > 0)
114 return -EINVAL;
115
116 ret = regmap_read(rtc->regmap, RDA_RTC_CUR_LOAD_HIGH_REG, &high);
117 if (ret) {
118 dev_err(dev, "Failed to read RTC high reg: %d\n", ret);
119 return ret;
120 }
121
122 ret = regmap_read(rtc->regmap, RDA_RTC_CUR_LOAD_LOW_REG, &low);
123 if (ret) {
124 dev_err(dev, "Failed to read RTC low reg: %d\n", ret);
125 return ret;
126 }
127
> 128 tm->tm_sec = FIELD_GET(RDA_SEC_MASK, low);
129 tm->tm_min = FIELD_GET(RDA_MIN_MASK, low);
130 tm->tm_hour = FIELD_GET(RDA_HRS_MASK, low);
131 tm->tm_mday = FIELD_GET(RDA_MDAY_MASK, high);
132 tm->tm_mon = FIELD_GET(RDA_MON_MASK, high);
133 tm->tm_year = FIELD_GET(RDA_YEAR_MASK, high);
134 tm->tm_wday = FIELD_GET(RDA_WDAY_MASK, high);
135
136 /*
137 * The number of years since 1900 in kernel,
138 * but it is defined since 2000 by HW.
139 */
140 tm->tm_year += 100;
141 /*
142 * The number of mons' range is from 0 to 11 in kernel,
143 * but it is defined from 1 to 12 by HW.
144 */
145 tm->tm_mon -= 1;
146
147 return 0;
148 }
149
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
^ permalink raw reply
* [PATCH v6 0/4] Add NVIDIA VRS RTC support
From: Shubhi Garg @ 2025-09-19 14:02 UTC (permalink / raw)
To: Lee Jones, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Catalin Marinas, Will Deacon, Alexandre Belloni, Jonathan Hunter
Cc: devicetree, linux-arm-kernel, linux-rtc, linux-tegra, Shubhi Garg
This patch series adds support for NVIDIA's Voltage Regulator Specification
(VRS) RTC device. It provides following features:
- read/set system time
- 32kHz clock support with backup battery input to retain system time
across boot
- alarm functionality to wake system from suspend and shutdown state
The series includes:
- Device tree bindings for the VRS RTC
- VRS device tree nodes for NVIDIA platforms
- VRS RTC device driver
- Configuration updates to enable the driver
Changes in v6:
- compatible name fixes to "nvidia,vrs-10"
- changed dtb node name to pmic@3c
Changes in v5:
- moved device tree bindings from mfd to rtc
- changed dtb node name to rtc@3c
- removed VRS MFD driver
- moved VRS common functions to RTC driver
- removed unused register definitions from header
- changed driver compatible to "nvidia,vrs10-rtc"
Changes in v4:
- fixed device tree node name to "pmic@3c" in dtb aliases
Changes in v3:
- fixed device tree node name to generic "pmic@3c"
- fixed indentation in dt-bindings
- added rate limiting to interrupt clearing debug logs
- removed unnecessary braces in if blocks
- changed dependency from I2C=y to I2C in mfd Kconfig
- fixed return value in RTC driver function calls
- fixed sizeof(*variable) inside rtc driver devm_kzalloc
- switch to devm_device_init_wakeup() for automatic cleanup
Changes in v2:
- fixed, copyrights, definitions and dtb node in dt-bindings
- removed unnecessary logs from MFD and RTC driver
- fixed RTC allocation and registration APIs
- removed unnecessary functions in RTC driver
- used rtc_lock/unlock in RTC irq handler
- added alias to assign VRS RTC as RTC0
- added driver entry in MAINTAINERS
- few other miinor changes done in drivers
Shubhi Garg (4):
dt-bindings: rtc: Document NVIDIA VRS RTC
arm64: tegra: Add device-tree node for NVVRS RTC
rtc: nvvrs: add NVIDIA VRS RTC device driver
arm64: defconfig: enable NVIDIA VRS PSEQ RTC
.../bindings/rtc/nvidia,vrs10-rtc.yaml | 59 ++
MAINTAINERS | 8 +
.../arm64/boot/dts/nvidia/tegra234-p3701.dtsi | 11 +
.../arm64/boot/dts/nvidia/tegra234-p3767.dtsi | 15 +
arch/arm64/configs/defconfig | 1 +
drivers/rtc/Kconfig | 9 +
drivers/rtc/Makefile | 1 +
drivers/rtc/rtc-nvidia-vrs10.c | 508 ++++++++++++++++++
include/linux/rtc/rtc-nvidia-vrs10.h | 78 +++
9 files changed, 690 insertions(+)
create mode 100644 Documentation/devicetree/bindings/rtc/nvidia,vrs10-rtc.yaml
create mode 100644 drivers/rtc/rtc-nvidia-vrs10.c
create mode 100644 include/linux/rtc/rtc-nvidia-vrs10.h
--
2.43.0
^ permalink raw reply
* [PATCH v6 2/4] arm64: tegra: Add device-tree node for NVVRS RTC
From: Shubhi Garg @ 2025-09-19 14:02 UTC (permalink / raw)
To: Lee Jones, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Catalin Marinas, Will Deacon, Alexandre Belloni, Jonathan Hunter
Cc: devicetree, linux-arm-kernel, linux-rtc, linux-tegra, Shubhi Garg
Add NVIDIA VRS (Voltage Regulator Specification) RTC device tree node for
Tegra234 P3701 and P3767 platforms. Assign VRS RTC as primary RTC (rtc0).
Signed-off-by: Shubhi Garg <shgarg@nvidia.com>
---
v6:
- compatible name fixes to "nvidia,vrs-10"
- changed dtb node name to pmic@3c
v5:
- changed dtb node name to rtc@3c
v4:
- fixed device tree node name to "pmic@3c" in aliases
v3:
- fixed device tree node name to generic "pmic@3c"
v2:
- added alias to assign VRS RTC to rtc0
- removed status node from VRS DTB node
arch/arm64/boot/dts/nvidia/tegra234-p3701.dtsi | 11 +++++++++++
arch/arm64/boot/dts/nvidia/tegra234-p3767.dtsi | 15 +++++++++++++++
2 files changed, 26 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra234-p3701.dtsi b/arch/arm64/boot/dts/nvidia/tegra234-p3701.dtsi
index 9086a0d010e5..58bf55c0e414 100644
--- a/arch/arm64/boot/dts/nvidia/tegra234-p3701.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra234-p3701.dtsi
@@ -8,6 +8,7 @@ / {
aliases {
mmc0 = "/bus@0/mmc@3460000";
mmc1 = "/bus@0/mmc@3400000";
+ rtc0 = "/bpmp/i2c/pmic@3c";
};
bus@0 {
@@ -170,6 +171,16 @@ bpmp {
i2c {
status = "okay";
+ pmic@3c {
+ compatible = "nvidia,vrs-10";
+ reg = <0x3c>;
+ interrupt-parent = <&pmc>;
+ /* VRS Wake ID is 24 */
+ interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
thermal-sensor@4c {
compatible = "ti,tmp451";
status = "okay";
diff --git a/arch/arm64/boot/dts/nvidia/tegra234-p3767.dtsi b/arch/arm64/boot/dts/nvidia/tegra234-p3767.dtsi
index 84db7132e8fc..ab391a71c3d3 100644
--- a/arch/arm64/boot/dts/nvidia/tegra234-p3767.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra234-p3767.dtsi
@@ -7,6 +7,7 @@ / {
aliases {
mmc0 = "/bus@0/mmc@3400000";
+ rtc0 = "/bpmp/i2c/pmic@3c";
};
bus@0 {
@@ -121,6 +122,20 @@ pmc@c360000 {
};
};
+ bpmp {
+ i2c {
+ pmic@3c {
+ compatible = "nvidia,vrs-10";
+ reg = <0x3c>;
+ interrupt-parent = <&pmc>;
+ /* VRS Wake ID is 24 */
+ interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ };
+ };
+
vdd_5v0_sys: regulator-vdd-5v0-sys {
compatible = "regulator-fixed";
regulator-name = "VDD_5V0_SYS";
--
2.43.0
^ permalink raw reply related
* [PATCH v6 3/4] rtc: nvvrs: add NVIDIA VRS RTC device driver
From: Shubhi Garg @ 2025-09-19 14:02 UTC (permalink / raw)
To: Lee Jones, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Catalin Marinas, Will Deacon, Alexandre Belloni, Jonathan Hunter
Cc: devicetree, linux-arm-kernel, linux-rtc, linux-tegra, Shubhi Garg
Add support for NVIDIA VRS (Voltage Regulator Specification) RTC device
driver. NVIDIA VRS is a Power Management IC (PMIC) that implements a
power sequencing solution with I2C interface. The device includes RTC
which provides functionality to get/set system time, retain system
time across boot, wake system from suspend and shutdown state.
Supported platforms:
- NVIDIA Jetson AGX Orin Developer Kit
- NVIDIA IGX Orin Development Kit
- NVIDIA Jetson Orin NX Developer Kit
- NVIDIA Jetson Orin Nano Developer Kit
Signed-off-by: Shubhi Garg <shgarg@nvidia.com>
---
v6:
- compatible name fixes to "nvidia,vrs-10"
v5:
- removed unused register definitions from header
- added VRS to maintainers list
- removed MFD dependency from Kconfig
- improved driver filename and CONFIG name
- handle all VRS interrupts in RTC driver
- validate chip vendor info during RTC probe
- clear any pending IRQs during RTC probe
v4:
- no changes
v3:
- fixed return value in RTC read_time and read_alarm functions
- fixed sizeof(*variable) inside rtc driver devm_kzalloc
- switch to devm_device_init_wakeup() for automatic cleanup
v2:
- removed regmap struct since it is not required
- removed rtc_map definition to directly use register definition
- removed unnecessary dev_err logs
- fixed dev_err logs to dev_dbg
- used rtc_lock/unlock in irq handler
- changed RTC allocation and register APIs as per latest kernel
- removed nvvrs_rtc_remove function since it's not required
MAINTAINERS | 8 +
drivers/rtc/Kconfig | 9 +
drivers/rtc/Makefile | 1 +
drivers/rtc/rtc-nvidia-vrs10.c | 508 +++++++++++++++++++++++++++
include/linux/rtc/rtc-nvidia-vrs10.h | 78 ++++
5 files changed, 604 insertions(+)
create mode 100644 drivers/rtc/rtc-nvidia-vrs10.c
create mode 100644 include/linux/rtc/rtc-nvidia-vrs10.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 8886d66bd824..0bd459932741 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -18347,6 +18347,14 @@ S: Maintained
F: drivers/video/fbdev/nvidia/
F: drivers/video/fbdev/riva/
+NVIDIA VRS RTC DRIVER
+M: Shubhi Garg <shgarg@nvidia.com>
+L: linux-tegra@vger.kernel.org
+S: Maintained
+F: Documentation/devicetree/bindings/rtc/nvidia,vrs10-rtc.yaml
+F: drivers/rtc/rtc-nvidia-vrs10.c
+F: include/linux/rtc/rtc-nvidia-vrs10.h
+
NVIDIA WMI EC BACKLIGHT DRIVER
M: Daniel Dadap <ddadap@nvidia.com>
L: platform-driver-x86@vger.kernel.org
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index 31d355b103d4..609f8c67f36a 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -416,6 +416,15 @@ config RTC_DRV_SPACEMIT_P1
This driver can also be built as a module, which will be called
"spacemit-p1-rtc".
+config RTC_DRV_NVIDIA_VRS10
+ tristate "NVIDIA VRS10 RTC device"
+ help
+ If you say yes here you will get support for the battery backed RTC device
+ of NVIDIA VRS (Voltage Regulator Specification). The RTC is connected via
+ I2C interface and supports alarm functionality.
+ This driver can also be built as a module. If so, the module will be called
+ rtc-nvidia-vrs10.
+
config RTC_DRV_NCT3018Y
tristate "Nuvoton NCT3018Y"
depends on OF
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index f41fdb4fabae..36ffb10cc9b7 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -120,6 +120,7 @@ obj-$(CONFIG_RTC_DRV_MXC_V2) += rtc-mxc_v2.o
obj-$(CONFIG_RTC_DRV_GAMECUBE) += rtc-gamecube.o
obj-$(CONFIG_RTC_DRV_NCT3018Y) += rtc-nct3018y.o
obj-$(CONFIG_RTC_DRV_NTXEC) += rtc-ntxec.o
+obj-$(CONFIG_RTC_DRV_NVIDIA_VRS10)+= rtc-nvidia-vrs10.o
obj-$(CONFIG_RTC_DRV_OMAP) += rtc-omap.o
obj-$(CONFIG_RTC_DRV_OPAL) += rtc-opal.o
obj-$(CONFIG_RTC_DRV_OPTEE) += rtc-optee.o
diff --git a/drivers/rtc/rtc-nvidia-vrs10.c b/drivers/rtc/rtc-nvidia-vrs10.c
new file mode 100644
index 000000000000..4c488723854c
--- /dev/null
+++ b/drivers/rtc/rtc-nvidia-vrs10.c
@@ -0,0 +1,508 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * NVIDIA Voltage Regulator Specification RTC
+ *
+ * SPDX-FileCopyrightText: Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES.
+ * All rights reserved.
+ */
+
+#include <linux/err.h>
+#include <linux/i2c.h>
+#include <linux/interrupt.h>
+#include <linux/module.h>
+#include <linux/mutex.h>
+#include <linux/rtc.h>
+#include <linux/rtc/rtc-nvidia-vrs10.h>
+
+#define ALARM_RESET_VAL 0xffffffff
+#define NVVRS_MIN_MODEL_REV 0x40
+
+struct nvvrs_rtc_info {
+ struct device *dev;
+ struct i2c_client *client;
+ struct rtc_device *rtc;
+ unsigned int irq;
+ /* Mutex to protect RTC operations */
+ struct mutex lock;
+};
+
+static int nvvrs_update_bits(struct nvvrs_rtc_info *info, u8 reg,
+ u8 mask, u8 value)
+{
+ int ret;
+ u8 val;
+
+ ret = i2c_smbus_read_byte_data(info->client, reg);
+ if (ret < 0)
+ return ret;
+
+ val = (u8)ret;
+ val &= ~mask;
+ val |= (value & mask);
+
+ return i2c_smbus_write_byte_data(info->client, reg, val);
+}
+
+static int nvvrs_rtc_write_alarm(struct i2c_client *client, u8 *time)
+{
+ int ret;
+
+ ret = i2c_smbus_write_byte_data(client, NVVRS_REG_RTC_A3, time[3]);
+ if (ret < 0)
+ return ret;
+
+ ret = i2c_smbus_write_byte_data(client, NVVRS_REG_RTC_A2, time[2]);
+ if (ret < 0)
+ return ret;
+
+ ret = i2c_smbus_write_byte_data(client, NVVRS_REG_RTC_A1, time[1]);
+ if (ret < 0)
+ return ret;
+
+ return i2c_smbus_write_byte_data(client, NVVRS_REG_RTC_A0, time[0]);
+}
+
+static int nvvrs_rtc_enable_alarm(struct nvvrs_rtc_info *info)
+{
+ int ret;
+
+ /* Set RTC_WAKE bit for autonomous wake from sleep */
+ ret = nvvrs_update_bits(info, NVVRS_REG_CTL_2, NVVRS_REG_CTL_2_RTC_WAKE,
+ NVVRS_REG_CTL_2_RTC_WAKE);
+ if (ret < 0) {
+ dev_err(info->dev, "Failed to set RTC_WAKE bit (%d)\n", ret);
+ return ret;
+ }
+
+ /* Set RTC_PU bit for autonomous wake from shutdown */
+ ret = nvvrs_update_bits(info, NVVRS_REG_CTL_2, NVVRS_REG_CTL_2_RTC_PU,
+ NVVRS_REG_CTL_2_RTC_PU);
+ if (ret < 0) {
+ dev_err(info->dev, "Failed to set RTC_PU bit (%d)\n", ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+static int nvvrs_rtc_disable_alarm(struct nvvrs_rtc_info *info)
+{
+ struct i2c_client *client = info->client;
+ u8 val[4];
+ int ret;
+
+ /* Clear RTC_WAKE bit */
+ ret = nvvrs_update_bits(info, NVVRS_REG_CTL_2, NVVRS_REG_CTL_2_RTC_WAKE,
+ 0);
+ if (ret < 0) {
+ dev_err(info->dev, "Failed to clear RTC_WAKE bit (%d)\n", ret);
+ return ret;
+ }
+
+ /* Clear RTC_PU bit */
+ ret = nvvrs_update_bits(info, NVVRS_REG_CTL_2, NVVRS_REG_CTL_2_RTC_PU,
+ 0);
+ if (ret < 0) {
+ dev_err(info->dev, "Failed to clear RTC_PU bit (%d)\n", ret);
+ return ret;
+ }
+
+ /* Write ALARM_RESET_VAL in RTC Alarm register to disable alarm */
+ val[0] = 0xff;
+ val[1] = 0xff;
+ val[2] = 0xff;
+ val[3] = 0xff;
+
+ ret = nvvrs_rtc_write_alarm(client, val);
+ if (ret < 0)
+ dev_err(info->dev, "Failed to disable Alarm (%d)\n", ret);
+
+ return 0;
+}
+
+static int nvvrs_rtc_read_time(struct device *dev, struct rtc_time *tm)
+{
+ struct nvvrs_rtc_info *info = dev_get_drvdata(dev);
+ time64_t secs = 0;
+ int ret;
+ u8 val;
+
+ mutex_lock(&info->lock);
+
+ /*
+ * Multi-byte transfers are not supported with PEC enabled
+ * Read MSB first to avoid coherency issues
+ */
+ ret = i2c_smbus_read_byte_data(info->client, NVVRS_REG_RTC_T3);
+ if (ret < 0)
+ goto out;
+
+ val = (u8)ret;
+ secs |= (time64_t)val << 24;
+
+ ret = i2c_smbus_read_byte_data(info->client, NVVRS_REG_RTC_T2);
+ if (ret < 0)
+ goto out;
+
+ val = (u8)ret;
+ secs |= (time64_t)val << 16;
+
+ ret = i2c_smbus_read_byte_data(info->client, NVVRS_REG_RTC_T1);
+ if (ret < 0)
+ goto out;
+
+ val = (u8)ret;
+ secs |= (time64_t)val << 8;
+
+ ret = i2c_smbus_read_byte_data(info->client, NVVRS_REG_RTC_T0);
+ if (ret < 0)
+ goto out;
+
+ val = (u8)ret;
+ secs |= val;
+
+ rtc_time64_to_tm(secs, tm);
+ ret = 0;
+out:
+ mutex_unlock(&info->lock);
+ return ret;
+}
+
+static int nvvrs_rtc_set_time(struct device *dev, struct rtc_time *tm)
+{
+ struct nvvrs_rtc_info *info = dev_get_drvdata(dev);
+ time64_t secs;
+ u8 time[4];
+ int ret;
+
+ mutex_lock(&info->lock);
+
+ secs = rtc_tm_to_time64(tm);
+ time[0] = secs & 0xff;
+ time[1] = (secs >> 8) & 0xff;
+ time[2] = (secs >> 16) & 0xff;
+ time[3] = (secs >> 24) & 0xff;
+
+ ret = i2c_smbus_write_byte_data(info->client, NVVRS_REG_RTC_T3, time[3]);
+ if (ret < 0)
+ goto out;
+
+ ret = i2c_smbus_write_byte_data(info->client, NVVRS_REG_RTC_T2, time[2]);
+ if (ret < 0)
+ goto out;
+
+ ret = i2c_smbus_write_byte_data(info->client, NVVRS_REG_RTC_T1, time[1]);
+ if (ret < 0)
+ goto out;
+
+ ret = i2c_smbus_write_byte_data(info->client, NVVRS_REG_RTC_T0, time[0]);
+out:
+ mutex_unlock(&info->lock);
+ return ret;
+}
+
+static int nvvrs_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
+{
+ struct nvvrs_rtc_info *info = dev_get_drvdata(dev);
+ time64_t alarm_val = 0;
+ int ret;
+ u8 val;
+
+ mutex_lock(&info->lock);
+
+ /* Multi-byte transfers are not supported with PEC enabled */
+ ret = i2c_smbus_read_byte_data(info->client, NVVRS_REG_RTC_A3);
+ if (ret < 0)
+ goto out;
+
+ val = (u8)ret;
+ alarm_val |= (time64_t)val << 24;
+
+ ret = i2c_smbus_read_byte_data(info->client, NVVRS_REG_RTC_A2);
+ if (ret < 0)
+ goto out;
+
+ val = (u8)ret;
+ alarm_val |= (time64_t)val << 16;
+
+ ret = i2c_smbus_read_byte_data(info->client, NVVRS_REG_RTC_A1);
+ if (ret < 0)
+ goto out;
+
+ val = (u8)ret;
+ alarm_val |= (time64_t)val << 8;
+
+ ret = i2c_smbus_read_byte_data(info->client, NVVRS_REG_RTC_A0);
+ if (ret < 0)
+ goto out;
+
+ val = (u8)ret;
+ alarm_val |= val;
+
+ if (alarm_val == ALARM_RESET_VAL)
+ alrm->enabled = 0;
+ else
+ alrm->enabled = 1;
+
+ rtc_time64_to_tm(alarm_val, &alrm->time);
+ ret = 0;
+out:
+ mutex_unlock(&info->lock);
+ return ret;
+}
+
+static int nvvrs_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
+{
+ struct nvvrs_rtc_info *info = dev_get_drvdata(dev);
+ time64_t secs;
+ u8 time[4];
+ int ret;
+
+ mutex_lock(&info->lock);
+
+ if (!alrm->enabled) {
+ ret = nvvrs_rtc_disable_alarm(info);
+ if (ret < 0)
+ goto out;
+ }
+
+ ret = nvvrs_rtc_enable_alarm(info);
+ if (ret < 0)
+ goto out;
+
+ secs = rtc_tm_to_time64(&alrm->time);
+ time[0] = secs & 0xff;
+ time[1] = (secs >> 8) & 0xff;
+ time[2] = (secs >> 16) & 0xff;
+ time[3] = (secs >> 24) & 0xff;
+
+ ret = nvvrs_rtc_write_alarm(info->client, time);
+
+out:
+ mutex_unlock(&info->lock);
+ return ret;
+}
+
+static int nvvrs_pseq_irq_clear(struct nvvrs_rtc_info *info)
+{
+ unsigned int i;
+ int ret;
+
+ for (i = 0; i < NVVRS_IRQ_REG_COUNT; i++) {
+ ret = i2c_smbus_read_byte_data(info->client,
+ NVVRS_REG_INT_SRC1 + i);
+ if (ret < 0) {
+ dev_err(info->dev, "Failed to read INT_SRC%d : %d\n",
+ i + 1, ret);
+ return ret;
+ }
+
+ ret = i2c_smbus_write_byte_data(info->client,
+ NVVRS_REG_INT_SRC1 + i,
+ (u8)ret);
+ if (ret < 0) {
+ dev_err(info->dev, "Failed to clear INT_SRC%d : %d\n",
+ i + 1, ret);
+ return ret;
+ }
+ }
+
+ return 0;
+}
+
+static irqreturn_t nvvrs_rtc_irq_handler(int irq, void *data)
+{
+ struct nvvrs_rtc_info *info = data;
+ int ret;
+
+ /* Check for RTC alarm interrupt */
+ ret = i2c_smbus_read_byte_data(info->client, NVVRS_REG_INT_SRC1);
+ if (ret < 0) {
+ dev_err(info->dev, "Failed to read INT_SRC1: %d\n", ret);
+ return IRQ_NONE;
+ }
+
+ if (ret & NVVRS_INT_SRC1_RTC_MASK) {
+ rtc_lock(info->rtc);
+ rtc_update_irq(info->rtc, 1, RTC_IRQF | RTC_AF);
+ rtc_unlock(info->rtc);
+ }
+
+ /* Clear all interrupts */
+ if (nvvrs_pseq_irq_clear(info) < 0)
+ return IRQ_NONE;
+
+ return IRQ_HANDLED;
+}
+
+static int nvvrs_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
+{
+ /*
+ * This hardware does not support enabling/disabling the alarm IRQ
+ * independently. The alarm is disabled by clearing the alarm time
+ * via set_alarm().
+ */
+ return 0;
+}
+
+static const struct rtc_class_ops nvvrs_rtc_ops = {
+ .read_time = nvvrs_rtc_read_time,
+ .set_time = nvvrs_rtc_set_time,
+ .read_alarm = nvvrs_rtc_read_alarm,
+ .set_alarm = nvvrs_rtc_set_alarm,
+ .alarm_irq_enable = nvvrs_rtc_alarm_irq_enable,
+};
+
+static int nvvrs_pseq_vendor_info(struct nvvrs_rtc_info *info)
+{
+ struct i2c_client *client = info->client;
+ u8 vendor_id, model_rev;
+ int ret;
+
+ ret = i2c_smbus_read_byte_data(client, NVVRS_REG_VENDOR_ID);
+ if (ret < 0)
+ return dev_err_probe(&client->dev, ret,
+ "Failed to read Vendor ID\n");
+
+ vendor_id = (u8)ret;
+
+ ret = i2c_smbus_read_byte_data(client, NVVRS_REG_MODEL_REV);
+ if (ret < 0)
+ return dev_err_probe(&client->dev, ret,
+ "Failed to read Model Revision\n");
+
+ model_rev = (u8)ret;
+
+ if (model_rev < NVVRS_MIN_MODEL_REV) {
+ return dev_err_probe(&client->dev, -ENODEV,
+ "Chip revision 0x%02x is not supported!\n",
+ model_rev);
+ }
+
+ dev_dbg(&client->dev, "NVVRS Vendor ID: 0x%02x, Model Rev: 0x%02x\n",
+ vendor_id, model_rev);
+
+ return 0;
+}
+
+static int nvvrs_rtc_probe(struct i2c_client *client)
+{
+ struct nvvrs_rtc_info *info;
+ int ret;
+
+ info = devm_kzalloc(&client->dev, sizeof(*info), GFP_KERNEL);
+ if (!info)
+ return -ENOMEM;
+
+ mutex_init(&info->lock);
+
+ if (client->irq <= 0)
+ return dev_err_probe(&client->dev, -EINVAL, "No IRQ specified\n");
+
+ info->irq = client->irq;
+ info->dev = &client->dev;
+ client->flags |= I2C_CLIENT_PEC;
+ i2c_set_clientdata(client, info);
+ info->client = client;
+
+ /* Check vendor info */
+ if (nvvrs_pseq_vendor_info(info) < 0)
+ return dev_err_probe(&client->dev, -EINVAL,
+ "Failed to get vendor info\n");
+
+ /* Clear any pending IRQs before requesting IRQ handler */
+ if (nvvrs_pseq_irq_clear(info) < 0)
+ return dev_err_probe(&client->dev, -EINVAL,
+ "Failed to clear interrupts\n");
+
+ /* Allocate RTC device */
+ info->rtc = devm_rtc_allocate_device(info->dev);
+ if (IS_ERR(info->rtc))
+ return PTR_ERR(info->rtc);
+
+ info->rtc->ops = &nvvrs_rtc_ops;
+ info->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
+ info->rtc->range_max = RTC_TIMESTAMP_END_2099;
+
+ /* Request RTC IRQ */
+ ret = devm_request_threaded_irq(info->dev, info->irq, NULL,
+ nvvrs_rtc_irq_handler, IRQF_ONESHOT,
+ "nvvrs-rtc", info);
+ if (ret < 0) {
+ dev_err_probe(info->dev, ret, "Failed to request RTC IRQ\n");
+ return ret;
+ }
+
+ /* RTC as a wakeup source */
+ devm_device_init_wakeup(info->dev);
+
+ return devm_rtc_register_device(info->rtc);
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int nvvrs_rtc_suspend(struct device *dev)
+{
+ struct nvvrs_rtc_info *info = dev_get_drvdata(dev);
+ int ret;
+
+ if (device_may_wakeup(dev)) {
+ /* Set RTC_WAKE bit for auto wake system from suspend state */
+ ret = nvvrs_update_bits(info, NVVRS_REG_CTL_2,
+ NVVRS_REG_CTL_2_RTC_WAKE,
+ NVVRS_REG_CTL_2_RTC_WAKE);
+ if (ret < 0) {
+ dev_err(info->dev, "Failed to set RTC_WAKE bit (%d)\n",
+ ret);
+ return ret;
+ }
+
+ return enable_irq_wake(info->irq);
+ }
+
+ return 0;
+}
+
+static int nvvrs_rtc_resume(struct device *dev)
+{
+ struct nvvrs_rtc_info *info = dev_get_drvdata(dev);
+ int ret;
+
+ if (device_may_wakeup(dev)) {
+ /* Clear FORCE_ACT bit */
+ ret = nvvrs_update_bits(info, NVVRS_REG_CTL_1,
+ NVVRS_REG_CTL_1_FORCE_ACT, 0);
+ if (ret < 0) {
+ dev_err(info->dev, "Failed to clear FORCE_ACT bit (%d)\n",
+ ret);
+ return ret;
+ }
+
+ return disable_irq_wake(info->irq);
+ }
+
+ return 0;
+}
+
+#endif
+static SIMPLE_DEV_PM_OPS(nvvrs_rtc_pm_ops, nvvrs_rtc_suspend, nvvrs_rtc_resume);
+
+static const struct of_device_id nvvrs_rtc_of_match[] = {
+ { .compatible = "nvidia,vrs-10" },
+ { },
+};
+MODULE_DEVICE_TABLE(of, nvvrs_rtc_of_match);
+
+static struct i2c_driver nvvrs_rtc_driver = {
+ .driver = {
+ .name = "rtc-nvidia-vrs10",
+ .pm = &nvvrs_rtc_pm_ops,
+ .of_match_table = nvvrs_rtc_of_match,
+ },
+ .probe = nvvrs_rtc_probe,
+};
+
+module_i2c_driver(nvvrs_rtc_driver);
+
+MODULE_AUTHOR("Shubhi Garg <shgarg@nvidia.com>");
+MODULE_DESCRIPTION("NVIDIA Voltage Regulator Specification RTC driver");
+MODULE_LICENSE("GPL");
diff --git a/include/linux/rtc/rtc-nvidia-vrs10.h b/include/linux/rtc/rtc-nvidia-vrs10.h
new file mode 100644
index 000000000000..3c9c46abf555
--- /dev/null
+++ b/include/linux/rtc/rtc-nvidia-vrs10.h
@@ -0,0 +1,78 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * SPDX-FileCopyrightText: Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES.
+ * All rights reserved
+ */
+
+#ifndef _RTC_NVIDIA_VRS_H_
+#define _RTC_NVIDIA_VRS_H_
+
+#include <linux/types.h>
+
+/* Vendor Info */
+#define NVVRS_REG_VENDOR_ID 0x00
+#define NVVRS_REG_MODEL_REV 0x01
+
+/* Interrupts registers */
+#define NVVRS_REG_INT_SRC1 0x10
+#define NVVRS_REG_INT_SRC2 0x11
+#define NVVRS_REG_INT_VENDOR 0x12
+
+/* Control Registers */
+#define NVVRS_REG_CTL_1 0x28
+#define NVVRS_REG_CTL_2 0x29
+
+/* RTC Registers */
+#define NVVRS_REG_RTC_T3 0x70
+#define NVVRS_REG_RTC_T2 0x71
+#define NVVRS_REG_RTC_T1 0x72
+#define NVVRS_REG_RTC_T0 0x73
+#define NVVRS_REG_RTC_A3 0x74
+#define NVVRS_REG_RTC_A2 0x75
+#define NVVRS_REG_RTC_A1 0x76
+#define NVVRS_REG_RTC_A0 0x77
+
+/* Interrupt Mask */
+#define NVVRS_INT_SRC1_RSTIRQ_MASK BIT(0)
+#define NVVRS_INT_SRC1_OSC_MASK BIT(1)
+#define NVVRS_INT_SRC1_EN_MASK BIT(2)
+#define NVVRS_INT_SRC1_RTC_MASK BIT(3)
+#define NVVRS_INT_SRC1_PEC_MASK BIT(4)
+#define NVVRS_INT_SRC1_WDT_MASK BIT(5)
+#define NVVRS_INT_SRC1_EM_PD_MASK BIT(6)
+#define NVVRS_INT_SRC1_INTERNAL_MASK BIT(7)
+#define NVVRS_INT_SRC2_PBSP_MASK BIT(0)
+#define NVVRS_INT_SRC2_ECC_DED_MASK BIT(1)
+#define NVVRS_INT_SRC2_TSD_MASK BIT(2)
+#define NVVRS_INT_SRC2_LDO_MASK BIT(3)
+#define NVVRS_INT_SRC2_BIST_MASK BIT(4)
+#define NVVRS_INT_SRC2_RT_CRC_MASK BIT(5)
+#define NVVRS_INT_SRC2_VENDOR_MASK BIT(7)
+#define NVVRS_INT_VENDOR0_MASK BIT(0)
+#define NVVRS_INT_VENDOR1_MASK BIT(1)
+#define NVVRS_INT_VENDOR2_MASK BIT(2)
+#define NVVRS_INT_VENDOR3_MASK BIT(3)
+#define NVVRS_INT_VENDOR4_MASK BIT(4)
+#define NVVRS_INT_VENDOR5_MASK BIT(5)
+#define NVVRS_INT_VENDOR6_MASK BIT(6)
+#define NVVRS_INT_VENDOR7_MASK BIT(7)
+
+/* Controller Register Mask */
+#define NVVRS_REG_CTL_1_FORCE_SHDN (BIT(0) | BIT(1))
+#define NVVRS_REG_CTL_1_FORCE_ACT BIT(2)
+#define NVVRS_REG_CTL_1_FORCE_INT BIT(3)
+#define NVVRS_REG_CTL_2_EN_PEC BIT(0)
+#define NVVRS_REG_CTL_2_REQ_PEC BIT(1)
+#define NVVRS_REG_CTL_2_RTC_PU BIT(2)
+#define NVVRS_REG_CTL_2_RTC_WAKE BIT(3)
+#define NVVRS_REG_CTL_2_RST_DLY 0xF0
+
+enum nvvrs_irq_regs {
+ NVVRS_IRQ_REG_INT_SRC1 = 0,
+ NVVRS_IRQ_REG_INT_SRC2 = 1,
+ NVVRS_IRQ_REG_INT_VENDOR = 2,
+ NVVRS_IRQ_REG_COUNT = 3,
+};
+
+#endif /* _RTC_NVIDIA_VRS_H_ */
+
--
2.43.0
^ permalink raw reply related
* [PATCH v6 4/4] arm64: defconfig: enable NVIDIA VRS PSEQ RTC
From: Shubhi Garg @ 2025-09-19 14:02 UTC (permalink / raw)
To: Lee Jones, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Catalin Marinas, Will Deacon, Alexandre Belloni, Jonathan Hunter
Cc: devicetree, linux-arm-kernel, linux-rtc, linux-tegra, Shubhi Garg
Enable NVIDIA VRS (Voltage Regulator Specification) RTC device module.
It provides functionality to get/set system time, retain system time
across boot, wake system from suspend and shutdown state.
Supported platforms:
- NVIDIA Jetson AGX Orin Developer Kit
- NVIDIA IGX Orin Development Kit
- NVIDIA Jetson Orin NX Developer Kit
- NVIDIA Jetson Orin Nano Developer Kit
Signed-off-by: Shubhi Garg <shgarg@nvidia.com>
---
v6:
- no changes
v5:
- removed VRS MFD CONFIG
- changed VRS RTC CONFIG name
v4:
- no changes
v3:
- no changes
v2:
- moved VRS RTC config to correct place
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index e3a2d37bd104..a7fb6aa4062c 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -1283,6 +1283,7 @@ CONFIG_RTC_DRV_MT6397=m
CONFIG_RTC_DRV_XGENE=y
CONFIG_RTC_DRV_TI_K3=m
CONFIG_RTC_DRV_RENESAS_RTCA3=m
+CONFIG_RTC_DRV_NVIDIA_VRS10=m
CONFIG_DMADEVICES=y
CONFIG_DMA_BCM2835=y
CONFIG_DMA_SUN6I=m
--
2.43.0
^ permalink raw reply related
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox