* Re: [GIT PULL] RTC for 6.18
From: pr-tracker-bot @ 2025-10-11 19:08 UTC (permalink / raw)
To: Alexandre Belloni; +Cc: Linus Torvalds, linux-rtc, linux-kernel
In-Reply-To: <20251011162009a4f6040d@mail.local>
The pull request you sent on Sat, 11 Oct 2025 18:20:09 +0200:
> git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux.git tags/rtc-6.18
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/98906f9d850e4882004749eccb8920649dc98456
Thank you!
--
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/prtracker.html
^ permalink raw reply
* Re: (subset) [PATCH v13 0/7] spacemit: introduce P1 PMIC support
From: Yixun Lan @ 2025-10-14 0:01 UTC (permalink / raw)
To: lee, lgirdwood, broonie, alexandre.belloni, robh, krzk+dt,
conor+dt, Alex Elder
Cc: Yixun Lan, mat.jonczyk, paul.walmsley, palmer, aou, alex,
linux.amoon, troymitchell988, guodong, linux-rtc, devicetree,
linux-riscv, spacemit, linux-kernel
In-Reply-To: <20250825172057.163883-1-elder@riscstar.com>
On Mon, 25 Aug 2025 12:20:49 -0500, Alex Elder wrote:
> The SpacemiT P1 is an I2C-controlled PMIC that implements 6 buck
> converters and 12 LDOs. It contains a load switch, ADC channels,
> GPIOs, a real-time clock, and a watchdog timer.
>
> This series introduces a multifunction driver for the P1 PMIC as
> well as drivers for its regulators and RTC.
>
> [...]
Applied, thanks!
[5/7] riscv: dts: spacemit: enable the i2c8 adapter
https://github.com/spacemit-com/linux/commit/3e8d7309e6260b1d066e733bf3e2e1b6a0d3f82b
[6/7] riscv: dts: spacemit: define fixed regulators
https://github.com/spacemit-com/linux/commit/1df07a40453fd652132051419140950d47941fe9
[7/7] riscv: dts: spacemit: define regulator constraints
https://github.com/spacemit-com/linux/commit/09a412d397484e76588707d85ccc37f71e491091
Best regards,
--
Yixun Lan
^ permalink raw reply
* [PATCH] rtc: rx8025: fix incorrect register reference
From: Yuta Hayama @ 2025-10-15 3:07 UTC (permalink / raw)
To: Alexandre Belloni, linux-rtc, linux-kernel
Cc: Yuta Hayama, Takao Miyasaka, Naokado OGISO
This code is intended to operate on the CTRL1 register, but ctrl[1] is
actually CTRL2. Correctly, ctrl[0] is CTRL1.
Signed-off-by: Yuta Hayama <hayama@lineo.co.jp>
Fixes: 71af91565052 ("rtc: rx8025: fix 12/24 hour mode detection on RX-8035")
Cc: stable@vger.kernel.org
---
drivers/rtc/rtc-rx8025.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/rtc/rtc-rx8025.c b/drivers/rtc/rtc-rx8025.c
index aabe62c283a1..7e9f7cb90c28 100644
--- a/drivers/rtc/rtc-rx8025.c
+++ b/drivers/rtc/rtc-rx8025.c
@@ -316,7 +316,7 @@ static int rx8025_init_client(struct i2c_client *client)
return hour_reg;
rx8025->is_24 = (hour_reg & RX8035_BIT_HOUR_1224);
} else {
- rx8025->is_24 = (ctrl[1] & RX8025_BIT_CTRL1_1224);
+ rx8025->is_24 = (ctrl[0] & RX8025_BIT_CTRL1_1224);
}
out:
return err;
--
2.43.0
^ permalink raw reply related
* Re: [PATCH v3 06/13] hwmon: Add Apple Silicon SMC hwmon driver
From: Janne Grunau @ 2025-10-16 21:51 UTC (permalink / raw)
To: James Calligeros
Cc: Sven Peter, Alyssa Rosenzweig, Neal Gompa, Lee Jones, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Alexandre Belloni,
Jean Delvare, Guenter Roeck, Dmitry Torokhov, Jonathan Corbet,
asahi, linux-arm-kernel, devicetree, linux-kernel, linux-rtc,
linux-hwmon, linux-input, linux-doc
In-Reply-To: <20251007-macsmc-subdevs-v3-6-d7d3bfd7ae02@gmail.com>
On Tue, Oct 07, 2025 at 09:16:47PM +1000, James Calligeros wrote:
> The System Management Controller on Apple Silicon devices is responsible
> for integrating and exposing the data reported by the vast array of
> hardware monitoring sensors present on these devices. It is also
> responsible for fan control, and allows users to manually set fan
> speeds if they so desire. Add a hwmon driver to expose current,
> power, temperature, and voltage monitoring sensors, as well as
> fan speed monitoring and control via the SMC on Apple Silicon devices.
>
> The SMC firmware has no consistency between devices, even when they
> share an SoC. The FourCC keys used to access sensors are almost
> random. An M1 Mac mini will have different FourCCs for its CPU core
> temperature sensors to an M1 MacBook Pro, for example. For this
> reason, the valid sensors for a given device are specified in a
> child of the SMC Devicetree node. The driver uses this information
> to determine which sensors to make available at runtime.
>
> Reviewed-by: Neal Gompa <neal@gompa.dev>
> Co-developed-by: Janne Grunau <j@jannau.net>
> Signed-off-by: Janne Grunau <j@jannau.net>
> Signed-off-by: James Calligeros <jcalligeros99@gmail.com>
> ---
> Documentation/hwmon/macsmc-hwmon.rst | 71 +++
> MAINTAINERS | 2 +
> drivers/hwmon/Kconfig | 12 +
> drivers/hwmon/Makefile | 1 +
> drivers/hwmon/macsmc-hwmon.c | 850 +++++++++++++++++++++++++
> 5 files changed, 936 insertions(+)
...
> --- a/drivers/hwmon/Makefile
> +++ b/drivers/hwmon/Makefile
> @@ -148,6 +148,7 @@ obj-$(CONFIG_SENSORS_LTC4260) += ltc4260.o
> obj-$(CONFIG_SENSORS_LTC4261) += ltc4261.o
> obj-$(CONFIG_SENSORS_LTC4282) += ltc4282.o
> obj-$(CONFIG_SENSORS_LTQ_CPUTEMP) += ltq-cputemp.o
> +obj-$(CONFIG_SENSORS_MACSMC_HWMON) += macsmc-hwmon.o
> obj-$(CONFIG_SENSORS_MAX1111) += max1111.o
> obj-$(CONFIG_SENSORS_MAX127) += max127.o
> obj-$(CONFIG_SENSORS_MAX16065) += max16065.o
> diff --git a/drivers/hwmon/macsmc-hwmon.c b/drivers/hwmon/macsmc-hwmon.c
> new file mode 100644
> index 000000000000..342fe3a5ff62
> --- /dev/null
> +++ b/drivers/hwmon/macsmc-hwmon.c
> @@ -0,0 +1,850 @@
> +// SPDX-License-Identifier: GPL-2.0-only OR MIT
> +/*
> + * Apple SMC hwmon driver for Apple Silicon platforms
> + *
> + * The System Management Controller on Apple Silicon devices is responsible for
> + * measuring data from sensors across the SoC and machine. These include power,
> + * temperature, voltage and current sensors. Some "sensors" actually expose
> + * derived values. An example of this is the key PHPC, which is an estimate
> + * of the heat energy being dissipated by the SoC.
> + *
> + * While each SoC only has one SMC variant, each platform exposes a different
> + * set of sensors. For example, M1 MacBooks expose battery telemetry sensors
> + * which are not present on the M1 Mac mini. For this reason, the available
> + * sensors for a given platform are described in the device tree in a child
> + * node of the SMC device. We must walk this list of available sensors and
> + * populate the required hwmon data structures at runtime.
> + *
> + * Originally based on a concept by Jean-Francois Bortolotti <jeff@borto.fr>
> + *
> + * Copyright The Asahi Linux Contributors
> + */
> +
missing linux/bitfield.h include as noted by kernel robot
> +#include <linux/hwmon.h>
> +#include <linux/mfd/macsmc.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/platform_device.h>
...
> +static int macsmc_hwmon_probe(struct platform_device *pdev)
> +{
> + struct apple_smc *smc = dev_get_drvdata(pdev->dev.parent);
> + struct macsmc_hwmon *hwmon;
> + int ret;
> +
> + /*
> + * The MFD driver will try to probe us unconditionally. Some devices
> + * with the SMC do not have hwmon capabilities. Only probe if we have
> + * a hwmon node.
> + */
> + if (!pdev->dev.of_node)
> + return -ENODEV;
> +
> + hwmon = devm_kzalloc(&pdev->dev, sizeof(*hwmon),
> + GFP_KERNEL);
> + if (!hwmon)
> + return -ENOMEM;
> +
> + hwmon->dev = &pdev->dev;
> + hwmon->smc = smc;
> +
> + ret = macsmc_hwmon_populate_sensors(hwmon, hwmon->dev->of_node);
> + if (ret) {
> + dev_err(hwmon->dev, "Could not parse sensors\n");
> + return ret;
> + }
> +
> + if (!hwmon->curr.count && !hwmon->fan.count &&
> + !hwmon->power.count && !hwmon->temp.count &&
> + !hwmon->volt.count) {
> + dev_err(hwmon->dev,
> + "No valid sensors found of any supported type\n");
> + return -ENODEV;
> + }
> +
> + ret = macsmc_hwmon_create_infos(hwmon);
> + if (ret)
> + return ret;
> +
> + hwmon->chip_info.ops = &macsmc_hwmon_ops;
> + hwmon->chip_info.info =
> + (const struct hwmon_channel_info *const *)&hwmon->channel_infos;
> +
> + hwmon->hwmon_dev = devm_hwmon_device_register_with_info(&pdev->dev,
> + "macsmc_hwmon", hwmon,
> + &hwmon->chip_info, NULL);
> + if (IS_ERR(hwmon->hwmon_dev))
> + return dev_err_probe(hwmon->dev, PTR_ERR(hwmon->hwmon_dev),
> + "Probing SMC hwmon device failed\n");
> +
> + dev_info(hwmon->dev, "Registered SMC hwmon device. Sensors:");
> + dev_info(hwmon->dev,
printing non-errors during probe is strongly discouraged. I also do not
see much value in this message outside of development so please change
to dev_dbg().
Janne
^ permalink raw reply
* Re: [PATCH v3 08/13] input: macsmc-input: New driver to handle the Apple Mac SMC buttons/lid
From: Janne Grunau @ 2025-10-16 21:58 UTC (permalink / raw)
To: James Calligeros
Cc: Sven Peter, Alyssa Rosenzweig, Neal Gompa, Lee Jones, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Alexandre Belloni,
Jean Delvare, Guenter Roeck, Dmitry Torokhov, Jonathan Corbet,
asahi, linux-arm-kernel, devicetree, linux-kernel, linux-rtc,
linux-hwmon, linux-input, linux-doc, Hector Martin
In-Reply-To: <20251007-macsmc-subdevs-v3-8-d7d3bfd7ae02@gmail.com>
On Tue, Oct 07, 2025 at 09:16:49PM +1000, James Calligeros wrote:
> From: Hector Martin <marcan@marcan.st>
>
> This driver implements power button and lid switch support for Apple Mac
> devices using SMC controllers driven by the macsmc driver.
>
> In addition to basic input support, this also responds to the final
> shutdown warning (when the power button is held down long enough) by
> doing an emergency kernel poweroff. This allows the NVMe controller to
> be cleanly shut down, which prevents data loss for in-cache data.
>
> Reviewed-by: Neal Gompa <neal@gompa.dev>
> Signed-off-by: Hector Martin <marcan@marcan.st>
> Co-developed-by: Sven Peter <sven@kernel.org>
> Signed-off-by: Sven Peter <sven@kernel.org>
> Signed-off-by: James Calligeros <jcalligeros99@gmail.com>
> ---
> MAINTAINERS | 1 +
> drivers/input/misc/Kconfig | 11 ++
> drivers/input/misc/Makefile | 1 +
> drivers/input/misc/macsmc-input.c | 208 +++++++++++++++++++++++++
> 4 files changed, 221 insertions(+)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 79b9f40224a9..e8283f127f11 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -2451,6 +2451,7 @@ F: drivers/hwmon/macsmc-hwmon.c
> F: drivers/pmdomain/apple/
> F: drivers/i2c/busses/i2c-pasemi-core.c
> F: drivers/i2c/busses/i2c-pasemi-platform.c
> +F: drivers/input/misc/macsmc-input.c
> F: drivers/input/touchscreen/apple_z2.c
> F: drivers/iommu/apple-dart.c
> F: drivers/iommu/io-pgtable-dart.c
> diff --git a/drivers/input/misc/Kconfig b/drivers/input/misc/Kconfig
> index 0e6b49fb54bc..5ab8a4729e0a 100644
> --- a/drivers/input/misc/Kconfig
> +++ b/drivers/input/misc/Kconfig
> @@ -981,4 +981,15 @@ config INPUT_STPMIC1_ONKEY
> To compile this driver as a module, choose M here: the
> module will be called stpmic1_onkey.
>
> +config INPUT_MACSMC_INPUT
INPUT_MACSMC_INPUT looks redundant, is there a reason for not just using
INPUT_MACSMC?
> + tristate "Apple Mac SMC lid/buttons"
> + depends on MFD_MACSMC
> + help
> + Say Y here if you want to use the input events delivered via the
> + SMC controller on Apple Mac machines using the macsmc driver.
> + This includes lid open/close and the power button.
> +
> + To compile this driver as a module, choose M here: the
> + module will be called macsmc-input.
> +
> endif
> diff --git a/drivers/input/misc/Makefile b/drivers/input/misc/Makefile
> index ae857c24f48e..480a0d08d4ae 100644
> --- a/drivers/input/misc/Makefile
> +++ b/drivers/input/misc/Makefile
> @@ -51,6 +51,7 @@ obj-$(CONFIG_INPUT_IQS7222) += iqs7222.o
> obj-$(CONFIG_INPUT_KEYSPAN_REMOTE) += keyspan_remote.o
> obj-$(CONFIG_INPUT_KXTJ9) += kxtj9.o
> obj-$(CONFIG_INPUT_M68K_BEEP) += m68kspkr.o
> +obj-$(CONFIG_INPUT_MACSMC_INPUT) += macsmc-input.o
> obj-$(CONFIG_INPUT_MAX7360_ROTARY) += max7360-rotary.o
> obj-$(CONFIG_INPUT_MAX77650_ONKEY) += max77650-onkey.o
> obj-$(CONFIG_INPUT_MAX77693_HAPTIC) += max77693-haptic.o
> diff --git a/drivers/input/misc/macsmc-input.c b/drivers/input/misc/macsmc-input.c
> new file mode 100644
> index 000000000000..ebbc7dfc31f5
> --- /dev/null
> +++ b/drivers/input/misc/macsmc-input.c
> @@ -0,0 +1,208 @@
> +// SPDX-License-Identifier: GPL-2.0-only OR MIT
> +/*
> + * Apple SMC input event driver
> + * Copyright The Asahi Linux Contributors
> + *
> + * This driver exposes HID events from the SMC as an input device.
s/HID //
> + * This includes the lid open/close and power button notifications.
> + */
> +
> +#include <linux/device.h>
> +#include <linux/input.h>
> +#include <linux/mfd/core.h>
> +#include <linux/mfd/macsmc.h>
> +#include <linux/module.h>
> +#include <linux/reboot.h>
> +
> +/**
> + * struct macsmc_input
> + * @dev: Underlying struct device for the input sub-device
> + * @smc: Pointer to apple_smc struct of the mfd parent
> + * @input: Allocated input_dev; devres managed
> + * @nb: Notifier block used for incoming events from SMC (e.g. button pressed down)
> + * @wakeup_mode: Set to true when system is suspended and power button events should wake it
> + */
> +struct macsmc_input {
> + struct device *dev;
> + struct apple_smc *smc;
> + struct input_dev *input;
> + struct notifier_block nb;
> + bool wakeup_mode;
> +};
> +
> +#define SMC_EV_BTN 0x7201
> +#define SMC_EV_LID 0x7203
> +
> +#define BTN_POWER 0x01 /* power button on e.g. Mac Mini chasis pressed */
> +#define BTN_TOUCHID 0x06 /* combined TouchID / power button on MacBooks pressed */
> +#define BTN_POWER_HELD_SHORT 0xfe /* power button briefly held down */
> +#define BTN_POWER_HELD_LONG 0x00 /* power button held down; sent just before forced poweroff */
> +
> +static void macsmc_input_event_button(struct macsmc_input *smcin, unsigned long event)
> +{
> + u8 button = (event >> 8) & 0xff;
> + u8 state = !!(event & 0xff);
> +
> + switch (button) {
> + case BTN_POWER:
> + case BTN_TOUCHID:
> + if (smcin->wakeup_mode) {
> + if (state)
> + pm_wakeup_event(smcin->dev, 0);
> + } else {
> + input_report_key(smcin->input, KEY_POWER, state);
> + input_sync(smcin->input);
> + }
> + break;
> + case BTN_POWER_HELD_SHORT: /* power button held down; ignore */
> + break;
> + case BTN_POWER_HELD_LONG:
> + /*
> + * If we get here the power button has been held down for a while and
> + * we have about 4 seconds before forced power-off is triggered by SMC.
> + * Try to do an emergency shutdown to make sure the NVMe cache is
> + * flushed. macOS actually does this by panicing (!)...
> + */
> + if (state) {
> + dev_crit(smcin->dev, "Triggering forced shutdown!\n");
> + if (kernel_can_power_off())
> + kernel_power_off();
> + else /* Missing macsmc-reboot driver? */
> + kernel_restart("SMC power button triggered restart");
> + }
> + break;
> + default:
> + dev_warn(smcin->dev, "Unknown SMC button event: %04lx\n", event & 0xffff);
> + }
> +}
> +
> +static void macsmc_input_event_lid(struct macsmc_input *smcin, unsigned long event)
> +{
> + u8 lid_state = !!((event >> 8) & 0xff);
> +
> + if (smcin->wakeup_mode && !lid_state)
> + pm_wakeup_event(smcin->dev, 0);
> +
> + input_report_switch(smcin->input, SW_LID, lid_state);
> + input_sync(smcin->input);
> +}
> +
> +static int macsmc_input_event(struct notifier_block *nb, unsigned long event, void *data)
> +{
> + struct macsmc_input *smcin = container_of(nb, struct macsmc_input, nb);
> + u16 type = event >> 16;
> +
> + switch (type) {
> + case SMC_EV_BTN:
> + macsmc_input_event_button(smcin, event);
> + return NOTIFY_OK;
> + case SMC_EV_LID:
> + macsmc_input_event_lid(smcin, event);
> + return NOTIFY_OK;
> + default:
> + /* SMC event meant for another driver */
> + return NOTIFY_DONE;
> + }
> +}
> +
> +static int macsmc_input_probe(struct platform_device *pdev)
> +{
> + struct apple_smc *smc = dev_get_drvdata(pdev->dev.parent);
> + struct macsmc_input *smcin;
> + bool have_lid, have_power;
> + int error;
> +
> + /* Bail early if this SMC neither supports power button nor lid events */
> + have_lid = apple_smc_key_exists(smc, SMC_KEY(MSLD));
> + have_power = apple_smc_key_exists(smc, SMC_KEY(bHLD));
> + if (!have_lid && !have_power)
> + return -ENODEV;
> +
> + smcin = devm_kzalloc(&pdev->dev, sizeof(*smcin), GFP_KERNEL);
> + if (!smcin)
> + return -ENOMEM;
> +
> + smcin->dev = &pdev->dev;
> + smcin->smc = smc;
> + platform_set_drvdata(pdev, smcin);
> +
> + smcin->input = devm_input_allocate_device(&pdev->dev);
> + if (!smcin->input)
> + return -ENOMEM;
> +
> + smcin->input->phys = "macsmc-input (0)";
> + smcin->input->name = "Apple SMC power/lid events";
> +
> + if (have_lid)
> + input_set_capability(smcin->input, EV_SW, SW_LID);
> + if (have_power)
> + input_set_capability(smcin->input, EV_KEY, KEY_POWER);
> +
> + if (have_lid) {
> + u8 val;
> +
> + error = apple_smc_read_u8(smc, SMC_KEY(MSLD), &val);
> + if (error < 0)
> + dev_warn(&pdev->dev, "Failed to read initial lid state\n");
> + else
> + input_report_switch(smcin->input, SW_LID, val);
> + }
> +
> + if (have_power) {
> + u32 val;
> +
> + error = apple_smc_read_u32(smc, SMC_KEY(bHLD), &val);
> + if (error < 0)
> + dev_warn(&pdev->dev, "Failed to read initial power button state\n");
> + else
> + input_report_key(smcin->input, KEY_POWER, val & 1);
> + }
> +
> + error = input_register_device(smcin->input);
> + if (error) {
> + dev_err(&pdev->dev, "Failed to register input device: %d\n", error);
> + return error;
> + }
> +
> + input_sync(smcin->input);
> +
> + smcin->nb.notifier_call = macsmc_input_event;
> + blocking_notifier_chain_register(&smc->event_handlers, &smcin->nb);
> +
> + device_init_wakeup(&pdev->dev, 1);
> +
> + return 0;
> +}
> +
> +static int macsmc_input_pm_prepare(struct device *dev)
> +{
> + struct macsmc_input *smcin = dev_get_drvdata(dev);
> +
> + smcin->wakeup_mode = true;
> + return 0;
> +}
> +
> +static void macsmc_input_pm_complete(struct device *dev)
> +{
> + struct macsmc_input *smcin = dev_get_drvdata(dev);
> +
> + smcin->wakeup_mode = false;
> +}
> +
> +static const struct dev_pm_ops macsmc_input_pm_ops = {
> + .prepare = macsmc_input_pm_prepare,
> + .complete = macsmc_input_pm_complete,
> +};
> +
> +static struct platform_driver macsmc_input_driver = {
> + .driver = {
> + .name = "macsmc-input",
> + .pm = &macsmc_input_pm_ops,
> + },
> + .probe = macsmc_input_probe,
> +};
> +module_platform_driver(macsmc_input_driver);
> +
> +MODULE_AUTHOR("Hector Martin <marcan@marcan.st>");
> +MODULE_LICENSE("Dual MIT/GPL");
> +MODULE_DESCRIPTION("Apple SMC input driver");
mssing 'MODULE_ALIAS("platform:macsmc-input");'. This is required when
using MFD_CELL_NAME(). My ask for it to be removed was based on my
mistaken idea to add a pointless node to the DT and use MFD_CELL_OF().
Janne
^ permalink raw reply
* Re: [PATCH v3 00/13] mfd: macsmc: add rtc, hwmon and hid subdevices
From: Janne Grunau @ 2025-10-16 22:15 UTC (permalink / raw)
To: James Calligeros
Cc: Sven Peter, Alyssa Rosenzweig, Neal Gompa, Lee Jones, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Alexandre Belloni,
Jean Delvare, Guenter Roeck, Dmitry Torokhov, Jonathan Corbet,
asahi, linux-arm-kernel, devicetree, linux-kernel, linux-rtc,
linux-hwmon, linux-input, linux-doc, Mark Kettenis, Hector Martin
In-Reply-To: <20251007-macsmc-subdevs-v3-0-d7d3bfd7ae02@gmail.com>
On Tue, Oct 07, 2025 at 09:16:41PM +1000, James Calligeros wrote:
> Hi all,
>
> This series adds support for the remaining SMC subdevices. These are the
> RTC, hwmon, and HID devices. They are being submitted together as the RTC
> and hwmon drivers both require changes to the SMC DT schema.
>
> The RTC driver is responsible for getting and setting the system clock,
> and requires an NVMEM cell. This series replaces Sven's original RTC driver
> submission [1].
>
> The hwmon function is an interesting one. While each Apple Silicon device
> exposes pretty similar sets of sensors, these all seem to be paired to
> different SMC keys in the firmware interface. This is true even when the
> sensors are on the SoC. For example, an M1 MacBook Pro will use different
> keys to access the LITTLE core temperature sensors to an M1 Mac mini. This
> necessitates describing which keys correspond to which sensors for each
> device individually, and populating the hwmon structs at runtime. We do
> this with a node in the device tree. This series includes only the keys
> for sensors which we know to be common to all devices. The SMC is also
> responsible for monitoring and controlling fan speeds on systems with fans,
> which we expose via the hwmon driver.
The split of the hwmon dts changes looks weird to me. It's not a lot of
changes so squashing everything together into a single commit might be
ok. If you want to split the commits splitting them by SoC (t8103,
t8112, t600x, ...) and adding common sensor defines as needed might work
better.
> The SMC also handles the hardware power button and lid switch. Power
> button presses and lid opening/closing are emitted as HID events, so we
> add an input subdevice to handle them.
The cover letter doesn't mention a merge strategy for this series. I
don't think there are any dependencies between different parts. That
means the dt-bindings and driver additions can be merged through their
subsystem trees. The single line patches wiring the devices up to the
macsmc mfd driver should be merged together through mfd tree as they
(trivially) conflict. The dts changes will be merged through the apple
soc tree.
Janne
^ permalink raw reply
* Re: [PATCH] rtc: tegra: Add ACPI support
From: Andy Shevchenko @ 2025-10-15 8:04 UTC (permalink / raw)
To: Kartik Rajput
Cc: alexandre.belloni, thierry.reding, jonathanh, linux-rtc,
linux-tegra, linux-kernel
In-Reply-To: <20250919111232.605405-1-kkartik@nvidia.com>
On Fri, Sep 19, 2025 at 04:42:32PM +0530, Kartik Rajput wrote:
> Add ACPI support for Tegra RTC, which is available on Tegra241 and
> Tegra410. Both Tegra241 and Tegra410 use the same ACPI ID 'NVDA0280'.
> The RTC clock is configured by UEFI before the kernel boots.
...
> +#include <linux/acpi.h>
No use.
...
> +static const struct acpi_device_id tegra_rtc_acpi_match[] = {
> + { "NVDA0280", 0 },
Drop redundant ', 0' part.
> + { }
> +};
...
> + if (is_of_node(dev_fwnode(&pdev->dev))) {
Simple dev_of_node() will work here
> + info->clk = devm_clk_get(&pdev->dev, NULL);
> + if (IS_ERR(info->clk))
> + return PTR_ERR(info->clk);
>
> + ret = clk_prepare_enable(info->clk);
> + if (ret < 0)
> + return ret;
> + }
...
> disable_clk:
> - clk_disable_unprepare(info->clk);
> + if (is_of_node(dev_fwnode(&pdev->dev)))
> + clk_disable_unprepare(info->clk);
Redundant change. CLK APIs are NULL aware.
...
> - clk_disable_unprepare(info->clk);
> + if (is_of_node(dev_fwnode(&pdev->dev)))
> + clk_disable_unprepare(info->clk);
Ditto.
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply
* [PATCH 0/6] Add RTC support for the Renesas RZ/V2H SoC
From: Ovidiu Panait @ 2025-10-19 9:21 UTC (permalink / raw)
To: claudiu.beznea.uj, alexandre.belloni, robh, krzk+dt, conor+dt,
geert+renesas, magnus.damm, mturquette, sboyd, p.zabel
Cc: linux-rtc, linux-renesas-soc, devicetree, linux-kernel, linux-clk
Hi,
This series adds RTC support for the Renesas RZ/V2H SoC.
The Renesas RZ/V2H RTC IP is based on the same RTCA3 IP as RZ/G3S
(r9a08g045), with the following differences:
- it lacks the time capture functionality
- the maximum supported periodic interrupt frequency is 128Hz instead
of 256Hz
- it requires two reset lines instead of one
Best regards,
Ovidiu
Ovidiu Panait (6):
clk: renesas: r9a09g057: Add clock and reset entries for RTC
dt-bindings: rtc: renesas,rz-rtca3: Add RZ/V2H support
rtc: renesas-rtca3: Use OF data for configuration
rtc: renesas-rtca3: Add support for RZ/V2H SoC
arm64: dts: renesas: r9a09g057: Add RTC node
arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable RTC
.../bindings/rtc/renesas,rz-rtca3.yaml | 33 ++++++++++++++++---
arch/arm64/boot/dts/renesas/r9a09g057.dtsi | 14 ++++++++
.../dts/renesas/r9a09g057h44-rzv2h-evk.dts | 4 +++
drivers/clk/renesas/r9a09g057-cpg.c | 4 +++
drivers/rtc/rtc-renesas-rtca3.c | 27 +++++++++++++--
5 files changed, 74 insertions(+), 8 deletions(-)
--
2.51.0
^ permalink raw reply
* [PATCH 1/6] clk: renesas: r9a09g057: Add clock and reset entries for RTC
From: Ovidiu Panait @ 2025-10-19 9:21 UTC (permalink / raw)
To: claudiu.beznea.uj, alexandre.belloni, robh, krzk+dt, conor+dt,
geert+renesas, magnus.damm, mturquette, sboyd, p.zabel
Cc: linux-rtc, linux-renesas-soc, devicetree, linux-kernel, linux-clk
In-Reply-To: <20251019092106.5737-1-ovidiu.panait.rb@renesas.com>
Add module clock and reset entries for the RTC module on the Renesas RZ/V2H
(R9A09G057) SoC.
Signed-off-by: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
---
drivers/clk/renesas/r9a09g057-cpg.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/clk/renesas/r9a09g057-cpg.c b/drivers/clk/renesas/r9a09g057-cpg.c
index c9c117c6782c..100cd56c323e 100644
--- a/drivers/clk/renesas/r9a09g057-cpg.c
+++ b/drivers/clk/renesas/r9a09g057-cpg.c
@@ -241,6 +241,8 @@ static const struct rzv2h_mod_clk r9a09g057_mod_clks[] __initconst = {
BUS_MSTOP(5, BIT(13))),
DEF_MOD("wdt_3_clk_loco", CLK_QEXTAL, 5, 2, 2, 18,
BUS_MSTOP(5, BIT(13))),
+ DEF_MOD("rtc_0_clk_rtc", CLK_PLLCM33_DIV16, 5, 3, 2, 19,
+ BUS_MSTOP(3, BIT(11) | BIT(12))),
DEF_MOD("rspi_0_pclk", CLK_PLLCLN_DIV8, 5, 4, 2, 20,
BUS_MSTOP(11, BIT(0))),
DEF_MOD("rspi_0_pclk_sfr", CLK_PLLCLN_DIV8, 5, 5, 2, 21,
@@ -411,6 +413,8 @@ static const struct rzv2h_reset r9a09g057_resets[] __initconst = {
DEF_RST(7, 6, 3, 7), /* WDT_1_RESET */
DEF_RST(7, 7, 3, 8), /* WDT_2_RESET */
DEF_RST(7, 8, 3, 9), /* WDT_3_RESET */
+ DEF_RST(7, 9, 3, 10), /* RTC_0_RST_RTC */
+ DEF_RST(7, 10, 3, 11), /* RTC_0_RST_RTC_V */
DEF_RST(7, 11, 3, 12), /* RSPI_0_PRESETN */
DEF_RST(7, 12, 3, 13), /* RSPI_0_TRESETN */
DEF_RST(7, 13, 3, 14), /* RSPI_1_PRESETN */
--
2.51.0
^ permalink raw reply related
* [PATCH 2/6] dt-bindings: rtc: renesas,rz-rtca3: Add RZ/V2H support
From: Ovidiu Panait @ 2025-10-19 9:21 UTC (permalink / raw)
To: claudiu.beznea.uj, alexandre.belloni, robh, krzk+dt, conor+dt,
geert+renesas, magnus.damm, mturquette, sboyd, p.zabel
Cc: linux-rtc, linux-renesas-soc, devicetree, linux-kernel, linux-clk
In-Reply-To: <20251019092106.5737-1-ovidiu.panait.rb@renesas.com>
The Renesas RZ/V2H RTC IP is based on the same RTCA3 IP as RZ/G3S
(r9a08g045), with the following differences:
- it lacks the time capture functionality
- the maximum supported periodic interrupt frequency is 128Hz instead
of 256Hz
- it requires two reset lines instead of one
Add new compatible string "renesas,r9a09g057-rtca3" for RZ/V2H and update
the binding so that "resets" may have either one or two entries, depending
on the compatible string.
Signed-off-by: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
---
.../bindings/rtc/renesas,rz-rtca3.yaml | 33 ++++++++++++++++---
1 file changed, 28 insertions(+), 5 deletions(-)
diff --git a/Documentation/devicetree/bindings/rtc/renesas,rz-rtca3.yaml b/Documentation/devicetree/bindings/rtc/renesas,rz-rtca3.yaml
index e70eeb66aa64..39a5c2483374 100644
--- a/Documentation/devicetree/bindings/rtc/renesas,rz-rtca3.yaml
+++ b/Documentation/devicetree/bindings/rtc/renesas,rz-rtca3.yaml
@@ -9,14 +9,12 @@ title: Renesas RTCA-3 Real Time Clock
maintainers:
- Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
-allOf:
- - $ref: rtc.yaml#
-
properties:
compatible:
items:
- enum:
- renesas,r9a08g045-rtca3 # RZ/G3S
+ - renesas,r9a09g057-rtca3 # RZ/V2H
- const: renesas,rz-rtca3
reg:
@@ -48,8 +46,8 @@ properties:
maxItems: 1
resets:
- items:
- - description: VBATTB module reset
+ minItems: 1
+ maxItems: 2
required:
- compatible
@@ -61,6 +59,31 @@ required:
- power-domains
- resets
+allOf:
+ - $ref: rtc.yaml#
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: renesas,r9a08g045-rtca3
+ then:
+ properties:
+ resets:
+ items:
+ - description: VBATTB module reset
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: renesas,r9a09g057-rtca3
+ then:
+ properties:
+ resets:
+ items:
+ - description: RTC reset
+ - description: Reset for the RTEST registers
+
additionalProperties: false
examples:
--
2.51.0
^ permalink raw reply related
* [PATCH 3/6] rtc: renesas-rtca3: Use OF data for configuration
From: Ovidiu Panait @ 2025-10-19 9:21 UTC (permalink / raw)
To: claudiu.beznea.uj, alexandre.belloni, robh, krzk+dt, conor+dt,
geert+renesas, magnus.damm, mturquette, sboyd, p.zabel
Cc: linux-rtc, linux-renesas-soc, devicetree, linux-kernel, linux-clk
In-Reply-To: <20251019092106.5737-1-ovidiu.panait.rb@renesas.com>
Prepare for adding support for the Renesas RZ/V2H SoC RTC IP by making the
driver configuration selectable via OF match data.
For RZ/V2H RTC, the maximum periodic interrupt frequency is 128Hz instead
of 256Hz, so add this info to a SoC-specific struct and retrieve it
during probe.
Signed-off-by: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
---
drivers/rtc/rtc-renesas-rtca3.c | 20 ++++++++++++++++++--
1 file changed, 18 insertions(+), 2 deletions(-)
diff --git a/drivers/rtc/rtc-renesas-rtca3.c b/drivers/rtc/rtc-renesas-rtca3.c
index ab816bdf0d77..90dda04fad33 100644
--- a/drivers/rtc/rtc-renesas-rtca3.c
+++ b/drivers/rtc/rtc-renesas-rtca3.c
@@ -101,6 +101,15 @@ enum rtca3_alrm_set_step {
RTCA3_ALRM_SSTEP_INIT = 3,
};
+/**
+ * struct rtca3_of_data - OF data for RTCA3
+ *
+ * @max_periodic_irq_freq: maximum periodic interrupt frequency
+ */
+struct rtca3_of_data {
+ int max_periodic_irq_freq;
+};
+
/**
* struct rtca3_ppb_per_cycle - PPB per cycle
* @ten_sec: PPB per cycle in 10 seconds adjutment mode
@@ -709,6 +718,7 @@ static void rtca3_action(void *data)
static int rtca3_probe(struct platform_device *pdev)
{
+ const struct rtca3_of_data *of_data;
struct device *dev = &pdev->dev;
struct rtca3_priv *priv;
struct clk *clk;
@@ -718,6 +728,8 @@ static int rtca3_probe(struct platform_device *pdev)
if (!priv)
return -ENOMEM;
+ of_data = of_device_get_match_data(dev);
+
priv->base = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(priv->base))
return PTR_ERR(priv->base);
@@ -772,7 +784,7 @@ static int rtca3_probe(struct platform_device *pdev)
return PTR_ERR(priv->rtc_dev);
priv->rtc_dev->ops = &rtca3_ops;
- priv->rtc_dev->max_user_freq = 256;
+ priv->rtc_dev->max_user_freq = of_data->max_periodic_irq_freq;
priv->rtc_dev->range_min = RTC_TIMESTAMP_BEGIN_2000;
priv->rtc_dev->range_max = RTC_TIMESTAMP_END_2099;
@@ -875,8 +887,12 @@ static int rtca3_resume(struct device *dev)
static DEFINE_SIMPLE_DEV_PM_OPS(rtca3_pm_ops, rtca3_suspend, rtca3_resume);
+static const struct rtca3_of_data rtca3_of_data = {
+ .max_periodic_irq_freq = 256,
+};
+
static const struct of_device_id rtca3_of_match[] = {
- { .compatible = "renesas,rz-rtca3", },
+ { .compatible = "renesas,rz-rtca3", .data = &rtca3_of_data },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, rtca3_of_match);
--
2.51.0
^ permalink raw reply related
* [PATCH 4/6] rtc: renesas-rtca3: Add support for RZ/V2H SoC
From: Ovidiu Panait @ 2025-10-19 9:21 UTC (permalink / raw)
To: claudiu.beznea.uj, alexandre.belloni, robh, krzk+dt, conor+dt,
geert+renesas, magnus.damm, mturquette, sboyd, p.zabel
Cc: linux-rtc, linux-renesas-soc, devicetree, linux-kernel, linux-clk
In-Reply-To: <20251019092106.5737-1-ovidiu.panait.rb@renesas.com>
Add a new compatible string for the Renesas RZ/V2H RTC along with the SoC
specific OF data, to account for the different maximum periodic interrupt
frequency (128Hz).
Also, switch from devm_reset_control_get_shared() to
devm_reset_control_array_get_shared() when retrieving resets.
The RZ/V2H SoC requires two resets for the RTC block instead of one,
so this will allow to handle multiple resets without additional changes.
Signed-off-by: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
---
drivers/rtc/rtc-renesas-rtca3.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/rtc/rtc-renesas-rtca3.c b/drivers/rtc/rtc-renesas-rtca3.c
index 90dda04fad33..96f5d3734d93 100644
--- a/drivers/rtc/rtc-renesas-rtca3.c
+++ b/drivers/rtc/rtc-renesas-rtca3.c
@@ -738,7 +738,7 @@ static int rtca3_probe(struct platform_device *pdev)
if (ret)
return ret;
- priv->rstc = devm_reset_control_get_shared(dev, NULL);
+ priv->rstc = devm_reset_control_array_get_shared(dev);
if (IS_ERR(priv->rstc))
return PTR_ERR(priv->rstc);
@@ -887,11 +887,16 @@ static int rtca3_resume(struct device *dev)
static DEFINE_SIMPLE_DEV_PM_OPS(rtca3_pm_ops, rtca3_suspend, rtca3_resume);
+static const struct rtca3_of_data rtca3_rzv2h_of_data = {
+ .max_periodic_irq_freq = 128,
+};
+
static const struct rtca3_of_data rtca3_of_data = {
.max_periodic_irq_freq = 256,
};
static const struct of_device_id rtca3_of_match[] = {
+ { .compatible = "renesas,r9a09g057-rtca3", .data = &rtca3_rzv2h_of_data },
{ .compatible = "renesas,rz-rtca3", .data = &rtca3_of_data },
{ /* sentinel */ }
};
--
2.51.0
^ permalink raw reply related
* [PATCH 5/6] arm64: dts: renesas: r9a09g057: Add RTC node
From: Ovidiu Panait @ 2025-10-19 9:21 UTC (permalink / raw)
To: claudiu.beznea.uj, alexandre.belloni, robh, krzk+dt, conor+dt,
geert+renesas, magnus.damm, mturquette, sboyd, p.zabel
Cc: linux-rtc, linux-renesas-soc, devicetree, linux-kernel, linux-clk
In-Reply-To: <20251019092106.5737-1-ovidiu.panait.rb@renesas.com>
Add RTC node to Renesas RZ/V2H ("R9A09G057") SoC DTSI.
Signed-off-by: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
---
arch/arm64/boot/dts/renesas/r9a09g057.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
index 40b15f1db930..e426b9978e22 100644
--- a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
@@ -591,6 +591,20 @@ wdt3: watchdog@13000400 {
status = "disabled";
};
+ rtc: rtc@11c00800 {
+ compatible = "renesas,r9a09g057-rtca3", "renesas,rz-rtca3";
+ reg = <0 0x11c00800 0 0x400>;
+ interrupts = <GIC_SPI 524 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 525 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 526 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "alarm", "period", "carry";
+ clocks = <&cpg CPG_MOD 0x53>, <&rtxin_clk>;
+ clock-names = "bus", "counter";
+ power-domains = <&cpg>;
+ resets = <&cpg 0x79>, <&cpg 0x7a>;
+ status = "disabled";
+ };
+
scif: serial@11c01400 {
compatible = "renesas,scif-r9a09g057";
reg = <0 0x11c01400 0 0x400>;
--
2.51.0
^ permalink raw reply related
* [PATCH 6/6] arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable RTC
From: Ovidiu Panait @ 2025-10-19 9:21 UTC (permalink / raw)
To: claudiu.beznea.uj, alexandre.belloni, robh, krzk+dt, conor+dt,
geert+renesas, magnus.damm, mturquette, sboyd, p.zabel
Cc: linux-rtc, linux-renesas-soc, devicetree, linux-kernel, linux-clk
In-Reply-To: <20251019092106.5737-1-ovidiu.panait.rb@renesas.com>
Enable RTC.
Signed-off-by: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
---
arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts b/arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts
index d0378c1c17a1..558270ad2ed1 100644
--- a/arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts
+++ b/arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts
@@ -408,6 +408,10 @@ &qextal_clk {
clock-frequency = <24000000>;
};
+&rtc {
+ status = "okay";
+};
+
&rtxin_clk {
clock-frequency = <32768>;
};
--
2.51.0
^ permalink raw reply related
* Re: [PATCH 2/6] dt-bindings: rtc: renesas,rz-rtca3: Add RZ/V2H support
From: Krzysztof Kozlowski @ 2025-10-19 9:29 UTC (permalink / raw)
To: Ovidiu Panait, claudiu.beznea.uj, alexandre.belloni, robh,
krzk+dt, conor+dt, geert+renesas, magnus.damm, mturquette, sboyd,
p.zabel
Cc: linux-rtc, linux-renesas-soc, devicetree, linux-kernel, linux-clk
In-Reply-To: <20251019092106.5737-3-ovidiu.panait.rb@renesas.com>
On 19/10/2025 11:21, Ovidiu Panait wrote:
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: renesas,r9a09g057-rtca3
> + then:
> + properties:
> + resets:
> + items:
> + - description: RTC reset
So this is a completely different type of reset than VBATTB from earlier
device?
> + - description: Reset for the RTEST registers
> +
Best regards,
Krzysztof
^ permalink raw reply
* RE: [PATCH 5/6] arm64: dts: renesas: r9a09g057: Add RTC node
From: Biju Das @ 2025-10-19 10:15 UTC (permalink / raw)
To: Ovidiu Panait, Claudiu Beznea, alexandre.belloni@bootlin.com,
robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
geert+renesas@glider.be, magnus.damm, mturquette@baylibre.com,
sboyd@kernel.org, p.zabel@pengutronix.de
Cc: linux-rtc@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-clk@vger.kernel.org
In-Reply-To: <20251019092106.5737-6-ovidiu.panait.rb@renesas.com>
> -----Original Message-----
> From: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
> Sent: 19 October 2025 10:21
> Subject: [PATCH 5/6] arm64: dts: renesas: r9a09g057: Add RTC node
>
> Add RTC node to Renesas RZ/V2H ("R9A09G057") SoC DTSI.
>
> Signed-off-by: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
> ---
> arch/arm64/boot/dts/renesas/r9a09g057.dtsi | 14 ++++++++++++++
> 1 file changed, 14 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
> index 40b15f1db930..e426b9978e22 100644
> --- a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
> @@ -591,6 +591,20 @@ wdt3: watchdog@13000400 {
> status = "disabled";
> };
>
> + rtc: rtc@11c00800 {
> + compatible = "renesas,r9a09g057-rtca3", "renesas,rz-rtca3";
> + reg = <0 0x11c00800 0 0x400>;
> + interrupts = <GIC_SPI 524 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 525 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 526 IRQ_TYPE_EDGE_RISING>;
> + interrupt-names = "alarm", "period", "carry";
> + clocks = <&cpg CPG_MOD 0x53>, <&rtxin_clk>;
> + clock-names = "bus", "counter";
> + power-domains = <&cpg>;
> + resets = <&cpg 0x79>, <&cpg 0x7a>;
Missing reset-names??
Cheers,
Biju
> + status = "disabled";
> + };
> +
> scif: serial@11c01400 {
> compatible = "renesas,scif-r9a09g057";
> reg = <0 0x11c01400 0 0x400>;
> --
> 2.51.0
>
^ permalink raw reply
* RE: [PATCH 2/6] dt-bindings: rtc: renesas,rz-rtca3: Add RZ/V2H support
From: Ovidiu Panait @ 2025-10-20 7:26 UTC (permalink / raw)
To: Krzysztof Kozlowski, Claudiu Beznea,
alexandre.belloni@bootlin.com, robh@kernel.org,
krzk+dt@kernel.org, conor+dt@kernel.org, geert+renesas@glider.be,
magnus.damm, mturquette@baylibre.com, sboyd@kernel.org,
p.zabel@pengutronix.de
Cc: linux-rtc@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-clk@vger.kernel.org
In-Reply-To: <67bff695-48ef-4b06-a434-aa5844f8d9c4@kernel.org>
Hi Krzysztof,
> -----Original Message-----
> From: Krzysztof Kozlowski <krzk@kernel.org>
> Sent: Sunday, October 19, 2025 12:30 PM
> To: Ovidiu Panait <ovidiu.panait.rb@renesas.com>; Claudiu Beznea
> <claudiu.beznea.uj@bp.renesas.com>; alexandre.belloni@bootlin.com;
> robh@kernel.org; krzk+dt@kernel.org; conor+dt@kernel.org;
> geert+renesas@glider.be; magnus.damm <magnus.damm@gmail.com>;
> mturquette@baylibre.com; sboyd@kernel.org; p.zabel@pengutronix.de
> Cc: linux-rtc@vger.kernel.org; linux-renesas-soc@vger.kernel.org;
> devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; linux-
> clk@vger.kernel.org
> Subject: Re: [PATCH 2/6] dt-bindings: rtc: renesas,rz-rtca3: Add RZ/V2H
> support
>
> On 19/10/2025 11:21, Ovidiu Panait wrote:
> > + - if:
> > + properties:
> > + compatible:
> > + contains:
> > + const: renesas,r9a09g057-rtca3
> > + then:
> > + properties:
> > + resets:
> > + items:
> > + - description: RTC reset
>
> So this is a completely different type of reset than VBATTB from earlier
> device?
Yes, this is different from the earlier device, as the RZ/V2H SoC
does not include a VBATTB block.
Ovidiu
>
> > + - description: Reset for the RTEST registers
> > +
>
> Best regards,
> Krzysztof
^ permalink raw reply
* Re: [PATCH 2/6] dt-bindings: rtc: renesas,rz-rtca3: Add RZ/V2H support
From: Krzysztof Kozlowski @ 2025-10-20 7:31 UTC (permalink / raw)
To: Ovidiu Panait, claudiu.beznea.uj, alexandre.belloni, robh,
krzk+dt, conor+dt, geert+renesas, magnus.damm, mturquette, sboyd,
p.zabel
Cc: linux-rtc, linux-renesas-soc, devicetree, linux-kernel, linux-clk
In-Reply-To: <20251019092106.5737-3-ovidiu.panait.rb@renesas.com>
On 19/10/2025 11:21, Ovidiu Panait wrote:
> The Renesas RZ/V2H RTC IP is based on the same RTCA3 IP as RZ/G3S
> (r9a08g045), with the following differences:
> - it lacks the time capture functionality
> - the maximum supported periodic interrupt frequency is 128Hz instead
> of 256Hz
> - it requires two reset lines instead of one
>
> Add new compatible string "renesas,r9a09g057-rtca3" for RZ/V2H and update
> the binding so that "resets" may have either one or two entries, depending
> on the compatible string.
>
> Signed-off-by: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
^ permalink raw reply
* RE: [PATCH 5/6] arm64: dts: renesas: r9a09g057: Add RTC node
From: Ovidiu Panait @ 2025-10-20 8:13 UTC (permalink / raw)
To: Biju Das, Claudiu Beznea, alexandre.belloni@bootlin.com,
robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
geert+renesas@glider.be, magnus.damm, mturquette@baylibre.com,
sboyd@kernel.org, p.zabel@pengutronix.de
Cc: linux-rtc@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-clk@vger.kernel.org
In-Reply-To: <TY3PR01MB11346CBE1C135CBEF82E3E7BE86F4A@TY3PR01MB11346.jpnprd01.prod.outlook.com>
Hi Biju,
> -----Original Message-----
> From: Biju Das <biju.das.jz@bp.renesas.com>
> Sent: Sunday, October 19, 2025 1:16 PM
> To: Ovidiu Panait <ovidiu.panait.rb@renesas.com>; Claudiu Beznea
> <claudiu.beznea.uj@bp.renesas.com>; alexandre.belloni@bootlin.com;
> robh@kernel.org; krzk+dt@kernel.org; conor+dt@kernel.org;
> geert+renesas@glider.be; magnus.damm <magnus.damm@gmail.com>;
> mturquette@baylibre.com; sboyd@kernel.org; p.zabel@pengutronix.de
> Cc: linux-rtc@vger.kernel.org; linux-renesas-soc@vger.kernel.org;
> devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; linux-
> clk@vger.kernel.org
> Subject: RE: [PATCH 5/6] arm64: dts: renesas: r9a09g057: Add RTC node
>
>
>
> > -----Original Message-----
> > From: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
> > Sent: 19 October 2025 10:21
> > Subject: [PATCH 5/6] arm64: dts: renesas: r9a09g057: Add RTC node
> >
> > Add RTC node to Renesas RZ/V2H ("R9A09G057") SoC DTSI.
> >
> > Signed-off-by: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
> > ---
> > arch/arm64/boot/dts/renesas/r9a09g057.dtsi | 14 ++++++++++++++
> > 1 file changed, 14 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
> b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
> > index 40b15f1db930..e426b9978e22 100644
> > --- a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
> > +++ b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
> > @@ -591,6 +591,20 @@ wdt3: watchdog@13000400 {
> > status = "disabled";
> > };
> >
> > + rtc: rtc@11c00800 {
> > + compatible = "renesas,r9a09g057-rtca3", "renesas,rz-
> rtca3";
> > + reg = <0 0x11c00800 0 0x400>;
> > + interrupts = <GIC_SPI 524 IRQ_TYPE_EDGE_RISING>,
> > + <GIC_SPI 525 IRQ_TYPE_EDGE_RISING>,
> > + <GIC_SPI 526 IRQ_TYPE_EDGE_RISING>;
> > + interrupt-names = "alarm", "period", "carry";
> > + clocks = <&cpg CPG_MOD 0x53>, <&rtxin_clk>;
> > + clock-names = "bus", "counter";
> > + power-domains = <&cpg>;
> > + resets = <&cpg 0x79>, <&cpg 0x7a>;
>
> Missing reset-names??
>
The resets are retrieved using devm_reset_control_array_get_shared(),
which does not rely on named reset entries. This keeps the
implementation minimal and keeps it in sync with RZ/G3S, which also
does not take the RTC reset by its name.
For this reason, I kept the rtca3 bindings without a reset-names property.
Best regards,
Ovidiu
> Cheers,
> Biju
>
> > + status = "disabled";
> > + };
> > +
> > scif: serial@11c01400 {
> > compatible = "renesas,scif-r9a09g057";
> > reg = <0 0x11c01400 0 0x400>;
> > --
> > 2.51.0
> >
^ permalink raw reply
* RE: [PATCH 5/6] arm64: dts: renesas: r9a09g057: Add RTC node
From: Biju Das @ 2025-10-20 8:25 UTC (permalink / raw)
To: Ovidiu Panait, Claudiu Beznea, alexandre.belloni@bootlin.com,
robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
geert+renesas@glider.be, magnus.damm, mturquette@baylibre.com,
sboyd@kernel.org, p.zabel@pengutronix.de
Cc: linux-rtc@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-clk@vger.kernel.org
In-Reply-To: <TY7PR01MB14910BB6AD621CC7BA42D56D4D3F5A@TY7PR01MB14910.jpnprd01.prod.outlook.com>
> -----Original Message-----
> From: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
> Sent: 20 October 2025 09:13
> Subject: RE: [PATCH 5/6] arm64: dts: renesas: r9a09g057: Add RTC node
>
> Hi Biju,
>
> > -----Original Message-----
> > From: Biju Das <biju.das.jz@bp.renesas.com>
> > Sent: Sunday, October 19, 2025 1:16 PM
> > To: Ovidiu Panait <ovidiu.panait.rb@renesas.com>; Claudiu Beznea
> > <claudiu.beznea.uj@bp.renesas.com>; alexandre.belloni@bootlin.com;
> > robh@kernel.org; krzk+dt@kernel.org; conor+dt@kernel.org;
> > geert+renesas@glider.be; magnus.damm <magnus.damm@gmail.com>;
> > mturquette@baylibre.com; sboyd@kernel.org; p.zabel@pengutronix.de
> > Cc: linux-rtc@vger.kernel.org; linux-renesas-soc@vger.kernel.org;
> > devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; linux-
> > clk@vger.kernel.org
> > Subject: RE: [PATCH 5/6] arm64: dts: renesas: r9a09g057: Add RTC node
> >
> >
> >
> > > -----Original Message-----
> > > From: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
> > > Sent: 19 October 2025 10:21
> > > Subject: [PATCH 5/6] arm64: dts: renesas: r9a09g057: Add RTC node
> > >
> > > Add RTC node to Renesas RZ/V2H ("R9A09G057") SoC DTSI.
> > >
> > > Signed-off-by: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
> > > ---
> > > arch/arm64/boot/dts/renesas/r9a09g057.dtsi | 14 ++++++++++++++
> > > 1 file changed, 14 insertions(+)
> > >
> > > diff --git a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
> > b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
> > > index 40b15f1db930..e426b9978e22 100644
> > > --- a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
> > > +++ b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
> > > @@ -591,6 +591,20 @@ wdt3: watchdog@13000400 {
> > > status = "disabled";
> > > };
> > >
> > > + rtc: rtc@11c00800 {
> > > + compatible = "renesas,r9a09g057-rtca3", "renesas,rz-
> > rtca3";
> > > + reg = <0 0x11c00800 0 0x400>;
> > > + interrupts = <GIC_SPI 524 IRQ_TYPE_EDGE_RISING>,
> > > + <GIC_SPI 525 IRQ_TYPE_EDGE_RISING>,
> > > + <GIC_SPI 526 IRQ_TYPE_EDGE_RISING>;
> > > + interrupt-names = "alarm", "period", "carry";
> > > + clocks = <&cpg CPG_MOD 0x53>, <&rtxin_clk>;
> > > + clock-names = "bus", "counter";
> > > + power-domains = <&cpg>;
> > > + resets = <&cpg 0x79>, <&cpg 0x7a>;
> >
> > Missing reset-names??
> >
>
> The resets are retrieved using devm_reset_control_array_get_shared(),
> which does not rely on named reset entries. This keeps the implementation minimal and keeps it in sync
> with RZ/G3S, which also does not take the RTC reset by its name.
>
> For this reason, I kept the rtca3 bindings without a reset-names property.
Thanks for the explanation.
Cheers,
Biju
^ permalink raw reply
* Re: [PATCH 5/6] arm64: dts: renesas: r9a09g057: Add RTC node
From: Philipp Zabel @ 2025-10-20 8:32 UTC (permalink / raw)
To: Ovidiu Panait, Biju Das, Claudiu Beznea,
alexandre.belloni@bootlin.com, robh@kernel.org,
krzk+dt@kernel.org, conor+dt@kernel.org, geert+renesas@glider.be,
magnus.damm, mturquette@baylibre.com, sboyd@kernel.org
Cc: linux-rtc@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-clk@vger.kernel.org
In-Reply-To: <TY7PR01MB14910BB6AD621CC7BA42D56D4D3F5A@TY7PR01MB14910.jpnprd01.prod.outlook.com>
On Mo, 2025-10-20 at 08:13 +0000, Ovidiu Panait wrote:
> Hi Biju,
>
> > -----Original Message-----
> > From: Biju Das <biju.das.jz@bp.renesas.com>
> > Sent: Sunday, October 19, 2025 1:16 PM
> > To: Ovidiu Panait <ovidiu.panait.rb@renesas.com>; Claudiu Beznea
> > <claudiu.beznea.uj@bp.renesas.com>; alexandre.belloni@bootlin.com;
> > robh@kernel.org; krzk+dt@kernel.org; conor+dt@kernel.org;
> > geert+renesas@glider.be; magnus.damm <magnus.damm@gmail.com>;
> > mturquette@baylibre.com; sboyd@kernel.org; p.zabel@pengutronix.de
> > Cc: linux-rtc@vger.kernel.org; linux-renesas-soc@vger.kernel.org;
> > devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; linux-
> > clk@vger.kernel.org
> > Subject: RE: [PATCH 5/6] arm64: dts: renesas: r9a09g057: Add RTC node
> >
> >
> >
> > > -----Original Message-----
> > > From: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
> > > Sent: 19 October 2025 10:21
> > > Subject: [PATCH 5/6] arm64: dts: renesas: r9a09g057: Add RTC node
> > >
> > > Add RTC node to Renesas RZ/V2H ("R9A09G057") SoC DTSI.
> > >
> > > Signed-off-by: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
> > > ---
> > > arch/arm64/boot/dts/renesas/r9a09g057.dtsi | 14 ++++++++++++++
> > > 1 file changed, 14 insertions(+)
> > >
> > > diff --git a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
> > b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
> > > index 40b15f1db930..e426b9978e22 100644
> > > --- a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
> > > +++ b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
> > > @@ -591,6 +591,20 @@ wdt3: watchdog@13000400 {
> > > status = "disabled";
> > > };
> > >
> > > + rtc: rtc@11c00800 {
> > > + compatible = "renesas,r9a09g057-rtca3", "renesas,rz-
> > rtca3";
> > > + reg = <0 0x11c00800 0 0x400>;
> > > + interrupts = <GIC_SPI 524 IRQ_TYPE_EDGE_RISING>,
> > > + <GIC_SPI 525 IRQ_TYPE_EDGE_RISING>,
> > > + <GIC_SPI 526 IRQ_TYPE_EDGE_RISING>;
> > > + interrupt-names = "alarm", "period", "carry";
> > > + clocks = <&cpg CPG_MOD 0x53>, <&rtxin_clk>;
> > > + clock-names = "bus", "counter";
> > > + power-domains = <&cpg>;
> > > + resets = <&cpg 0x79>, <&cpg 0x7a>;
> >
> > Missing reset-names??
> >
>
> The resets are retrieved using devm_reset_control_array_get_shared(),
The device tree bindings should be designed independently from the
driver implementation.
> which does not rely on named reset entries. This keeps the
> implementation minimal and keeps it in sync with RZ/G3S, which also
> does not take the RTC reset by its name.
>
> For this reason, I kept the rtca3 bindings without a reset-names property.
There is no need to use the reset names in the driver if they are just
toggled all at once, but unless you can guarantee that there will never
be a need to tell them apart, it would be safer to give them a name.
regards
Philipp
^ permalink raw reply
* [PATCH] rtc: amlogic-a4: fix double free caused by devm
From: Haotian Zhang @ 2025-10-20 15:09 UTC (permalink / raw)
To: Yiting Deng, Xianwei Zhao, Alexandre Belloni
Cc: linux-amlogic, linux-rtc, linux-kernel, stable, Haotian Zhang
The clock obtained via devm_clk_get_enabled() is automatically managed
by devres and will be disabled and freed on driver detach. Manually
calling clk_disable_unprepare() in error path and remove function
causes double free.
Remove the redundant clk_disable_unprepare() calls from the probe
error path and aml_rtc_remove(), allowing the devm framework to
automatically manage the clock lifecycle.
Fixes: c89ac9182ee2 ("rtc: support for the Amlogic on-chip RTC")
Signed-off-by: Haotian Zhang <vulab@iscas.ac.cn>
---
drivers/rtc/rtc-amlogic-a4.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/rtc/rtc-amlogic-a4.c b/drivers/rtc/rtc-amlogic-a4.c
index 1928b29c1045..ed36b649c057 100644
--- a/drivers/rtc/rtc-amlogic-a4.c
+++ b/drivers/rtc/rtc-amlogic-a4.c
@@ -390,7 +390,6 @@ static int aml_rtc_probe(struct platform_device *pdev)
return 0;
err_clk:
- clk_disable_unprepare(rtc->sys_clk);
device_init_wakeup(dev, false);
return ret;
@@ -425,7 +424,6 @@ static void aml_rtc_remove(struct platform_device *pdev)
{
struct aml_rtc_data *rtc = dev_get_drvdata(&pdev->dev);
- clk_disable_unprepare(rtc->sys_clk);
device_init_wakeup(&pdev->dev, false);
}
--
2.25.1
^ permalink raw reply related
* Re: [PATCH] rtc: tegra: Add ACPI support
From: Kartik Rajput @ 2025-10-21 6:36 UTC (permalink / raw)
To: Andy Shevchenko
Cc: alexandre.belloni, thierry.reding, jonathanh, linux-rtc,
linux-tegra, linux-kernel
In-Reply-To: <aO9Vmfm6jPplEQca@smile.fi.intel.com>
Hi Andy,
Thanks for reviewing the patch!
On 15/10/25 13:34, Andy Shevchenko wrote:
> External email: Use caution opening links or attachments
>
>
> On Fri, Sep 19, 2025 at 04:42:32PM +0530, Kartik Rajput wrote:
>> Add ACPI support for Tegra RTC, which is available on Tegra241 and
>> Tegra410. Both Tegra241 and Tegra410 use the same ACPI ID 'NVDA0280'.
>> The RTC clock is configured by UEFI before the kernel boots.
>
> ...
>
>> +#include <linux/acpi.h>
>
> No use.
>
Ack.
> ...
>
>> +static const struct acpi_device_id tegra_rtc_acpi_match[] = {
>> + { "NVDA0280", 0 },
>
> Drop redundant ', 0' part.
>
Ack.
>> + { }
>> +};
>
> ...
>
>> + if (is_of_node(dev_fwnode(&pdev->dev))) {
>
> Simple dev_of_node() will work here
>
Ack.
>> + info->clk = devm_clk_get(&pdev->dev, NULL);
>> + if (IS_ERR(info->clk))
>> + return PTR_ERR(info->clk);
>>
>> + ret = clk_prepare_enable(info->clk);
>> + if (ret < 0)
>> + return ret;
>> + }
>
> ...
>
>> disable_clk:
>> - clk_disable_unprepare(info->clk);
>> + if (is_of_node(dev_fwnode(&pdev->dev)))
>> + clk_disable_unprepare(info->clk);
>
> Redundant change. CLK APIs are NULL aware.
>
Ack. I will drop this check.
> ...
>
>> - clk_disable_unprepare(info->clk);
>> + if (is_of_node(dev_fwnode(&pdev->dev)))
>> + clk_disable_unprepare(info->clk);
>
> Ditto.
>
Ack.
> --
> With Best Regards,
> Andy Shevchenko
>
>
Thanks,
Kartik
^ permalink raw reply
* [PATCH v2 0/6] Add RTC support for the Renesas RZ/V2H SoC
From: Ovidiu Panait @ 2025-10-21 8:06 UTC (permalink / raw)
To: claudiu.beznea.uj, alexandre.belloni, robh, krzk+dt, conor+dt,
geert+renesas, magnus.damm, mturquette, sboyd, p.zabel
Cc: linux-rtc, linux-renesas-soc, devicetree, linux-kernel, linux-clk
Hi,
This series adds RTC support for the Renesas RZ/V2H SoC.
The Renesas RZ/V2H RTC IP is based on the same RTCA3 IP as RZ/G3S
(r9a08g045), with the following differences:
- it lacks the time capture functionality
- the maximum supported periodic interrupt frequency is 128Hz instead
of 256Hz
- it requires two reset lines instead of one
Best regards,
Ovidiu
v2:
- Updated bindings and RTC dts node with "reset-names" property.
Ovidiu Panait (6):
clk: renesas: r9a09g057: Add clock and reset entries for RTC
dt-bindings: rtc: renesas,rz-rtca3: Add RZ/V2H support
rtc: renesas-rtca3: Use OF data for configuration
rtc: renesas-rtca3: Add support for RZ/V2H SoC
arm64: dts: renesas: r9a09g057: Add RTC node
arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable RTC
.../bindings/rtc/renesas,rz-rtca3.yaml | 45 ++++++++++++++++---
arch/arm64/boot/dts/renesas/r9a09g057.dtsi | 15 +++++++
.../dts/renesas/r9a09g057h44-rzv2h-evk.dts | 4 ++
drivers/clk/renesas/r9a09g057-cpg.c | 4 ++
drivers/rtc/rtc-renesas-rtca3.c | 27 +++++++++--
5 files changed, 87 insertions(+), 8 deletions(-)
--
2.51.0
^ permalink raw reply
* [PATCH v2 1/6] clk: renesas: r9a09g057: Add clock and reset entries for RTC
From: Ovidiu Panait @ 2025-10-21 8:07 UTC (permalink / raw)
To: claudiu.beznea.uj, alexandre.belloni, robh, krzk+dt, conor+dt,
geert+renesas, magnus.damm, mturquette, sboyd, p.zabel
Cc: linux-rtc, linux-renesas-soc, devicetree, linux-kernel, linux-clk
In-Reply-To: <20251021080705.18116-1-ovidiu.panait.rb@renesas.com>
Add module clock and reset entries for the RTC module on the Renesas RZ/V2H
(R9A09G057) SoC.
Signed-off-by: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
---
v2 changes: none
drivers/clk/renesas/r9a09g057-cpg.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/clk/renesas/r9a09g057-cpg.c b/drivers/clk/renesas/r9a09g057-cpg.c
index c9c117c6782c..100cd56c323e 100644
--- a/drivers/clk/renesas/r9a09g057-cpg.c
+++ b/drivers/clk/renesas/r9a09g057-cpg.c
@@ -241,6 +241,8 @@ static const struct rzv2h_mod_clk r9a09g057_mod_clks[] __initconst = {
BUS_MSTOP(5, BIT(13))),
DEF_MOD("wdt_3_clk_loco", CLK_QEXTAL, 5, 2, 2, 18,
BUS_MSTOP(5, BIT(13))),
+ DEF_MOD("rtc_0_clk_rtc", CLK_PLLCM33_DIV16, 5, 3, 2, 19,
+ BUS_MSTOP(3, BIT(11) | BIT(12))),
DEF_MOD("rspi_0_pclk", CLK_PLLCLN_DIV8, 5, 4, 2, 20,
BUS_MSTOP(11, BIT(0))),
DEF_MOD("rspi_0_pclk_sfr", CLK_PLLCLN_DIV8, 5, 5, 2, 21,
@@ -411,6 +413,8 @@ static const struct rzv2h_reset r9a09g057_resets[] __initconst = {
DEF_RST(7, 6, 3, 7), /* WDT_1_RESET */
DEF_RST(7, 7, 3, 8), /* WDT_2_RESET */
DEF_RST(7, 8, 3, 9), /* WDT_3_RESET */
+ DEF_RST(7, 9, 3, 10), /* RTC_0_RST_RTC */
+ DEF_RST(7, 10, 3, 11), /* RTC_0_RST_RTC_V */
DEF_RST(7, 11, 3, 12), /* RSPI_0_PRESETN */
DEF_RST(7, 12, 3, 13), /* RSPI_0_TRESETN */
DEF_RST(7, 13, 3, 14), /* RSPI_1_PRESETN */
--
2.51.0
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