* [PATCH 1/6] clk: renesas: r9a09g057: Add clock and reset entries for RTC
From: Ovidiu Panait @ 2025-10-19 9:21 UTC (permalink / raw)
To: claudiu.beznea.uj, alexandre.belloni, robh, krzk+dt, conor+dt,
geert+renesas, magnus.damm, mturquette, sboyd, p.zabel
Cc: linux-rtc, linux-renesas-soc, devicetree, linux-kernel, linux-clk
In-Reply-To: <20251019092106.5737-1-ovidiu.panait.rb@renesas.com>
Add module clock and reset entries for the RTC module on the Renesas RZ/V2H
(R9A09G057) SoC.
Signed-off-by: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
---
drivers/clk/renesas/r9a09g057-cpg.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/clk/renesas/r9a09g057-cpg.c b/drivers/clk/renesas/r9a09g057-cpg.c
index c9c117c6782c..100cd56c323e 100644
--- a/drivers/clk/renesas/r9a09g057-cpg.c
+++ b/drivers/clk/renesas/r9a09g057-cpg.c
@@ -241,6 +241,8 @@ static const struct rzv2h_mod_clk r9a09g057_mod_clks[] __initconst = {
BUS_MSTOP(5, BIT(13))),
DEF_MOD("wdt_3_clk_loco", CLK_QEXTAL, 5, 2, 2, 18,
BUS_MSTOP(5, BIT(13))),
+ DEF_MOD("rtc_0_clk_rtc", CLK_PLLCM33_DIV16, 5, 3, 2, 19,
+ BUS_MSTOP(3, BIT(11) | BIT(12))),
DEF_MOD("rspi_0_pclk", CLK_PLLCLN_DIV8, 5, 4, 2, 20,
BUS_MSTOP(11, BIT(0))),
DEF_MOD("rspi_0_pclk_sfr", CLK_PLLCLN_DIV8, 5, 5, 2, 21,
@@ -411,6 +413,8 @@ static const struct rzv2h_reset r9a09g057_resets[] __initconst = {
DEF_RST(7, 6, 3, 7), /* WDT_1_RESET */
DEF_RST(7, 7, 3, 8), /* WDT_2_RESET */
DEF_RST(7, 8, 3, 9), /* WDT_3_RESET */
+ DEF_RST(7, 9, 3, 10), /* RTC_0_RST_RTC */
+ DEF_RST(7, 10, 3, 11), /* RTC_0_RST_RTC_V */
DEF_RST(7, 11, 3, 12), /* RSPI_0_PRESETN */
DEF_RST(7, 12, 3, 13), /* RSPI_0_TRESETN */
DEF_RST(7, 13, 3, 14), /* RSPI_1_PRESETN */
--
2.51.0
^ permalink raw reply related
* [PATCH 2/6] dt-bindings: rtc: renesas,rz-rtca3: Add RZ/V2H support
From: Ovidiu Panait @ 2025-10-19 9:21 UTC (permalink / raw)
To: claudiu.beznea.uj, alexandre.belloni, robh, krzk+dt, conor+dt,
geert+renesas, magnus.damm, mturquette, sboyd, p.zabel
Cc: linux-rtc, linux-renesas-soc, devicetree, linux-kernel, linux-clk
In-Reply-To: <20251019092106.5737-1-ovidiu.panait.rb@renesas.com>
The Renesas RZ/V2H RTC IP is based on the same RTCA3 IP as RZ/G3S
(r9a08g045), with the following differences:
- it lacks the time capture functionality
- the maximum supported periodic interrupt frequency is 128Hz instead
of 256Hz
- it requires two reset lines instead of one
Add new compatible string "renesas,r9a09g057-rtca3" for RZ/V2H and update
the binding so that "resets" may have either one or two entries, depending
on the compatible string.
Signed-off-by: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
---
.../bindings/rtc/renesas,rz-rtca3.yaml | 33 ++++++++++++++++---
1 file changed, 28 insertions(+), 5 deletions(-)
diff --git a/Documentation/devicetree/bindings/rtc/renesas,rz-rtca3.yaml b/Documentation/devicetree/bindings/rtc/renesas,rz-rtca3.yaml
index e70eeb66aa64..39a5c2483374 100644
--- a/Documentation/devicetree/bindings/rtc/renesas,rz-rtca3.yaml
+++ b/Documentation/devicetree/bindings/rtc/renesas,rz-rtca3.yaml
@@ -9,14 +9,12 @@ title: Renesas RTCA-3 Real Time Clock
maintainers:
- Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
-allOf:
- - $ref: rtc.yaml#
-
properties:
compatible:
items:
- enum:
- renesas,r9a08g045-rtca3 # RZ/G3S
+ - renesas,r9a09g057-rtca3 # RZ/V2H
- const: renesas,rz-rtca3
reg:
@@ -48,8 +46,8 @@ properties:
maxItems: 1
resets:
- items:
- - description: VBATTB module reset
+ minItems: 1
+ maxItems: 2
required:
- compatible
@@ -61,6 +59,31 @@ required:
- power-domains
- resets
+allOf:
+ - $ref: rtc.yaml#
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: renesas,r9a08g045-rtca3
+ then:
+ properties:
+ resets:
+ items:
+ - description: VBATTB module reset
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: renesas,r9a09g057-rtca3
+ then:
+ properties:
+ resets:
+ items:
+ - description: RTC reset
+ - description: Reset for the RTEST registers
+
additionalProperties: false
examples:
--
2.51.0
^ permalink raw reply related
* [PATCH 3/6] rtc: renesas-rtca3: Use OF data for configuration
From: Ovidiu Panait @ 2025-10-19 9:21 UTC (permalink / raw)
To: claudiu.beznea.uj, alexandre.belloni, robh, krzk+dt, conor+dt,
geert+renesas, magnus.damm, mturquette, sboyd, p.zabel
Cc: linux-rtc, linux-renesas-soc, devicetree, linux-kernel, linux-clk
In-Reply-To: <20251019092106.5737-1-ovidiu.panait.rb@renesas.com>
Prepare for adding support for the Renesas RZ/V2H SoC RTC IP by making the
driver configuration selectable via OF match data.
For RZ/V2H RTC, the maximum periodic interrupt frequency is 128Hz instead
of 256Hz, so add this info to a SoC-specific struct and retrieve it
during probe.
Signed-off-by: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
---
drivers/rtc/rtc-renesas-rtca3.c | 20 ++++++++++++++++++--
1 file changed, 18 insertions(+), 2 deletions(-)
diff --git a/drivers/rtc/rtc-renesas-rtca3.c b/drivers/rtc/rtc-renesas-rtca3.c
index ab816bdf0d77..90dda04fad33 100644
--- a/drivers/rtc/rtc-renesas-rtca3.c
+++ b/drivers/rtc/rtc-renesas-rtca3.c
@@ -101,6 +101,15 @@ enum rtca3_alrm_set_step {
RTCA3_ALRM_SSTEP_INIT = 3,
};
+/**
+ * struct rtca3_of_data - OF data for RTCA3
+ *
+ * @max_periodic_irq_freq: maximum periodic interrupt frequency
+ */
+struct rtca3_of_data {
+ int max_periodic_irq_freq;
+};
+
/**
* struct rtca3_ppb_per_cycle - PPB per cycle
* @ten_sec: PPB per cycle in 10 seconds adjutment mode
@@ -709,6 +718,7 @@ static void rtca3_action(void *data)
static int rtca3_probe(struct platform_device *pdev)
{
+ const struct rtca3_of_data *of_data;
struct device *dev = &pdev->dev;
struct rtca3_priv *priv;
struct clk *clk;
@@ -718,6 +728,8 @@ static int rtca3_probe(struct platform_device *pdev)
if (!priv)
return -ENOMEM;
+ of_data = of_device_get_match_data(dev);
+
priv->base = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(priv->base))
return PTR_ERR(priv->base);
@@ -772,7 +784,7 @@ static int rtca3_probe(struct platform_device *pdev)
return PTR_ERR(priv->rtc_dev);
priv->rtc_dev->ops = &rtca3_ops;
- priv->rtc_dev->max_user_freq = 256;
+ priv->rtc_dev->max_user_freq = of_data->max_periodic_irq_freq;
priv->rtc_dev->range_min = RTC_TIMESTAMP_BEGIN_2000;
priv->rtc_dev->range_max = RTC_TIMESTAMP_END_2099;
@@ -875,8 +887,12 @@ static int rtca3_resume(struct device *dev)
static DEFINE_SIMPLE_DEV_PM_OPS(rtca3_pm_ops, rtca3_suspend, rtca3_resume);
+static const struct rtca3_of_data rtca3_of_data = {
+ .max_periodic_irq_freq = 256,
+};
+
static const struct of_device_id rtca3_of_match[] = {
- { .compatible = "renesas,rz-rtca3", },
+ { .compatible = "renesas,rz-rtca3", .data = &rtca3_of_data },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, rtca3_of_match);
--
2.51.0
^ permalink raw reply related
* [PATCH 4/6] rtc: renesas-rtca3: Add support for RZ/V2H SoC
From: Ovidiu Panait @ 2025-10-19 9:21 UTC (permalink / raw)
To: claudiu.beznea.uj, alexandre.belloni, robh, krzk+dt, conor+dt,
geert+renesas, magnus.damm, mturquette, sboyd, p.zabel
Cc: linux-rtc, linux-renesas-soc, devicetree, linux-kernel, linux-clk
In-Reply-To: <20251019092106.5737-1-ovidiu.panait.rb@renesas.com>
Add a new compatible string for the Renesas RZ/V2H RTC along with the SoC
specific OF data, to account for the different maximum periodic interrupt
frequency (128Hz).
Also, switch from devm_reset_control_get_shared() to
devm_reset_control_array_get_shared() when retrieving resets.
The RZ/V2H SoC requires two resets for the RTC block instead of one,
so this will allow to handle multiple resets without additional changes.
Signed-off-by: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
---
drivers/rtc/rtc-renesas-rtca3.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/rtc/rtc-renesas-rtca3.c b/drivers/rtc/rtc-renesas-rtca3.c
index 90dda04fad33..96f5d3734d93 100644
--- a/drivers/rtc/rtc-renesas-rtca3.c
+++ b/drivers/rtc/rtc-renesas-rtca3.c
@@ -738,7 +738,7 @@ static int rtca3_probe(struct platform_device *pdev)
if (ret)
return ret;
- priv->rstc = devm_reset_control_get_shared(dev, NULL);
+ priv->rstc = devm_reset_control_array_get_shared(dev);
if (IS_ERR(priv->rstc))
return PTR_ERR(priv->rstc);
@@ -887,11 +887,16 @@ static int rtca3_resume(struct device *dev)
static DEFINE_SIMPLE_DEV_PM_OPS(rtca3_pm_ops, rtca3_suspend, rtca3_resume);
+static const struct rtca3_of_data rtca3_rzv2h_of_data = {
+ .max_periodic_irq_freq = 128,
+};
+
static const struct rtca3_of_data rtca3_of_data = {
.max_periodic_irq_freq = 256,
};
static const struct of_device_id rtca3_of_match[] = {
+ { .compatible = "renesas,r9a09g057-rtca3", .data = &rtca3_rzv2h_of_data },
{ .compatible = "renesas,rz-rtca3", .data = &rtca3_of_data },
{ /* sentinel */ }
};
--
2.51.0
^ permalink raw reply related
* [PATCH 5/6] arm64: dts: renesas: r9a09g057: Add RTC node
From: Ovidiu Panait @ 2025-10-19 9:21 UTC (permalink / raw)
To: claudiu.beznea.uj, alexandre.belloni, robh, krzk+dt, conor+dt,
geert+renesas, magnus.damm, mturquette, sboyd, p.zabel
Cc: linux-rtc, linux-renesas-soc, devicetree, linux-kernel, linux-clk
In-Reply-To: <20251019092106.5737-1-ovidiu.panait.rb@renesas.com>
Add RTC node to Renesas RZ/V2H ("R9A09G057") SoC DTSI.
Signed-off-by: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
---
arch/arm64/boot/dts/renesas/r9a09g057.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
index 40b15f1db930..e426b9978e22 100644
--- a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
@@ -591,6 +591,20 @@ wdt3: watchdog@13000400 {
status = "disabled";
};
+ rtc: rtc@11c00800 {
+ compatible = "renesas,r9a09g057-rtca3", "renesas,rz-rtca3";
+ reg = <0 0x11c00800 0 0x400>;
+ interrupts = <GIC_SPI 524 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 525 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 526 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "alarm", "period", "carry";
+ clocks = <&cpg CPG_MOD 0x53>, <&rtxin_clk>;
+ clock-names = "bus", "counter";
+ power-domains = <&cpg>;
+ resets = <&cpg 0x79>, <&cpg 0x7a>;
+ status = "disabled";
+ };
+
scif: serial@11c01400 {
compatible = "renesas,scif-r9a09g057";
reg = <0 0x11c01400 0 0x400>;
--
2.51.0
^ permalink raw reply related
* [PATCH 6/6] arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable RTC
From: Ovidiu Panait @ 2025-10-19 9:21 UTC (permalink / raw)
To: claudiu.beznea.uj, alexandre.belloni, robh, krzk+dt, conor+dt,
geert+renesas, magnus.damm, mturquette, sboyd, p.zabel
Cc: linux-rtc, linux-renesas-soc, devicetree, linux-kernel, linux-clk
In-Reply-To: <20251019092106.5737-1-ovidiu.panait.rb@renesas.com>
Enable RTC.
Signed-off-by: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
---
arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts b/arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts
index d0378c1c17a1..558270ad2ed1 100644
--- a/arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts
+++ b/arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts
@@ -408,6 +408,10 @@ &qextal_clk {
clock-frequency = <24000000>;
};
+&rtc {
+ status = "okay";
+};
+
&rtxin_clk {
clock-frequency = <32768>;
};
--
2.51.0
^ permalink raw reply related
* Re: [PATCH 2/6] dt-bindings: rtc: renesas,rz-rtca3: Add RZ/V2H support
From: Krzysztof Kozlowski @ 2025-10-19 9:29 UTC (permalink / raw)
To: Ovidiu Panait, claudiu.beznea.uj, alexandre.belloni, robh,
krzk+dt, conor+dt, geert+renesas, magnus.damm, mturquette, sboyd,
p.zabel
Cc: linux-rtc, linux-renesas-soc, devicetree, linux-kernel, linux-clk
In-Reply-To: <20251019092106.5737-3-ovidiu.panait.rb@renesas.com>
On 19/10/2025 11:21, Ovidiu Panait wrote:
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: renesas,r9a09g057-rtca3
> + then:
> + properties:
> + resets:
> + items:
> + - description: RTC reset
So this is a completely different type of reset than VBATTB from earlier
device?
> + - description: Reset for the RTEST registers
> +
Best regards,
Krzysztof
^ permalink raw reply
* RE: [PATCH 5/6] arm64: dts: renesas: r9a09g057: Add RTC node
From: Biju Das @ 2025-10-19 10:15 UTC (permalink / raw)
To: Ovidiu Panait, Claudiu Beznea, alexandre.belloni@bootlin.com,
robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
geert+renesas@glider.be, magnus.damm, mturquette@baylibre.com,
sboyd@kernel.org, p.zabel@pengutronix.de
Cc: linux-rtc@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-clk@vger.kernel.org
In-Reply-To: <20251019092106.5737-6-ovidiu.panait.rb@renesas.com>
> -----Original Message-----
> From: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
> Sent: 19 October 2025 10:21
> Subject: [PATCH 5/6] arm64: dts: renesas: r9a09g057: Add RTC node
>
> Add RTC node to Renesas RZ/V2H ("R9A09G057") SoC DTSI.
>
> Signed-off-by: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
> ---
> arch/arm64/boot/dts/renesas/r9a09g057.dtsi | 14 ++++++++++++++
> 1 file changed, 14 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
> index 40b15f1db930..e426b9978e22 100644
> --- a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
> @@ -591,6 +591,20 @@ wdt3: watchdog@13000400 {
> status = "disabled";
> };
>
> + rtc: rtc@11c00800 {
> + compatible = "renesas,r9a09g057-rtca3", "renesas,rz-rtca3";
> + reg = <0 0x11c00800 0 0x400>;
> + interrupts = <GIC_SPI 524 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 525 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 526 IRQ_TYPE_EDGE_RISING>;
> + interrupt-names = "alarm", "period", "carry";
> + clocks = <&cpg CPG_MOD 0x53>, <&rtxin_clk>;
> + clock-names = "bus", "counter";
> + power-domains = <&cpg>;
> + resets = <&cpg 0x79>, <&cpg 0x7a>;
Missing reset-names??
Cheers,
Biju
> + status = "disabled";
> + };
> +
> scif: serial@11c01400 {
> compatible = "renesas,scif-r9a09g057";
> reg = <0 0x11c01400 0 0x400>;
> --
> 2.51.0
>
^ permalink raw reply
* RE: [PATCH 2/6] dt-bindings: rtc: renesas,rz-rtca3: Add RZ/V2H support
From: Ovidiu Panait @ 2025-10-20 7:26 UTC (permalink / raw)
To: Krzysztof Kozlowski, Claudiu Beznea,
alexandre.belloni@bootlin.com, robh@kernel.org,
krzk+dt@kernel.org, conor+dt@kernel.org, geert+renesas@glider.be,
magnus.damm, mturquette@baylibre.com, sboyd@kernel.org,
p.zabel@pengutronix.de
Cc: linux-rtc@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-clk@vger.kernel.org
In-Reply-To: <67bff695-48ef-4b06-a434-aa5844f8d9c4@kernel.org>
Hi Krzysztof,
> -----Original Message-----
> From: Krzysztof Kozlowski <krzk@kernel.org>
> Sent: Sunday, October 19, 2025 12:30 PM
> To: Ovidiu Panait <ovidiu.panait.rb@renesas.com>; Claudiu Beznea
> <claudiu.beznea.uj@bp.renesas.com>; alexandre.belloni@bootlin.com;
> robh@kernel.org; krzk+dt@kernel.org; conor+dt@kernel.org;
> geert+renesas@glider.be; magnus.damm <magnus.damm@gmail.com>;
> mturquette@baylibre.com; sboyd@kernel.org; p.zabel@pengutronix.de
> Cc: linux-rtc@vger.kernel.org; linux-renesas-soc@vger.kernel.org;
> devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; linux-
> clk@vger.kernel.org
> Subject: Re: [PATCH 2/6] dt-bindings: rtc: renesas,rz-rtca3: Add RZ/V2H
> support
>
> On 19/10/2025 11:21, Ovidiu Panait wrote:
> > + - if:
> > + properties:
> > + compatible:
> > + contains:
> > + const: renesas,r9a09g057-rtca3
> > + then:
> > + properties:
> > + resets:
> > + items:
> > + - description: RTC reset
>
> So this is a completely different type of reset than VBATTB from earlier
> device?
Yes, this is different from the earlier device, as the RZ/V2H SoC
does not include a VBATTB block.
Ovidiu
>
> > + - description: Reset for the RTEST registers
> > +
>
> Best regards,
> Krzysztof
^ permalink raw reply
* Re: [PATCH 2/6] dt-bindings: rtc: renesas,rz-rtca3: Add RZ/V2H support
From: Krzysztof Kozlowski @ 2025-10-20 7:31 UTC (permalink / raw)
To: Ovidiu Panait, claudiu.beznea.uj, alexandre.belloni, robh,
krzk+dt, conor+dt, geert+renesas, magnus.damm, mturquette, sboyd,
p.zabel
Cc: linux-rtc, linux-renesas-soc, devicetree, linux-kernel, linux-clk
In-Reply-To: <20251019092106.5737-3-ovidiu.panait.rb@renesas.com>
On 19/10/2025 11:21, Ovidiu Panait wrote:
> The Renesas RZ/V2H RTC IP is based on the same RTCA3 IP as RZ/G3S
> (r9a08g045), with the following differences:
> - it lacks the time capture functionality
> - the maximum supported periodic interrupt frequency is 128Hz instead
> of 256Hz
> - it requires two reset lines instead of one
>
> Add new compatible string "renesas,r9a09g057-rtca3" for RZ/V2H and update
> the binding so that "resets" may have either one or two entries, depending
> on the compatible string.
>
> Signed-off-by: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
^ permalink raw reply
* RE: [PATCH 5/6] arm64: dts: renesas: r9a09g057: Add RTC node
From: Ovidiu Panait @ 2025-10-20 8:13 UTC (permalink / raw)
To: Biju Das, Claudiu Beznea, alexandre.belloni@bootlin.com,
robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
geert+renesas@glider.be, magnus.damm, mturquette@baylibre.com,
sboyd@kernel.org, p.zabel@pengutronix.de
Cc: linux-rtc@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-clk@vger.kernel.org
In-Reply-To: <TY3PR01MB11346CBE1C135CBEF82E3E7BE86F4A@TY3PR01MB11346.jpnprd01.prod.outlook.com>
Hi Biju,
> -----Original Message-----
> From: Biju Das <biju.das.jz@bp.renesas.com>
> Sent: Sunday, October 19, 2025 1:16 PM
> To: Ovidiu Panait <ovidiu.panait.rb@renesas.com>; Claudiu Beznea
> <claudiu.beznea.uj@bp.renesas.com>; alexandre.belloni@bootlin.com;
> robh@kernel.org; krzk+dt@kernel.org; conor+dt@kernel.org;
> geert+renesas@glider.be; magnus.damm <magnus.damm@gmail.com>;
> mturquette@baylibre.com; sboyd@kernel.org; p.zabel@pengutronix.de
> Cc: linux-rtc@vger.kernel.org; linux-renesas-soc@vger.kernel.org;
> devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; linux-
> clk@vger.kernel.org
> Subject: RE: [PATCH 5/6] arm64: dts: renesas: r9a09g057: Add RTC node
>
>
>
> > -----Original Message-----
> > From: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
> > Sent: 19 October 2025 10:21
> > Subject: [PATCH 5/6] arm64: dts: renesas: r9a09g057: Add RTC node
> >
> > Add RTC node to Renesas RZ/V2H ("R9A09G057") SoC DTSI.
> >
> > Signed-off-by: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
> > ---
> > arch/arm64/boot/dts/renesas/r9a09g057.dtsi | 14 ++++++++++++++
> > 1 file changed, 14 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
> b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
> > index 40b15f1db930..e426b9978e22 100644
> > --- a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
> > +++ b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
> > @@ -591,6 +591,20 @@ wdt3: watchdog@13000400 {
> > status = "disabled";
> > };
> >
> > + rtc: rtc@11c00800 {
> > + compatible = "renesas,r9a09g057-rtca3", "renesas,rz-
> rtca3";
> > + reg = <0 0x11c00800 0 0x400>;
> > + interrupts = <GIC_SPI 524 IRQ_TYPE_EDGE_RISING>,
> > + <GIC_SPI 525 IRQ_TYPE_EDGE_RISING>,
> > + <GIC_SPI 526 IRQ_TYPE_EDGE_RISING>;
> > + interrupt-names = "alarm", "period", "carry";
> > + clocks = <&cpg CPG_MOD 0x53>, <&rtxin_clk>;
> > + clock-names = "bus", "counter";
> > + power-domains = <&cpg>;
> > + resets = <&cpg 0x79>, <&cpg 0x7a>;
>
> Missing reset-names??
>
The resets are retrieved using devm_reset_control_array_get_shared(),
which does not rely on named reset entries. This keeps the
implementation minimal and keeps it in sync with RZ/G3S, which also
does not take the RTC reset by its name.
For this reason, I kept the rtca3 bindings without a reset-names property.
Best regards,
Ovidiu
> Cheers,
> Biju
>
> > + status = "disabled";
> > + };
> > +
> > scif: serial@11c01400 {
> > compatible = "renesas,scif-r9a09g057";
> > reg = <0 0x11c01400 0 0x400>;
> > --
> > 2.51.0
> >
^ permalink raw reply
* RE: [PATCH 5/6] arm64: dts: renesas: r9a09g057: Add RTC node
From: Biju Das @ 2025-10-20 8:25 UTC (permalink / raw)
To: Ovidiu Panait, Claudiu Beznea, alexandre.belloni@bootlin.com,
robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
geert+renesas@glider.be, magnus.damm, mturquette@baylibre.com,
sboyd@kernel.org, p.zabel@pengutronix.de
Cc: linux-rtc@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-clk@vger.kernel.org
In-Reply-To: <TY7PR01MB14910BB6AD621CC7BA42D56D4D3F5A@TY7PR01MB14910.jpnprd01.prod.outlook.com>
> -----Original Message-----
> From: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
> Sent: 20 October 2025 09:13
> Subject: RE: [PATCH 5/6] arm64: dts: renesas: r9a09g057: Add RTC node
>
> Hi Biju,
>
> > -----Original Message-----
> > From: Biju Das <biju.das.jz@bp.renesas.com>
> > Sent: Sunday, October 19, 2025 1:16 PM
> > To: Ovidiu Panait <ovidiu.panait.rb@renesas.com>; Claudiu Beznea
> > <claudiu.beznea.uj@bp.renesas.com>; alexandre.belloni@bootlin.com;
> > robh@kernel.org; krzk+dt@kernel.org; conor+dt@kernel.org;
> > geert+renesas@glider.be; magnus.damm <magnus.damm@gmail.com>;
> > mturquette@baylibre.com; sboyd@kernel.org; p.zabel@pengutronix.de
> > Cc: linux-rtc@vger.kernel.org; linux-renesas-soc@vger.kernel.org;
> > devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; linux-
> > clk@vger.kernel.org
> > Subject: RE: [PATCH 5/6] arm64: dts: renesas: r9a09g057: Add RTC node
> >
> >
> >
> > > -----Original Message-----
> > > From: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
> > > Sent: 19 October 2025 10:21
> > > Subject: [PATCH 5/6] arm64: dts: renesas: r9a09g057: Add RTC node
> > >
> > > Add RTC node to Renesas RZ/V2H ("R9A09G057") SoC DTSI.
> > >
> > > Signed-off-by: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
> > > ---
> > > arch/arm64/boot/dts/renesas/r9a09g057.dtsi | 14 ++++++++++++++
> > > 1 file changed, 14 insertions(+)
> > >
> > > diff --git a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
> > b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
> > > index 40b15f1db930..e426b9978e22 100644
> > > --- a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
> > > +++ b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
> > > @@ -591,6 +591,20 @@ wdt3: watchdog@13000400 {
> > > status = "disabled";
> > > };
> > >
> > > + rtc: rtc@11c00800 {
> > > + compatible = "renesas,r9a09g057-rtca3", "renesas,rz-
> > rtca3";
> > > + reg = <0 0x11c00800 0 0x400>;
> > > + interrupts = <GIC_SPI 524 IRQ_TYPE_EDGE_RISING>,
> > > + <GIC_SPI 525 IRQ_TYPE_EDGE_RISING>,
> > > + <GIC_SPI 526 IRQ_TYPE_EDGE_RISING>;
> > > + interrupt-names = "alarm", "period", "carry";
> > > + clocks = <&cpg CPG_MOD 0x53>, <&rtxin_clk>;
> > > + clock-names = "bus", "counter";
> > > + power-domains = <&cpg>;
> > > + resets = <&cpg 0x79>, <&cpg 0x7a>;
> >
> > Missing reset-names??
> >
>
> The resets are retrieved using devm_reset_control_array_get_shared(),
> which does not rely on named reset entries. This keeps the implementation minimal and keeps it in sync
> with RZ/G3S, which also does not take the RTC reset by its name.
>
> For this reason, I kept the rtca3 bindings without a reset-names property.
Thanks for the explanation.
Cheers,
Biju
^ permalink raw reply
* Re: [PATCH 5/6] arm64: dts: renesas: r9a09g057: Add RTC node
From: Philipp Zabel @ 2025-10-20 8:32 UTC (permalink / raw)
To: Ovidiu Panait, Biju Das, Claudiu Beznea,
alexandre.belloni@bootlin.com, robh@kernel.org,
krzk+dt@kernel.org, conor+dt@kernel.org, geert+renesas@glider.be,
magnus.damm, mturquette@baylibre.com, sboyd@kernel.org
Cc: linux-rtc@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-clk@vger.kernel.org
In-Reply-To: <TY7PR01MB14910BB6AD621CC7BA42D56D4D3F5A@TY7PR01MB14910.jpnprd01.prod.outlook.com>
On Mo, 2025-10-20 at 08:13 +0000, Ovidiu Panait wrote:
> Hi Biju,
>
> > -----Original Message-----
> > From: Biju Das <biju.das.jz@bp.renesas.com>
> > Sent: Sunday, October 19, 2025 1:16 PM
> > To: Ovidiu Panait <ovidiu.panait.rb@renesas.com>; Claudiu Beznea
> > <claudiu.beznea.uj@bp.renesas.com>; alexandre.belloni@bootlin.com;
> > robh@kernel.org; krzk+dt@kernel.org; conor+dt@kernel.org;
> > geert+renesas@glider.be; magnus.damm <magnus.damm@gmail.com>;
> > mturquette@baylibre.com; sboyd@kernel.org; p.zabel@pengutronix.de
> > Cc: linux-rtc@vger.kernel.org; linux-renesas-soc@vger.kernel.org;
> > devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; linux-
> > clk@vger.kernel.org
> > Subject: RE: [PATCH 5/6] arm64: dts: renesas: r9a09g057: Add RTC node
> >
> >
> >
> > > -----Original Message-----
> > > From: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
> > > Sent: 19 October 2025 10:21
> > > Subject: [PATCH 5/6] arm64: dts: renesas: r9a09g057: Add RTC node
> > >
> > > Add RTC node to Renesas RZ/V2H ("R9A09G057") SoC DTSI.
> > >
> > > Signed-off-by: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
> > > ---
> > > arch/arm64/boot/dts/renesas/r9a09g057.dtsi | 14 ++++++++++++++
> > > 1 file changed, 14 insertions(+)
> > >
> > > diff --git a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
> > b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
> > > index 40b15f1db930..e426b9978e22 100644
> > > --- a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
> > > +++ b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
> > > @@ -591,6 +591,20 @@ wdt3: watchdog@13000400 {
> > > status = "disabled";
> > > };
> > >
> > > + rtc: rtc@11c00800 {
> > > + compatible = "renesas,r9a09g057-rtca3", "renesas,rz-
> > rtca3";
> > > + reg = <0 0x11c00800 0 0x400>;
> > > + interrupts = <GIC_SPI 524 IRQ_TYPE_EDGE_RISING>,
> > > + <GIC_SPI 525 IRQ_TYPE_EDGE_RISING>,
> > > + <GIC_SPI 526 IRQ_TYPE_EDGE_RISING>;
> > > + interrupt-names = "alarm", "period", "carry";
> > > + clocks = <&cpg CPG_MOD 0x53>, <&rtxin_clk>;
> > > + clock-names = "bus", "counter";
> > > + power-domains = <&cpg>;
> > > + resets = <&cpg 0x79>, <&cpg 0x7a>;
> >
> > Missing reset-names??
> >
>
> The resets are retrieved using devm_reset_control_array_get_shared(),
The device tree bindings should be designed independently from the
driver implementation.
> which does not rely on named reset entries. This keeps the
> implementation minimal and keeps it in sync with RZ/G3S, which also
> does not take the RTC reset by its name.
>
> For this reason, I kept the rtca3 bindings without a reset-names property.
There is no need to use the reset names in the driver if they are just
toggled all at once, but unless you can guarantee that there will never
be a need to tell them apart, it would be safer to give them a name.
regards
Philipp
^ permalink raw reply
* [PATCH] rtc: amlogic-a4: fix double free caused by devm
From: Haotian Zhang @ 2025-10-20 15:09 UTC (permalink / raw)
To: Yiting Deng, Xianwei Zhao, Alexandre Belloni
Cc: linux-amlogic, linux-rtc, linux-kernel, stable, Haotian Zhang
The clock obtained via devm_clk_get_enabled() is automatically managed
by devres and will be disabled and freed on driver detach. Manually
calling clk_disable_unprepare() in error path and remove function
causes double free.
Remove the redundant clk_disable_unprepare() calls from the probe
error path and aml_rtc_remove(), allowing the devm framework to
automatically manage the clock lifecycle.
Fixes: c89ac9182ee2 ("rtc: support for the Amlogic on-chip RTC")
Signed-off-by: Haotian Zhang <vulab@iscas.ac.cn>
---
drivers/rtc/rtc-amlogic-a4.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/rtc/rtc-amlogic-a4.c b/drivers/rtc/rtc-amlogic-a4.c
index 1928b29c1045..ed36b649c057 100644
--- a/drivers/rtc/rtc-amlogic-a4.c
+++ b/drivers/rtc/rtc-amlogic-a4.c
@@ -390,7 +390,6 @@ static int aml_rtc_probe(struct platform_device *pdev)
return 0;
err_clk:
- clk_disable_unprepare(rtc->sys_clk);
device_init_wakeup(dev, false);
return ret;
@@ -425,7 +424,6 @@ static void aml_rtc_remove(struct platform_device *pdev)
{
struct aml_rtc_data *rtc = dev_get_drvdata(&pdev->dev);
- clk_disable_unprepare(rtc->sys_clk);
device_init_wakeup(&pdev->dev, false);
}
--
2.25.1
^ permalink raw reply related
* Re: [PATCH] rtc: tegra: Add ACPI support
From: Kartik Rajput @ 2025-10-21 6:36 UTC (permalink / raw)
To: Andy Shevchenko
Cc: alexandre.belloni, thierry.reding, jonathanh, linux-rtc,
linux-tegra, linux-kernel
In-Reply-To: <aO9Vmfm6jPplEQca@smile.fi.intel.com>
Hi Andy,
Thanks for reviewing the patch!
On 15/10/25 13:34, Andy Shevchenko wrote:
> External email: Use caution opening links or attachments
>
>
> On Fri, Sep 19, 2025 at 04:42:32PM +0530, Kartik Rajput wrote:
>> Add ACPI support for Tegra RTC, which is available on Tegra241 and
>> Tegra410. Both Tegra241 and Tegra410 use the same ACPI ID 'NVDA0280'.
>> The RTC clock is configured by UEFI before the kernel boots.
>
> ...
>
>> +#include <linux/acpi.h>
>
> No use.
>
Ack.
> ...
>
>> +static const struct acpi_device_id tegra_rtc_acpi_match[] = {
>> + { "NVDA0280", 0 },
>
> Drop redundant ', 0' part.
>
Ack.
>> + { }
>> +};
>
> ...
>
>> + if (is_of_node(dev_fwnode(&pdev->dev))) {
>
> Simple dev_of_node() will work here
>
Ack.
>> + info->clk = devm_clk_get(&pdev->dev, NULL);
>> + if (IS_ERR(info->clk))
>> + return PTR_ERR(info->clk);
>>
>> + ret = clk_prepare_enable(info->clk);
>> + if (ret < 0)
>> + return ret;
>> + }
>
> ...
>
>> disable_clk:
>> - clk_disable_unprepare(info->clk);
>> + if (is_of_node(dev_fwnode(&pdev->dev)))
>> + clk_disable_unprepare(info->clk);
>
> Redundant change. CLK APIs are NULL aware.
>
Ack. I will drop this check.
> ...
>
>> - clk_disable_unprepare(info->clk);
>> + if (is_of_node(dev_fwnode(&pdev->dev)))
>> + clk_disable_unprepare(info->clk);
>
> Ditto.
>
Ack.
> --
> With Best Regards,
> Andy Shevchenko
>
>
Thanks,
Kartik
^ permalink raw reply
* [PATCH v2 0/6] Add RTC support for the Renesas RZ/V2H SoC
From: Ovidiu Panait @ 2025-10-21 8:06 UTC (permalink / raw)
To: claudiu.beznea.uj, alexandre.belloni, robh, krzk+dt, conor+dt,
geert+renesas, magnus.damm, mturquette, sboyd, p.zabel
Cc: linux-rtc, linux-renesas-soc, devicetree, linux-kernel, linux-clk
Hi,
This series adds RTC support for the Renesas RZ/V2H SoC.
The Renesas RZ/V2H RTC IP is based on the same RTCA3 IP as RZ/G3S
(r9a08g045), with the following differences:
- it lacks the time capture functionality
- the maximum supported periodic interrupt frequency is 128Hz instead
of 256Hz
- it requires two reset lines instead of one
Best regards,
Ovidiu
v2:
- Updated bindings and RTC dts node with "reset-names" property.
Ovidiu Panait (6):
clk: renesas: r9a09g057: Add clock and reset entries for RTC
dt-bindings: rtc: renesas,rz-rtca3: Add RZ/V2H support
rtc: renesas-rtca3: Use OF data for configuration
rtc: renesas-rtca3: Add support for RZ/V2H SoC
arm64: dts: renesas: r9a09g057: Add RTC node
arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable RTC
.../bindings/rtc/renesas,rz-rtca3.yaml | 45 ++++++++++++++++---
arch/arm64/boot/dts/renesas/r9a09g057.dtsi | 15 +++++++
.../dts/renesas/r9a09g057h44-rzv2h-evk.dts | 4 ++
drivers/clk/renesas/r9a09g057-cpg.c | 4 ++
drivers/rtc/rtc-renesas-rtca3.c | 27 +++++++++--
5 files changed, 87 insertions(+), 8 deletions(-)
--
2.51.0
^ permalink raw reply
* [PATCH v2 1/6] clk: renesas: r9a09g057: Add clock and reset entries for RTC
From: Ovidiu Panait @ 2025-10-21 8:07 UTC (permalink / raw)
To: claudiu.beznea.uj, alexandre.belloni, robh, krzk+dt, conor+dt,
geert+renesas, magnus.damm, mturquette, sboyd, p.zabel
Cc: linux-rtc, linux-renesas-soc, devicetree, linux-kernel, linux-clk
In-Reply-To: <20251021080705.18116-1-ovidiu.panait.rb@renesas.com>
Add module clock and reset entries for the RTC module on the Renesas RZ/V2H
(R9A09G057) SoC.
Signed-off-by: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
---
v2 changes: none
drivers/clk/renesas/r9a09g057-cpg.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/clk/renesas/r9a09g057-cpg.c b/drivers/clk/renesas/r9a09g057-cpg.c
index c9c117c6782c..100cd56c323e 100644
--- a/drivers/clk/renesas/r9a09g057-cpg.c
+++ b/drivers/clk/renesas/r9a09g057-cpg.c
@@ -241,6 +241,8 @@ static const struct rzv2h_mod_clk r9a09g057_mod_clks[] __initconst = {
BUS_MSTOP(5, BIT(13))),
DEF_MOD("wdt_3_clk_loco", CLK_QEXTAL, 5, 2, 2, 18,
BUS_MSTOP(5, BIT(13))),
+ DEF_MOD("rtc_0_clk_rtc", CLK_PLLCM33_DIV16, 5, 3, 2, 19,
+ BUS_MSTOP(3, BIT(11) | BIT(12))),
DEF_MOD("rspi_0_pclk", CLK_PLLCLN_DIV8, 5, 4, 2, 20,
BUS_MSTOP(11, BIT(0))),
DEF_MOD("rspi_0_pclk_sfr", CLK_PLLCLN_DIV8, 5, 5, 2, 21,
@@ -411,6 +413,8 @@ static const struct rzv2h_reset r9a09g057_resets[] __initconst = {
DEF_RST(7, 6, 3, 7), /* WDT_1_RESET */
DEF_RST(7, 7, 3, 8), /* WDT_2_RESET */
DEF_RST(7, 8, 3, 9), /* WDT_3_RESET */
+ DEF_RST(7, 9, 3, 10), /* RTC_0_RST_RTC */
+ DEF_RST(7, 10, 3, 11), /* RTC_0_RST_RTC_V */
DEF_RST(7, 11, 3, 12), /* RSPI_0_PRESETN */
DEF_RST(7, 12, 3, 13), /* RSPI_0_TRESETN */
DEF_RST(7, 13, 3, 14), /* RSPI_1_PRESETN */
--
2.51.0
^ permalink raw reply related
* [PATCH v2 2/6] dt-bindings: rtc: renesas,rz-rtca3: Add RZ/V2H support
From: Ovidiu Panait @ 2025-10-21 8:07 UTC (permalink / raw)
To: claudiu.beznea.uj, alexandre.belloni, robh, krzk+dt, conor+dt,
geert+renesas, magnus.damm, mturquette, sboyd, p.zabel
Cc: linux-rtc, linux-renesas-soc, devicetree, linux-kernel, linux-clk
In-Reply-To: <20251021080705.18116-1-ovidiu.panait.rb@renesas.com>
The Renesas RZ/V2H RTC IP is based on the same RTCA3 IP as RZ/G3S
(r9a08g045), with the following differences:
- It lacks the time capture functionality
- The maximum supported periodic interrupt frequency is 128Hz instead
of 256Hz
- It requires two reset lines instead of one
Add new compatible string "renesas,r9a09g057-rtca3" for RZ/V2H and update
the binding accordingly:
- Allow "resets" to contain one or two entries depending on the SoC.
- Add "reset-names" property, but make it required only for RZ/V2H.
Signed-off-by: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
---
v2 changes:
- Added "reset-names" property and made it required for RZ/V2H.
.../bindings/rtc/renesas,rz-rtca3.yaml | 45 ++++++++++++++++---
1 file changed, 40 insertions(+), 5 deletions(-)
diff --git a/Documentation/devicetree/bindings/rtc/renesas,rz-rtca3.yaml b/Documentation/devicetree/bindings/rtc/renesas,rz-rtca3.yaml
index e70eeb66aa64..2569cb494481 100644
--- a/Documentation/devicetree/bindings/rtc/renesas,rz-rtca3.yaml
+++ b/Documentation/devicetree/bindings/rtc/renesas,rz-rtca3.yaml
@@ -9,14 +9,12 @@ title: Renesas RTCA-3 Real Time Clock
maintainers:
- Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
-allOf:
- - $ref: rtc.yaml#
-
properties:
compatible:
items:
- enum:
- renesas,r9a08g045-rtca3 # RZ/G3S
+ - renesas,r9a09g057-rtca3 # RZ/V2H
- const: renesas,rz-rtca3
reg:
@@ -48,8 +46,12 @@ properties:
maxItems: 1
resets:
- items:
- - description: VBATTB module reset
+ minItems: 1
+ maxItems: 2
+
+ reset-names:
+ minItems: 1
+ maxItems: 2
required:
- compatible
@@ -61,6 +63,39 @@ required:
- power-domains
- resets
+allOf:
+ - $ref: rtc.yaml#
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: renesas,r9a08g045-rtca3
+ then:
+ properties:
+ resets:
+ items:
+ - description: VBATTB module reset
+ reset-names:
+ const: vbattb
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: renesas,r9a09g057-rtca3
+ then:
+ properties:
+ resets:
+ items:
+ - description: RTC reset
+ - description: Reset for the RTEST registers
+ reset-names:
+ items:
+ - const: rtc
+ - const: rtc_rtest
+ required:
+ - reset-names
+
additionalProperties: false
examples:
--
2.51.0
^ permalink raw reply related
* [PATCH v2 3/6] rtc: renesas-rtca3: Use OF data for configuration
From: Ovidiu Panait @ 2025-10-21 8:07 UTC (permalink / raw)
To: claudiu.beznea.uj, alexandre.belloni, robh, krzk+dt, conor+dt,
geert+renesas, magnus.damm, mturquette, sboyd, p.zabel
Cc: linux-rtc, linux-renesas-soc, devicetree, linux-kernel, linux-clk
In-Reply-To: <20251021080705.18116-1-ovidiu.panait.rb@renesas.com>
Prepare for adding support for the Renesas RZ/V2H SoC RTC IP by making the
driver configuration selectable via OF match data.
For RZ/V2H RTC, the maximum periodic interrupt frequency is 128Hz instead
of 256Hz, so add this info to a SoC-specific struct and retrieve it
during probe.
Signed-off-by: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
---
v2 changes: none
drivers/rtc/rtc-renesas-rtca3.c | 20 ++++++++++++++++++--
1 file changed, 18 insertions(+), 2 deletions(-)
diff --git a/drivers/rtc/rtc-renesas-rtca3.c b/drivers/rtc/rtc-renesas-rtca3.c
index ab816bdf0d77..90dda04fad33 100644
--- a/drivers/rtc/rtc-renesas-rtca3.c
+++ b/drivers/rtc/rtc-renesas-rtca3.c
@@ -101,6 +101,15 @@ enum rtca3_alrm_set_step {
RTCA3_ALRM_SSTEP_INIT = 3,
};
+/**
+ * struct rtca3_of_data - OF data for RTCA3
+ *
+ * @max_periodic_irq_freq: maximum periodic interrupt frequency
+ */
+struct rtca3_of_data {
+ int max_periodic_irq_freq;
+};
+
/**
* struct rtca3_ppb_per_cycle - PPB per cycle
* @ten_sec: PPB per cycle in 10 seconds adjutment mode
@@ -709,6 +718,7 @@ static void rtca3_action(void *data)
static int rtca3_probe(struct platform_device *pdev)
{
+ const struct rtca3_of_data *of_data;
struct device *dev = &pdev->dev;
struct rtca3_priv *priv;
struct clk *clk;
@@ -718,6 +728,8 @@ static int rtca3_probe(struct platform_device *pdev)
if (!priv)
return -ENOMEM;
+ of_data = of_device_get_match_data(dev);
+
priv->base = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(priv->base))
return PTR_ERR(priv->base);
@@ -772,7 +784,7 @@ static int rtca3_probe(struct platform_device *pdev)
return PTR_ERR(priv->rtc_dev);
priv->rtc_dev->ops = &rtca3_ops;
- priv->rtc_dev->max_user_freq = 256;
+ priv->rtc_dev->max_user_freq = of_data->max_periodic_irq_freq;
priv->rtc_dev->range_min = RTC_TIMESTAMP_BEGIN_2000;
priv->rtc_dev->range_max = RTC_TIMESTAMP_END_2099;
@@ -875,8 +887,12 @@ static int rtca3_resume(struct device *dev)
static DEFINE_SIMPLE_DEV_PM_OPS(rtca3_pm_ops, rtca3_suspend, rtca3_resume);
+static const struct rtca3_of_data rtca3_of_data = {
+ .max_periodic_irq_freq = 256,
+};
+
static const struct of_device_id rtca3_of_match[] = {
- { .compatible = "renesas,rz-rtca3", },
+ { .compatible = "renesas,rz-rtca3", .data = &rtca3_of_data },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, rtca3_of_match);
--
2.51.0
^ permalink raw reply related
* [PATCH v2 4/6] rtc: renesas-rtca3: Add support for RZ/V2H SoC
From: Ovidiu Panait @ 2025-10-21 8:07 UTC (permalink / raw)
To: claudiu.beznea.uj, alexandre.belloni, robh, krzk+dt, conor+dt,
geert+renesas, magnus.damm, mturquette, sboyd, p.zabel
Cc: linux-rtc, linux-renesas-soc, devicetree, linux-kernel, linux-clk
In-Reply-To: <20251021080705.18116-1-ovidiu.panait.rb@renesas.com>
Add a new compatible string for the Renesas RZ/V2H RTC along with the SoC
specific OF data, to account for the different maximum periodic interrupt
frequency (128Hz).
Also, switch from devm_reset_control_get_shared() to
devm_reset_control_array_get_shared() when retrieving resets.
The RZ/V2H SoC requires two resets for the RTC block instead of one,
so this will allow to handle multiple resets without additional changes.
Signed-off-by: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
---
v2 changes: none
drivers/rtc/rtc-renesas-rtca3.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/rtc/rtc-renesas-rtca3.c b/drivers/rtc/rtc-renesas-rtca3.c
index 90dda04fad33..96f5d3734d93 100644
--- a/drivers/rtc/rtc-renesas-rtca3.c
+++ b/drivers/rtc/rtc-renesas-rtca3.c
@@ -738,7 +738,7 @@ static int rtca3_probe(struct platform_device *pdev)
if (ret)
return ret;
- priv->rstc = devm_reset_control_get_shared(dev, NULL);
+ priv->rstc = devm_reset_control_array_get_shared(dev);
if (IS_ERR(priv->rstc))
return PTR_ERR(priv->rstc);
@@ -887,11 +887,16 @@ static int rtca3_resume(struct device *dev)
static DEFINE_SIMPLE_DEV_PM_OPS(rtca3_pm_ops, rtca3_suspend, rtca3_resume);
+static const struct rtca3_of_data rtca3_rzv2h_of_data = {
+ .max_periodic_irq_freq = 128,
+};
+
static const struct rtca3_of_data rtca3_of_data = {
.max_periodic_irq_freq = 256,
};
static const struct of_device_id rtca3_of_match[] = {
+ { .compatible = "renesas,r9a09g057-rtca3", .data = &rtca3_rzv2h_of_data },
{ .compatible = "renesas,rz-rtca3", .data = &rtca3_of_data },
{ /* sentinel */ }
};
--
2.51.0
^ permalink raw reply related
* [PATCH v2 5/6] arm64: dts: renesas: r9a09g057: Add RTC node
From: Ovidiu Panait @ 2025-10-21 8:07 UTC (permalink / raw)
To: claudiu.beznea.uj, alexandre.belloni, robh, krzk+dt, conor+dt,
geert+renesas, magnus.damm, mturquette, sboyd, p.zabel
Cc: linux-rtc, linux-renesas-soc, devicetree, linux-kernel, linux-clk
In-Reply-To: <20251021080705.18116-1-ovidiu.panait.rb@renesas.com>
Add RTC node to Renesas RZ/V2H ("R9A09G057") SoC DTSI.
Signed-off-by: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
---
v2 changes:
- Added "reset-names" to RTC dts node.
arch/arm64/boot/dts/renesas/r9a09g057.dtsi | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
index 40b15f1db930..724c4ce95c95 100644
--- a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
@@ -591,6 +591,21 @@ wdt3: watchdog@13000400 {
status = "disabled";
};
+ rtc: rtc@11c00800 {
+ compatible = "renesas,r9a09g057-rtca3", "renesas,rz-rtca3";
+ reg = <0 0x11c00800 0 0x400>;
+ interrupts = <GIC_SPI 524 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 525 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 526 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "alarm", "period", "carry";
+ clocks = <&cpg CPG_MOD 0x53>, <&rtxin_clk>;
+ clock-names = "bus", "counter";
+ power-domains = <&cpg>;
+ resets = <&cpg 0x79>, <&cpg 0x7a>;
+ reset-names = "rtc", "rtc_rtest";
+ status = "disabled";
+ };
+
scif: serial@11c01400 {
compatible = "renesas,scif-r9a09g057";
reg = <0 0x11c01400 0 0x400>;
--
2.51.0
^ permalink raw reply related
* [PATCH v2 6/6] arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable RTC
From: Ovidiu Panait @ 2025-10-21 8:07 UTC (permalink / raw)
To: claudiu.beznea.uj, alexandre.belloni, robh, krzk+dt, conor+dt,
geert+renesas, magnus.damm, mturquette, sboyd, p.zabel
Cc: linux-rtc, linux-renesas-soc, devicetree, linux-kernel, linux-clk
In-Reply-To: <20251021080705.18116-1-ovidiu.panait.rb@renesas.com>
Enable RTC.
Signed-off-by: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
---
v2 changes: none
arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts b/arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts
index 3215ce53fe33..f20b63acca00 100644
--- a/arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts
+++ b/arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts
@@ -408,6 +408,10 @@ &qextal_clk {
clock-frequency = <24000000>;
};
+&rtc {
+ status = "okay";
+};
+
&rtxin_clk {
clock-frequency = <32768>;
};
--
2.51.0
^ permalink raw reply related
* Re: [PATCH] rtc: amlogic-a4: fix double free caused by devm
From: kernel test robot @ 2025-10-21 9:29 UTC (permalink / raw)
To: Haotian Zhang, Yiting Deng, Xianwei Zhao, Alexandre Belloni
Cc: llvm, oe-kbuild-all, linux-amlogic, linux-rtc, linux-kernel,
stable, Haotian Zhang
In-Reply-To: <20251020150956.491-1-vulab@iscas.ac.cn>
Hi Haotian,
kernel test robot noticed the following build warnings:
[auto build test WARNING on abelloni/rtc-next]
[also build test WARNING on linus/master v6.18-rc2 next-20251021]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Haotian-Zhang/rtc-amlogic-a4-fix-double-free-caused-by-devm/20251020-231345
base: https://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux.git rtc-next
patch link: https://lore.kernel.org/r/20251020150956.491-1-vulab%40iscas.ac.cn
patch subject: [PATCH] rtc: amlogic-a4: fix double free caused by devm
config: i386-buildonly-randconfig-002-20251021 (https://download.01.org/0day-ci/archive/20251021/202510211756.vnQ8ZIWo-lkp@intel.com/config)
compiler: clang version 20.1.8 (https://github.com/llvm/llvm-project 87f0227cb60147a26a1eeb4fb06e3b505e9c7261)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20251021/202510211756.vnQ8ZIWo-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202510211756.vnQ8ZIWo-lkp@intel.com/
All warnings (new ones prefixed by >>):
>> drivers/rtc/rtc-amlogic-a4.c:425:23: warning: unused variable 'rtc' [-Wunused-variable]
425 | struct aml_rtc_data *rtc = dev_get_drvdata(&pdev->dev);
| ^~~
1 warning generated.
vim +/rtc +425 drivers/rtc/rtc-amlogic-a4.c
c89ac9182ee297 Yiting Deng 2024-11-12 419
c89ac9182ee297 Yiting Deng 2024-11-12 420 static SIMPLE_DEV_PM_OPS(aml_rtc_pm_ops,
c89ac9182ee297 Yiting Deng 2024-11-12 421 aml_rtc_suspend, aml_rtc_resume);
c89ac9182ee297 Yiting Deng 2024-11-12 422
c89ac9182ee297 Yiting Deng 2024-11-12 423 static void aml_rtc_remove(struct platform_device *pdev)
c89ac9182ee297 Yiting Deng 2024-11-12 424 {
c89ac9182ee297 Yiting Deng 2024-11-12 @425 struct aml_rtc_data *rtc = dev_get_drvdata(&pdev->dev);
c89ac9182ee297 Yiting Deng 2024-11-12 426
8c28c4993f117e Wolfram Sang 2024-12-17 427 device_init_wakeup(&pdev->dev, false);
c89ac9182ee297 Yiting Deng 2024-11-12 428 }
c89ac9182ee297 Yiting Deng 2024-11-12 429
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
^ permalink raw reply
* [PATCH v2] rtc: amlogic-a4: fix double free caused by devm
From: Haotian Zhang @ 2025-10-21 10:35 UTC (permalink / raw)
To: alexandre.belloni, yiting.deng, xianwei.zhao
Cc: linux-amlogic, linux-rtc, linux-kernel, Haotian Zhang
In-Reply-To: <20251020150956.491-1-vulab@iscas.ac.cn>
The clock obtained via devm_clk_get_enabled() is automatically managed
by devres and will be disabled and freed on driver detach. Manually
calling clk_disable_unprepare() in error path and remove function
causes double free.
Remove the redundant clk_disable_unprepare() calls from the probe
error path and aml_rtc_remove(), allowing the devm framework to
automatically manage the clock lifecycle.
Fixes: c89ac9182ee2 ("rtc: support for the Amlogic on-chip RTC")
Signed-off-by: Haotian Zhang <vulab@iscas.ac.cn>
---
v2: Also remove the now-unused local variable 'rtc' in aml_rtc_remove()
---
drivers/rtc/rtc-amlogic-a4.c | 4 ----
1 file changed, 4 deletions(-)
diff --git a/drivers/rtc/rtc-amlogic-a4.c b/drivers/rtc/rtc-amlogic-a4.c
index 1928b29c1045..a993d35e1d6b 100644
--- a/drivers/rtc/rtc-amlogic-a4.c
+++ b/drivers/rtc/rtc-amlogic-a4.c
@@ -390,7 +390,6 @@ static int aml_rtc_probe(struct platform_device *pdev)
return 0;
err_clk:
- clk_disable_unprepare(rtc->sys_clk);
device_init_wakeup(dev, false);
return ret;
@@ -423,9 +422,6 @@ static SIMPLE_DEV_PM_OPS(aml_rtc_pm_ops,
static void aml_rtc_remove(struct platform_device *pdev)
{
- struct aml_rtc_data *rtc = dev_get_drvdata(&pdev->dev);
-
- clk_disable_unprepare(rtc->sys_clk);
device_init_wakeup(&pdev->dev, false);
}
--
2.25.1
^ permalink raw reply related
* Re: [PATCH v2 1/6] clk: renesas: r9a09g057: Add clock and reset entries for RTC
From: Geert Uytterhoeven @ 2025-10-21 13:35 UTC (permalink / raw)
To: Ovidiu Panait
Cc: claudiu.beznea.uj, alexandre.belloni, robh, krzk+dt, conor+dt,
magnus.damm, mturquette, sboyd, p.zabel, linux-rtc,
linux-renesas-soc, devicetree, linux-kernel, linux-clk
In-Reply-To: <20251021080705.18116-2-ovidiu.panait.rb@renesas.com>
On Tue, 21 Oct 2025 at 10:07, Ovidiu Panait
<ovidiu.panait.rb@renesas.com> wrote:
> Add module clock and reset entries for the RTC module on the Renesas RZ/V2H
> (R9A09G057) SoC.
>
> Signed-off-by: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-clk for v6.19.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply
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