* Re: (subset) [PATCH v2 1/4] mfd: simple-mfd-i2c: remove select I2C_K1
From: Troy Mitchell @ 2025-11-07 1:29 UTC (permalink / raw)
To: Lee Jones, Yixun Lan, Alex Elder, Andi Shyti, Alexandre Belloni,
Liam Girdwood, Mark Brown, Troy Mitchell
Cc: linux-kernel, linux-riscv, spacemit, linux-i2c, linux-rtc,
kernel test robot
In-Reply-To: <176244506110.1925720.10807118665958896958.b4-ty@kernel.org>
On Thu, Nov 06, 2025 at 04:04:21PM +0000, Lee Jones wrote:
> On Mon, 27 Oct 2025 13:48:05 +0800, Troy Mitchell wrote:
> > select will force a symbol to a specific value without considering
> > its dependencies. As a result, the i2c-k1 driver will fail to build
> > when OF or COMMON_CLK are disabled.
> >
> > The reason for removing I2C_K1 instead of adding a depends on condition
> > is to keep the possibility for other SoCs to use this PMIC.
> >
> > [...]
>
> Applied, thanks!
>
> [1/4] mfd: simple-mfd-i2c: remove select I2C_K1
> commit: ecf6bc474ae97c404e2125b413eb0ef3627b03c5
Hi Lee,
I think you didn't notice this reply [1]
(Maybe because he was replying to the cover letter).
As Aurelien mentioned, the current shutdown/reboot (and possibly the regulator
as well) intends to use the `default MFD_SPACEMIT_P1`.
So if there’s no `default m if ARCH_SPACEMIT`,
the default value in subdevices may not make much sense.
But don’t worry — to make things easier for you, I’ll send an additional
patch based on your branch (in this series).
How does that sound?
Link: https://lore.kernel.org/all/aP9IVckJT-k2_O4K@aurel32.net/ [1]
>
> --
> Lee Jones [李琼斯]
>
>
^ permalink raw reply
* Re: PROBLEM: hwclock busted w/ M48T59 RTC (regression)
From: Nick Bowler @ 2025-11-07 3:06 UTC (permalink / raw)
To: Thorsten Leemhuis
Cc: Esben Haabendal, linux-kernel, regressions, linux-rtc, stable,
sparclinux
In-Reply-To: <35bd11bf-23fa-4ce9-96fb-d10ad6cd546e@leemhuis.info>
On Thu, Nov 06, 2025 at 11:25:55AM +0100, Thorsten Leemhuis wrote:
> Just wondering: was this fixed in between? Just asking, as I noticed the
> culprit was backported to various stable/longterm series recently
I am not aware of any fix. I just retested both 6.18-rc4 and 6.17.7 and
there is no change in behaviour.
Thanks,
Nick
^ permalink raw reply
* [PATCH v5 1/2] dt-bindings: rtc: Add pcf85053 support
From: Lakshay Piplani @ 2025-11-07 13:26 UTC (permalink / raw)
To: alexandre.belloni, linux-rtc, linux-kernel, robh, krzk+dt,
conor+dt, devicetree
Cc: pankit.garg, vikash.bansal, priyanka.jain, shashank.rebbapragada,
Lakshay Piplani
Add device tree bindings for NXP PCF85053 RTC chip.
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Lakshay Piplani <lakshay.piplani@nxp.com>
---
V4 -> V5: - Updated schema validation logic to enforce correct combinations of
'nxp,interface' and 'nxp,write-access' using oneOf clauses.
- Refined property descriptions for clarity and hardware alignment.
V3 -> V4: Add dedicated nxp,pcf85053.yaml.
Remove entry from trivial-rtc.yaml.
V2 -> V3: Moved MAINTAINERS file changes to the driver patch
V1 -> V2: Handled dt-bindings by trivial-rtc.yaml
.../devicetree/bindings/rtc/nxp,pcf85053.yaml | 115 ++++++++++++++++++
1 file changed, 115 insertions(+)
create mode 100644 Documentation/devicetree/bindings/rtc/nxp,pcf85053.yaml
diff --git a/Documentation/devicetree/bindings/rtc/nxp,pcf85053.yaml b/Documentation/devicetree/bindings/rtc/nxp,pcf85053.yaml
new file mode 100644
index 000000000000..1b3fbde00001
--- /dev/null
+++ b/Documentation/devicetree/bindings/rtc/nxp,pcf85053.yaml
@@ -0,0 +1,115 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# Copyright 2025 NXP
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/rtc/nxp,pcf85053.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NXP PCF85053 Real Time Clock
+
+maintainers:
+ - Pankit Garg <pankit.garg@nxp.com>
+ - Lakshay Piplani <lakshay.piplani@nxp.com>
+
+properties:
+ compatible:
+ enum:
+ - nxp,pcf85053
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ nxp,interface:
+ $ref: /schemas/types.yaml#/definitions/string
+ enum: [ primary, secondary ]
+ description: |
+ Identifies this host's logical role in a multi-host topology for the
+ PCF85053 RTC. The device exposes a "TWO" ownership bit in the CTRL
+ register that gates which host may write time/alarm registers.
+ - "primary": Designated host that *may* claim write ownership (set
+ CTRL.TWO=1) **if** write-access is explicitly requested.
+ - "secondary": Peer host that writes only when CTRL.TWO=0 (default).
+
+ This property helps the driver determine whether it should attempt to
+ claim write-access.
+
+ The actual role depends on whether 'nxp,write-access' is also specified.
+ Supported configurations are:-
+ 1. Primary with 'nxp,write-access' -> primary claims write ownership.
+ 2. Primary without 'nxp,write-access' -> primary is ready only; secondary may write.
+ 3. Secondary (must not specify 'nxp,write-access') -> Secondary writes only
+ when no primary claims ownership.
+
+ nxp,write-access:
+ type: boolean
+ description: |
+ Request the driver to claim write ownership at probe time by setting
+ CTRL.TWO=1. This property is only valid when nxp,interface="primary".
+ The driver will not modify any other CTRL bits (HF/DM/etc.) and will not
+ clear any status/interrupt flags at probe.
+
+required:
+ - compatible
+ - reg
+ - nxp,interface
+
+additionalProperties: false
+
+allOf:
+ - $ref: rtc.yaml#
+ - if:
+ properties:
+ nxp,interface:
+ const: secondary
+ then:
+ not:
+ required: [ "nxp,write-access" ]
+
+examples:
+ # Single host example.
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+ i2c {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ rtc@6f {
+ compatible = "nxp,pcf85053";
+ reg = <0x6f>;
+ nxp,interface = "primary";
+ nxp,write-access;
+ interrupt-parent = <&gpio2>;
+ interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
+ };
+ };
+
+ # Dual-host example: one primary that claims writes; one secondary that never claims writes.
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+ i2c0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ rtc@6f {
+ compatible = "nxp,pcf85053";
+ reg = <0x6f>;
+ nxp,interface = "primary";
+ nxp,write-access;
+ interrupt-parent = <&gpio2>;
+ interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
+ };
+ };
+
+ i2c1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ rtc@6f {
+ compatible = "nxp,pcf85053";
+ reg = <0x6f>;
+ nxp,interface = "secondary";
+ };
+ };
--
2.25.1
^ permalink raw reply related
* [PATCH v5 2/2] rtc: Add NXP PCF85053 driver support
From: Lakshay Piplani @ 2025-11-07 13:26 UTC (permalink / raw)
To: alexandre.belloni, linux-rtc, linux-kernel, robh, krzk+dt,
conor+dt, devicetree
Cc: pankit.garg, vikash.bansal, priyanka.jain, shashank.rebbapragada,
Lakshay Piplani, Daniel Aguirre
In-Reply-To: <20251107132618.2246407-1-lakshay.piplani@nxp.com>
PCF85053 is i2c based RTC which supports timer and calendar
functionality.
Features supported:
1. Read/Write time
2. Get/Set Alarm
3. Wakeup Source
4. Generate up to 32768Hz clock output
5. Primary/Secondary i2c bus
Signed-off-by: Daniel Aguirre <daniel.aguirre@nxp.com>
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Lakshay Piplani <lakshay.piplani@nxp.com>
---
V4 -> V5: no changes
V3 -> V4: - Handle multi-host ownership explicitly using primary/secondary bus hadling.
- Probe no longer changes any CTRL bits unconditionally and do not clear ST/AF/OF
avoiding lost interrupts or silent mode changes.
- Read/Set time & alarm now respect HF(12/24h) and DM(BCD/BIN) converting
hour fields correctly for all combinations.
- Minor changes: drop noisy warnings, tidy error paths/comments.
V2 -> V3: Add MAINTAINERS file changes to this patch
V1 -> V2: no changes
MAINTAINERS | 7 +
drivers/rtc/Kconfig | 10 +
drivers/rtc/Makefile | 1 +
drivers/rtc/rtc-pcf85053.c | 734 +++++++++++++++++++++++++++++++++++++
4 files changed, 752 insertions(+)
create mode 100644 drivers/rtc/rtc-pcf85053.c
diff --git a/MAINTAINERS b/MAINTAINERS
index 6bbe4b4f8ec0..b835c2787e63 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -18352,6 +18352,13 @@ S: Maintained
F: Documentation/devicetree/bindings/sound/nxp,tfa989x.yaml
F: sound/soc/codecs/tfa989x.c
+NXP RTC PCF85053 DRIVER
+M: Pankit Gargi <pankit.garg@nxp.com>
+M: Lakshay Piplani <lakshay.piplani@nxp.com>
+L: linux-kernel@vger.kernel.org
+S: Maintained
+F: drivers/rtc/rtc-pcf85053.c
+
NZXT-KRAKEN2 HARDWARE MONITORING DRIVER
M: Jonas Malaco <jonas@protocubo.io>
L: linux-hwmon@vger.kernel.org
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index 64f6e9756aff..59ef0b6a53a7 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -974,6 +974,16 @@ config RTC_DRV_PCF85063
This driver can also be built as a module. If so, the module
will be called rtc-pcf85063.
+config RTC_DRV_PCF85053
+ tristate "NXP PCF85053"
+ depends on OF
+ help
+ If you say yes here you get support for the NXP PCF85053 I2C Bootable CPU RTC
+ chip.
+
+ This driver can also be built as a module. If so, the module
+ will be called rtc-pcf85053.
+
config RTC_DRV_RV3029C2
tristate "Micro Crystal RV3029/3049"
depends on RTC_I2C_AND_SPI
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index 789bddfea99d..7b2f379d10a9 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -128,6 +128,7 @@ obj-$(CONFIG_RTC_DRV_PCAP) += rtc-pcap.o
obj-$(CONFIG_RTC_DRV_PCF2123) += rtc-pcf2123.o
obj-$(CONFIG_RTC_DRV_PCF2127) += rtc-pcf2127.o
obj-$(CONFIG_RTC_DRV_PCF85063) += rtc-pcf85063.o
+obj-$(CONFIG_RTC_DRV_PCF85053) += rtc-pcf85053.o
obj-$(CONFIG_RTC_DRV_PCF8523) += rtc-pcf8523.o
obj-$(CONFIG_RTC_DRV_PCF85363) += rtc-pcf85363.o
obj-$(CONFIG_RTC_DRV_PCF8563) += rtc-pcf8563.o
diff --git a/drivers/rtc/rtc-pcf85053.c b/drivers/rtc/rtc-pcf85053.c
new file mode 100644
index 000000000000..4eec1a661b6b
--- /dev/null
+++ b/drivers/rtc/rtc-pcf85053.c
@@ -0,0 +1,734 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright 2025 NXP
+
+#include <linux/bcd.h>
+#include <linux/clk-provider.h>
+#include <linux/err.h>
+#include <linux/i2c.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/rtc.h>
+#include <linux/slab.h>
+#include <linux/pm_wakeirq.h>
+#include <linux/regmap.h>
+
+#define PCF85053_REG_SC 0x00 /* seconds */
+#define PCF85053_REG_SCA 0x01 /* alarm */
+#define PCF85053_REG_MN 0x02 /* minutes */
+#define PCF85053_REG_MNA 0x03 /* alarm */
+#define PCF85053_REG_HR 0x04 /* hour */
+#define PCF85053_REG_HRA 0x05 /* alarm */
+#define PCF85053_REG_DW 0x06 /* day of week */
+#define PCF85053_REG_DM 0x07 /* day of month */
+#define PCF85053_REG_MO 0x08 /* month */
+#define PCF85053_REG_YR 0x09 /* year */
+#define PCF85053_REG_CTRL 0x0A /* timer control */
+#define PCF85053_REG_ST 0x0B /* status */
+#define PCF85053_REG_CLKO 0x0C /* clock out */
+#define PCF85053_REG_ACC 0x14 /* xclk access */
+
+#define PCF85053_BIT_AF BIT(7)
+#define PCF85053_BIT_ST BIT(7)
+#define PCF85053_BIT_DM BIT(6)
+#define PCF85053_BIT_HF BIT(5)
+#define PCF85053_BIT_DSM BIT(4)
+#define PCF85053_BIT_AIE BIT(3)
+#define PCF85053_BIT_OFIE BIT(2)
+#define PCF85053_BIT_CIE BIT(1)
+#define PCF85053_BIT_TWO BIT(0)
+#define PCF85053_BIT_XCLK BIT(7)
+
+#define PCF85053_REG_BAT_MASK 0x07 /* Battery mask */
+#define PCF85053A_BVL_MASK 0x07
+#define PCF85053A_BVL_LOW_THRESHOLD 0x02
+#define PCF85053_REG_CLKO_F_MASK 0x03 /* Frequenc mask */
+#define PCF85053_REG_CLKO_CKE 0x80 /* clock out enabled */
+#define PCF85053_BIT_OF BIT(6)
+
+#define PCF85053_HR_PM BIT(7)
+#define PCF85053_HR_24H_MASK GENMASK(5, 0)
+
+struct pcf85053_config {
+ const struct regmap_config regmap;
+ unsigned has_alarms:1;
+};
+
+struct pcf85053 {
+ struct rtc_device *rtc;
+ struct i2c_client *client;
+ struct regmap *regmap;
+#ifdef CONFIG_COMMON_CLK
+ struct clk_hw clkout_hw;
+#endif
+ bool is_primary;
+};
+
+static inline int pcf85053_read_two_bit(struct pcf85053 *pcf85053, bool *two)
+{
+ unsigned int ctrl;
+ int err;
+
+ err = regmap_read(pcf85053->regmap, PCF85053_REG_CTRL, &ctrl);
+ if (err)
+ return err;
+
+ *two = !!(ctrl & PCF85053_BIT_TWO);
+
+ return 0;
+}
+
+static inline bool pcf85053_time_write_access(struct pcf85053 *pcf85053)
+{
+ bool two;
+
+ if (pcf85053_read_two_bit(pcf85053, &two))
+ return false;
+
+ /* Primary writes iff TWO=1; secondary writes iff TWO=0 */
+ return pcf85053->is_primary ? two : !two;
+}
+
+static int pcf85053_set_alarm_mode(struct device *dev, bool on)
+{
+ struct pcf85053 *pcf85053 = dev_get_drvdata(dev);
+ unsigned int val;
+ int err;
+
+ val = on ? PCF85053_BIT_AIE : 0;
+ val &= ~(PCF85053_BIT_CIE | PCF85053_BIT_OFIE);
+
+ err = regmap_update_bits(pcf85053->regmap, PCF85053_REG_CTRL,
+ PCF85053_BIT_AIE | PCF85053_BIT_CIE | PCF85053_BIT_OFIE,
+ val);
+ if (err)
+ return err;
+
+ return regmap_update_bits(pcf85053->regmap, PCF85053_REG_ST,
+ PCF85053_BIT_AF, 0);
+}
+
+static int pcf85053_get_alarm_mode(struct device *dev,
+ unsigned char *alarm_enable, unsigned char *alarm_flag)
+{
+ struct pcf85053 *pcf85053 = dev_get_drvdata(dev);
+ unsigned int val;
+ int err;
+
+ if (alarm_enable) {
+ err = regmap_read(pcf85053->regmap, PCF85053_REG_CTRL, &val);
+ if (err)
+ return err;
+
+ *alarm_enable = val & PCF85053_BIT_AIE;
+ }
+
+ if (alarm_flag) {
+ err = regmap_read(pcf85053->regmap, PCF85053_REG_ST, &val);
+ if (err)
+ return err;
+
+ *alarm_flag = val & PCF85053_BIT_AF;
+ }
+
+ return 0;
+}
+
+static irqreturn_t pcf85053_irq(int irq, void *dev_id)
+{
+ struct pcf85053 *pcf85053 = i2c_get_clientdata(dev_id);
+ unsigned char alarm_flag;
+ unsigned char alarm_enable;
+ int err;
+
+ err = pcf85053_get_alarm_mode(&pcf85053->client->dev, &alarm_enable, &alarm_flag);
+ if (err)
+ return IRQ_NONE;
+
+ if (!alarm_flag)
+ return IRQ_NONE;
+
+ rtc_update_irq(pcf85053->rtc, 1, RTC_IRQF | RTC_AF);
+ pcf85053_set_alarm_mode(&pcf85053->client->dev, false);
+
+ return IRQ_HANDLED;
+}
+
+/*
+ * In the routines that deal directly with the PCF85053 hardware, we use
+ * rtc_time -- month 0-11, hour 0-23, yr = calendar year-epoch.
+ */
+static int pcf85053_rtc_read_time(struct device *dev, struct rtc_time *tm)
+{
+ struct pcf85053 *pcf85053 = dev_get_drvdata(dev);
+ unsigned int ctrl, st, h12;
+ bool is_24h, is_bin;
+ u8 regs[10], hr;
+ int err;
+
+ err = regmap_read(pcf85053->regmap, PCF85053_REG_CTRL, &ctrl);
+ if (err)
+ return err;
+
+ err = regmap_read(pcf85053->regmap, PCF85053_REG_ST, &st);
+ if (err)
+ return err;
+
+ if (ctrl & PCF85053_BIT_ST)
+ dev_warn(dev, "RTC is stopped; time may be invalid\n");
+
+ err = regmap_bulk_read(pcf85053->regmap, PCF85053_REG_SC, regs, sizeof(regs));
+ if (err)
+ return err;
+
+ if (ctrl & PCF85053_BIT_DM) {
+ tm->tm_sec = regs[PCF85053_REG_SC] & 0x7F;
+ tm->tm_min = regs[PCF85053_REG_MN] & 0x7F;
+ tm->tm_mday = regs[PCF85053_REG_DM] & 0x3F;
+ tm->tm_mon = (regs[PCF85053_REG_MO] & 0x1F) - 1;
+ tm->tm_year = regs[PCF85053_REG_YR] + 100;
+ } else {
+ tm->tm_sec = bcd2bin(regs[PCF85053_REG_SC] & 0x7F);
+ tm->tm_min = bcd2bin(regs[PCF85053_REG_MN] & 0x7F);
+ tm->tm_mday = bcd2bin(regs[PCF85053_REG_DM] & 0x3F);
+ tm->tm_mon = bcd2bin(regs[PCF85053_REG_MO] & 0x1F) - 1;
+ tm->tm_year = bcd2bin(regs[PCF85053_REG_YR]) + 100;
+ }
+ tm->tm_wday = regs[PCF85053_REG_DW] & 0x07;
+
+ hr = regs[PCF85053_REG_HR];
+ is_24h = ctrl & PCF85053_BIT_HF;
+ is_bin = ctrl & PCF85053_BIT_DM;
+
+ if (is_24h) {
+ tm->tm_hour = is_bin
+ ? (hr & PCF85053_HR_24H_MASK)
+ : bcd2bin(hr & PCF85053_HR_24H_MASK);
+ } else {
+ if (is_bin) {
+ h12 = hr & PCF85053_HR_24H_MASK;
+ } else {
+ h12 = is_bin ? (hr & PCF85053_HR_24H_MASK) :
+ bcd2bin(hr & PCF85053_HR_24H_MASK);
+
+ tm->tm_hour = (h12 == 12) ? ((hr & PCF85053_HR_PM) ? 12 : 0) :
+ ((hr & PCF85053_HR_PM) ? h12 + 12 : h12);
+ }
+ }
+
+ return 0;
+}
+
+static int pcf85053_rtc_set_time(struct device *dev, struct rtc_time *tm)
+
+{
+ struct pcf85053 *pcf85053 = dev_get_drvdata(dev);
+ unsigned int ctrl, h12;
+ int err, ret;
+ u8 buf[10];
+ bool pm;
+
+ /*
+ * By default, secondary have write access to time registers as TWO
+ * bit is 0 by default, if we set nxp,interface = "primary" and the
+ * nxp,write-access in device tree, then TWO bits gets set and primary
+ * gets write access to time registers.
+ */
+ if (!pcf85053_time_write_access(pcf85053))
+ return -EACCES;
+
+ err = regmap_read(pcf85053->regmap, PCF85053_REG_CTRL, &ctrl);
+ if (err)
+ return err;
+
+ buf[0] = tm->tm_sec & 0x7F;
+ buf[1] = 0;
+ buf[2] = tm->tm_min & 0x7F;
+ buf[3] = 0;
+ buf[5] = 0;
+ buf[6] = tm->tm_wday & 0x07;
+ buf[7] = tm->tm_mday & 0x3F;
+ buf[8] = (tm->tm_mon + 1) & 0x1F;
+ buf[9] = (tm->tm_year - 100) & 0xFF;
+
+ if (ctrl & PCF85053_BIT_HF) {
+ buf[4] = tm->tm_hour & PCF85053_HR_24H_MASK;
+ } else {
+ pm = tm->tm_hour >= 12;
+ h12 = (tm->tm_hour % 12) ? (tm->tm_hour % 12) : 12;
+ buf[4] = (h12 & PCF85053_HR_24H_MASK) | (pm << 7);
+ }
+
+ if (!(ctrl & PCF85053_BIT_DM)) {
+ buf[0] = bin2bcd(buf[0]);
+ buf[2] = bin2bcd(buf[2]);
+ buf[4] = bin2bcd(buf[4] & PCF85053_HR_24H_MASK) | (buf[4] & PCF85053_HR_PM);
+ buf[7] = bin2bcd(buf[7]);
+ buf[8] = bin2bcd(buf[8]);
+ buf[9] = bin2bcd(buf[9]);
+ }
+
+ if (pcf85053->is_primary) {
+ err = regmap_update_bits(pcf85053->regmap, PCF85053_REG_CTRL,
+ PCF85053_BIT_ST, PCF85053_BIT_ST);
+ if (err)
+ return err;
+
+ ret = regmap_bulk_write(pcf85053->regmap, PCF85053_REG_SC, buf, sizeof(buf));
+ err = regmap_update_bits(pcf85053->regmap, PCF85053_REG_CTRL,
+ PCF85053_BIT_ST, 0);
+ return ret ? ret : err;
+ }
+
+ return regmap_bulk_write(pcf85053->regmap, PCF85053_REG_SC, buf, sizeof(buf));
+}
+
+static int pcf85053_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *tm)
+{
+ struct pcf85053 *pcf85053 = dev_get_drvdata(dev);
+ unsigned int ctrl, h12;
+ bool is_24h, is_bin, pm;
+ u8 buf[5];
+ u8 hr;
+ int err;
+
+ err = regmap_read(pcf85053->regmap, PCF85053_REG_CTRL, &ctrl);
+ if (err)
+ return err;
+
+ err = regmap_bulk_read(pcf85053->regmap, PCF85053_REG_SCA, buf, sizeof(buf));
+ if (err)
+ return err;
+
+ if (ctrl & PCF85053_BIT_DM) {
+ tm->time.tm_sec = buf[0] & 0x7F; /* SCA */
+ tm->time.tm_min = buf[2] & 0x7F; /* MNA */
+ } else {
+ tm->time.tm_sec = bcd2bin(buf[0] & 0x7F);
+ tm->time.tm_min = bcd2bin(buf[2] & 0x7F);
+ }
+
+ hr = buf[4];
+ is_24h = !!(ctrl & PCF85053_BIT_HF);
+ is_bin = !!(ctrl & PCF85053_BIT_DM);
+
+ if (is_24h) {
+ tm->time.tm_hour = is_bin
+ ? (hr & PCF85053_HR_24H_MASK)
+ : bcd2bin(hr & PCF85053_HR_24H_MASK);
+ } else {
+ pm = !!(hr & PCF85053_HR_PM);
+
+ if (is_bin)
+ h12 = (hr & PCF85053_HR_24H_MASK);
+ else
+ h12 = (bcd2bin(hr & PCF85053_HR_24H_MASK));
+
+ if (h12 == 12)
+ h12 = 0;
+ tm->time.tm_hour = pm ? (h12 + 12) : h12;
+ }
+
+ return pcf85053_get_alarm_mode(dev, &tm->enabled, &tm->pending);
+}
+
+static int pcf85053_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *tm)
+{
+ struct pcf85053 *pcf85053 = dev_get_drvdata(dev);
+ bool is_24h, is_bin, pm;
+ unsigned int ctrl, h12;
+ u8 sec, min, hra;
+ int err;
+
+ /*
+ * Only primary can set alarm, as secondary have read only access
+ * to alarm, control and status registers
+ */
+ if (!pcf85053->is_primary)
+ return -EACCES;
+
+ err = regmap_read(pcf85053->regmap, PCF85053_REG_CTRL, &ctrl);
+ if (err)
+ return err;
+
+ err = regmap_update_bits(pcf85053->regmap, PCF85053_REG_ST,
+ PCF85053_BIT_AF, 0);
+ if (err)
+ return err;
+
+ is_24h = !!(ctrl & PCF85053_BIT_HF);
+ is_bin = !!(ctrl & PCF85053_BIT_DM);
+
+ sec = tm->time.tm_sec & 0x7F;
+ min = tm->time.tm_min & 0x7F;
+
+ if (is_24h) {
+ hra = tm->time.tm_hour & PCF85053_HR_24H_MASK;
+ if (!is_bin)
+ hra = bin2bcd(hra) & PCF85053_HR_24H_MASK;
+ } else {
+ h12 = tm->time.tm_hour % 12;
+ pm = tm->time.tm_hour >= 12;
+ if (h12 == 0)
+ h12 = 12;
+
+ if (is_bin)
+ hra = (h12 & PCF85053_HR_24H_MASK) | (pm << 7);
+ else
+ hra = (bin2bcd(h12) & PCF85053_HR_24H_MASK) | (pm << 7);
+ }
+
+ if (!is_bin) {
+ sec = bin2bcd(sec);
+ min = bin2bcd(min);
+ }
+
+ err = regmap_write(pcf85053->regmap, PCF85053_REG_SCA, sec);
+ if (err)
+ return err;
+
+ err = regmap_write(pcf85053->regmap, PCF85053_REG_MNA, min);
+ if (err)
+ return err;
+
+ err = regmap_write(pcf85053->regmap, PCF85053_REG_HRA, hra);
+ if (err)
+ return err;
+
+ return pcf85053_set_alarm_mode(dev, tm->enabled);
+}
+
+static int pcf85053_irq_enable(struct device *dev, unsigned int enabled)
+{
+ dev_dbg(dev, "%s: alarm enable=%d\n", __func__, enabled);
+
+ return pcf85053_set_alarm_mode(dev, enabled);
+}
+
+static int pcf85053_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
+{
+ struct pcf85053 *pcf85053 = dev_get_drvdata(dev);
+ unsigned int val = 0, vl_status = 0;
+ unsigned int bvl;
+ int status;
+
+ switch (cmd) {
+ case RTC_VL_READ:
+ status = regmap_read(pcf85053->regmap, PCF85053_REG_ST, &val);
+ if (status)
+ return status;
+
+ if (val & PCF85053_BIT_OF)
+ vl_status |= RTC_VL_DATA_INVALID;
+
+ bvl = val & PCF85053A_BVL_MASK;
+
+ if (bvl == 0x00)
+ vl_status |= RTC_VL_BACKUP_EMPTY;
+ else if (bvl <= PCF85053A_BVL_LOW_THRESHOLD)
+ vl_status |= RTC_VL_BACKUP_LOW;
+
+ return put_user(vl_status, (unsigned int __user *)arg);
+
+ default:
+ return -ENOIOCTLCMD;
+ }
+}
+
+#ifdef CONFIG_COMMON_CLK
+/*
+ * Handling of the clkout
+ */
+
+#define clkout_hw_to_pcf85053(_hw) container_of(_hw, struct pcf85053, clkout_hw)
+
+static const int clkout_rates[] = {
+ 32768,
+ 1024,
+ 32,
+ 1,
+};
+
+static unsigned long pcf85053_clkout_recalc_rate(struct clk_hw *hw,
+ unsigned long parent_rate)
+{
+ struct pcf85053 *pcf85053 = clkout_hw_to_pcf85053(hw);
+ unsigned int val = 0;
+ int err;
+
+ err = regmap_read(pcf85053->regmap, PCF85053_REG_CLKO, &val);
+ if (err)
+ return 0;
+
+ val &= PCF85053_REG_CLKO_F_MASK;
+ return clkout_rates[val];
+}
+
+static int pcf85053_clkout_determine_rate(struct clk_hw *hw,
+ struct clk_rate_request *req)
+{
+ int i;
+ unsigned long best = 0;
+
+ for (i = 0; i < ARRAY_SIZE(clkout_rates); i++) {
+ if (clkout_rates[i] <= req->rate) {
+ best = clkout_rates[i];
+ break;
+ }
+ }
+ if (!best)
+ best = clkout_rates[ARRAY_SIZE(clkout_rates) - 1];
+
+ req->rate = best;
+ return 0;
+}
+
+static int pcf85053_clkout_set_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long parent_rate)
+{
+ struct pcf85053 *pcf85053 = clkout_hw_to_pcf85053(hw);
+ unsigned int val = 0;
+ int err, i;
+
+ err = regmap_read(pcf85053->regmap, PCF85053_REG_CLKO, &val);
+ if (err)
+ return err;
+
+ for (i = 0; i < ARRAY_SIZE(clkout_rates); i++)
+ if (clkout_rates[i] == rate) {
+ val &= ~PCF85053_REG_CLKO_F_MASK;
+ val |= i;
+ return regmap_write(pcf85053->regmap, PCF85053_REG_CLKO, val);
+ }
+
+ return -EINVAL;
+}
+
+static int pcf85053_clkout_control(struct clk_hw *hw, bool enable)
+{
+ struct pcf85053 *pcf85053 = clkout_hw_to_pcf85053(hw);
+ unsigned int val = 0;
+ int err;
+
+ if (!pcf85053->is_primary)
+ return -EACCES;
+
+ val = PCF85053_BIT_XCLK;
+ err = regmap_write(pcf85053->regmap, PCF85053_REG_ACC, val);
+ if (err)
+ return err;
+
+ err = regmap_read(pcf85053->regmap, PCF85053_REG_CLKO, &val);
+ if (err)
+ return err;
+
+ if (enable)
+ val |= PCF85053_REG_CLKO_CKE;
+ else
+ val &= ~PCF85053_REG_CLKO_CKE;
+
+ return regmap_write(pcf85053->regmap, PCF85053_REG_CLKO, val);
+}
+
+static int pcf85053_clkout_prepare(struct clk_hw *hw)
+{
+ return pcf85053_clkout_control(hw, 1);
+}
+
+static void pcf85053_clkout_unprepare(struct clk_hw *hw)
+{
+ pcf85053_clkout_control(hw, 0);
+}
+
+static int pcf85053_clkout_is_prepared(struct clk_hw *hw)
+{
+ struct pcf85053 *pcf85053 = clkout_hw_to_pcf85053(hw);
+ unsigned int val = 0;
+ int err;
+
+ err = regmap_read(pcf85053->regmap, PCF85053_REG_CLKO, &val);
+ if (err)
+ return err;
+
+ return val & PCF85053_REG_CLKO_CKE;
+}
+
+static const struct clk_ops pcf85053_clkout_ops = {
+ .prepare = pcf85053_clkout_prepare,
+ .unprepare = pcf85053_clkout_unprepare,
+ .is_prepared = pcf85053_clkout_is_prepared,
+ .recalc_rate = pcf85053_clkout_recalc_rate,
+ .determine_rate = pcf85053_clkout_determine_rate,
+ .set_rate = pcf85053_clkout_set_rate,
+};
+
+static struct clk *pcf85053_clkout_register_clk(struct pcf85053 *pcf85053)
+{
+ struct i2c_client *client = pcf85053->client;
+ struct device_node *node = client->dev.of_node;
+ struct clk *clk;
+ struct clk_init_data init;
+
+ init.name = "pcf85053-clkout";
+ init.ops = &pcf85053_clkout_ops;
+ init.flags = 0;
+ init.parent_names = NULL;
+ init.num_parents = 0;
+ pcf85053->clkout_hw.init = &init;
+
+ /* optional override of the clockname */
+ of_property_read_string(node, "clock-output-names", &init.name);
+
+ /* register the clock */
+ clk = devm_clk_register(&client->dev, &pcf85053->clkout_hw);
+
+ if (!IS_ERR(clk))
+ of_clk_add_provider(node, of_clk_src_simple_get, clk);
+
+ return clk;
+}
+#endif
+
+static const struct rtc_class_ops pcf85053_rtc_ops = {
+ .read_time = pcf85053_rtc_read_time,
+ .set_time = pcf85053_rtc_set_time,
+ .read_alarm = pcf85053_rtc_read_alarm,
+ .set_alarm = pcf85053_rtc_set_alarm,
+ .alarm_irq_enable = pcf85053_irq_enable,
+ .ioctl = pcf85053_ioctl,
+};
+
+static const struct pcf85053_config config_pcf85053 = {
+ .regmap = {
+ .reg_bits = 8,
+ .val_bits = 8,
+ .max_register = 0x1D,
+ },
+ .has_alarms = 1,
+};
+
+static int pcf85053_probe(struct i2c_client *client)
+{
+ struct pcf85053 *pcf85053;
+ const struct pcf85053_config *config;
+ const char *iface = NULL;
+ int err;
+
+ if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C |
+ I2C_FUNC_SMBUS_BYTE |
+ I2C_FUNC_SMBUS_BLOCK_DATA))
+ return -ENODEV;
+
+ pcf85053 = devm_kzalloc(&client->dev, sizeof(struct pcf85053),
+ GFP_KERNEL);
+ if (!pcf85053)
+ return -ENOMEM;
+
+ config = i2c_get_match_data(client);
+ if (!config)
+ return -ENODEV;
+
+ pcf85053->regmap = devm_regmap_init_i2c(client, &config->regmap);
+ if (IS_ERR(pcf85053->regmap))
+ return PTR_ERR(pcf85053->regmap);
+
+ i2c_set_clientdata(client, pcf85053);
+
+ pcf85053->client = client;
+ device_set_wakeup_capable(&client->dev, 1);
+
+ pcf85053->is_primary = true;
+
+ if (of_property_read_string(client->dev.of_node, "nxp,interface", &iface))
+ return dev_err_probe(&client->dev, -EINVAL,
+ "Missing mandatory property: nxp,interface\n");
+ if (!strcmp(iface, "primary"))
+ pcf85053->is_primary = true;
+ else if (!strcmp(iface, "secondary"))
+ pcf85053->is_primary = false;
+ else
+ return dev_err_probe(&client->dev, -EINVAL,
+ "Invalid value for nxp,interface: %s\n", iface);
+
+ if (pcf85053->is_primary) {
+ unsigned int ctrl;
+ int err;
+
+ err = regmap_read(pcf85053->regmap, PCF85053_REG_CTRL, &ctrl);
+ if (err)
+ return err;
+
+ if (of_property_read_bool(client->dev.of_node, "nxp,write-access")) {
+ if (!(ctrl & PCF85053_BIT_TWO)) {
+ err = regmap_update_bits(pcf85053->regmap, PCF85053_REG_CTRL,
+ PCF85053_BIT_TWO, PCF85053_BIT_TWO);
+ if (err)
+ return err;
+ }
+ dev_dbg(&client->dev, "Ownership set: TWO=1 (primary writes)\n");
+ } else {
+ /* TWO (Time Write Ownership) bit defaults to 0 (Secondary) */
+ dev_dbg(&client->dev, "Default ownership set: TWO=0 (secondary writes)\n");
+ }
+ }
+
+ pcf85053->rtc = devm_rtc_allocate_device(&client->dev);
+ if (IS_ERR(pcf85053->rtc))
+ return PTR_ERR(pcf85053->rtc);
+
+ pcf85053->rtc->ops = &pcf85053_rtc_ops;
+ pcf85053->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
+ pcf85053->rtc->range_max = RTC_TIMESTAMP_END_2099;
+ clear_bit(RTC_FEATURE_UPDATE_INTERRUPT, pcf85053->rtc->features);
+ clear_bit(RTC_FEATURE_ALARM, pcf85053->rtc->features);
+
+ if (config->has_alarms && client->irq > 0) {
+ err = devm_request_threaded_irq(&client->dev, client->irq,
+ NULL, pcf85053_irq,
+ IRQF_ONESHOT | IRQF_TRIGGER_FALLING,
+ "pcf85053", client);
+ if (err) {
+ dev_err(&client->dev, "unable to request IRQ %d\n", client->irq);
+ } else {
+ set_bit(RTC_FEATURE_ALARM, pcf85053->rtc->features);
+ device_init_wakeup(&client->dev, true);
+ err = dev_pm_set_wake_irq(&client->dev, client->irq);
+ if (err)
+ dev_err(&client->dev, "failed to enable irq wake\n");
+ }
+ }
+
+#ifdef CONFIG_COMMON_CLK
+ /* register clk in common clk framework */
+ pcf85053_clkout_register_clk(pcf85053);
+#endif
+
+ return devm_rtc_register_device(pcf85053->rtc);
+}
+
+static const struct i2c_device_id pcf85053_id[] = {
+ { "pcf85053", .driver_data = (kernel_ulong_t)&config_pcf85053 },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, pcf85053_id);
+
+static const struct of_device_id pcf85053_of_match[] = {
+ { .compatible = "nxp,pcf85053", .data = &config_pcf85053 },
+ {}
+};
+MODULE_DEVICE_TABLE(of, pcf85053_of_match);
+
+static struct i2c_driver pcf85053_driver = {
+ .driver = {
+ .name = "rtc-pcf85053",
+ .of_match_table = of_match_ptr(pcf85053_of_match),
+ },
+ .probe = pcf85053_probe,
+ .id_table = pcf85053_id,
+};
+
+module_i2c_driver(pcf85053_driver);
+
+MODULE_AUTHOR("Pankit Garg <pankit.garg@nxp.com>");
+MODULE_AUTHOR("Lakshay Piplani <lakshay.piplani@nxp.com>");
+MODULE_DESCRIPTION("NXP pcf85053 RTC driver");
+MODULE_LICENSE("GPL");
--
2.25.1
^ permalink raw reply related
* Re: [PATCH v5 1/2] dt-bindings: rtc: Add pcf85053 support
From: Conor Dooley @ 2025-11-07 18:01 UTC (permalink / raw)
To: Lakshay Piplani
Cc: alexandre.belloni, linux-rtc, linux-kernel, robh, krzk+dt,
conor+dt, devicetree, pankit.garg, vikash.bansal, priyanka.jain,
shashank.rebbapragada
In-Reply-To: <20251107132618.2246407-1-lakshay.piplani@nxp.com>
[-- Attachment #1: Type: text/plain, Size: 796 bytes --]
On Fri, Nov 07, 2025 at 06:56:17PM +0530, Lakshay Piplani wrote:
> + nxp,write-access:
> + type: boolean
> + description: |
> + Request the driver to claim write ownership at probe time by setting
> + CTRL.TWO=1. This property is only valid when nxp,interface="primary".
> + The driver will not modify any other CTRL bits (HF/DM/etc.) and will not
> + clear any status/interrupt flags at probe.
I'm sorry for not noticing this before, can you please remove the
commentary about linux driver specific stuff from here? Probably needs
to be something like "Indicates that write ownership of the RTC can be
should be claimed by setting CTRL.TWO. This property is only valid when
acting as the primary interface (nxp,interface = "primary")" or
something along those lines.
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
^ permalink raw reply
* [PATCH v4 0/4] Add RTC support for the Renesas RZ/V2H SoC
From: Ovidiu Panait @ 2025-11-07 21:07 UTC (permalink / raw)
To: claudiu.beznea.uj, alexandre.belloni, robh, krzk+dt, conor+dt,
geert+renesas, magnus.damm, p.zabel
Cc: linux-rtc, linux-renesas-soc, devicetree, linux-kernel
Hi,
This series adds RTC support for the Renesas RZ/V2H SoC.
The Renesas RZ/V2H RTC IP is based on the same RTCA3 IP as RZ/G3S
(r9a08g045), with the following differences:
- it lacks the time capture functionality
- the maximum supported periodic interrupt frequency is 128Hz instead
of 256Hz
- it requires two reset lines instead of one
Best regards,
Ovidiu
v4:
- Renamed reset "rtc_rtest" -> "rtest".
- Added "vbattb" reset name to example node.
v3:
- Dropped all changes related to "max_user_freq", as it was removed from
all drivers by:
https://lore.kernel.org/all/20251101-max_user_freq-v1-0-c9a274fd6883@bootlin.com/
v2:
- Updated bindings and RTC dts node with "reset-names" property.
Ovidiu Panait (4):
dt-bindings: rtc: renesas,rz-rtca3: Add RZ/V2H support
rtc: renesas-rtca3: Add support for multiple reset lines
arm64: dts: renesas: r9a09g057: Add RTC node
arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable RTC
.../bindings/rtc/renesas,rz-rtca3.yaml | 46 +++++++++++++++++--
arch/arm64/boot/dts/renesas/r9a09g057.dtsi | 15 ++++++
.../dts/renesas/r9a09g057h44-rzv2h-evk.dts | 4 ++
drivers/rtc/rtc-renesas-rtca3.c | 2 +-
4 files changed, 61 insertions(+), 6 deletions(-)
--
2.51.0
^ permalink raw reply
* [PATCH v4 1/4] dt-bindings: rtc: renesas,rz-rtca3: Add RZ/V2H support
From: Ovidiu Panait @ 2025-11-07 21:07 UTC (permalink / raw)
To: claudiu.beznea.uj, alexandre.belloni, robh, krzk+dt, conor+dt,
geert+renesas, magnus.damm, p.zabel
Cc: linux-rtc, linux-renesas-soc, devicetree, linux-kernel
In-Reply-To: <20251107210706.45044-1-ovidiu.panait.rb@renesas.com>
The Renesas RZ/V2H RTC IP is based on the same RTCA3 IP as RZ/G3S
(r9a08g045), with the following differences:
- It lacks the time capture functionality
- The maximum supported periodic interrupt frequency is 128Hz instead
of 256Hz
- It requires two reset lines instead of one
Add new compatible string "renesas,r9a09g057-rtca3" for RZ/V2H and update
the binding accordingly:
- Allow "resets" to contain one or two entries depending on the SoC.
- Add "reset-names" property, but make it required only for RZ/V2H.
Signed-off-by: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
---
.../bindings/rtc/renesas,rz-rtca3.yaml | 46 +++++++++++++++++--
1 file changed, 41 insertions(+), 5 deletions(-)
diff --git a/Documentation/devicetree/bindings/rtc/renesas,rz-rtca3.yaml b/Documentation/devicetree/bindings/rtc/renesas,rz-rtca3.yaml
index e70eeb66aa64..ccb1638c35b9 100644
--- a/Documentation/devicetree/bindings/rtc/renesas,rz-rtca3.yaml
+++ b/Documentation/devicetree/bindings/rtc/renesas,rz-rtca3.yaml
@@ -9,14 +9,12 @@ title: Renesas RTCA-3 Real Time Clock
maintainers:
- Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
-allOf:
- - $ref: rtc.yaml#
-
properties:
compatible:
items:
- enum:
- renesas,r9a08g045-rtca3 # RZ/G3S
+ - renesas,r9a09g057-rtca3 # RZ/V2H
- const: renesas,rz-rtca3
reg:
@@ -48,8 +46,12 @@ properties:
maxItems: 1
resets:
- items:
- - description: VBATTB module reset
+ minItems: 1
+ maxItems: 2
+
+ reset-names:
+ minItems: 1
+ maxItems: 2
required:
- compatible
@@ -61,6 +63,39 @@ required:
- power-domains
- resets
+allOf:
+ - $ref: rtc.yaml#
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: renesas,r9a08g045-rtca3
+ then:
+ properties:
+ resets:
+ items:
+ - description: VBATTB module reset
+ reset-names:
+ const: vbattb
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: renesas,r9a09g057-rtca3
+ then:
+ properties:
+ resets:
+ items:
+ - description: RTC reset
+ - description: Reset for the RTEST registers
+ reset-names:
+ items:
+ - const: rtc
+ - const: rtest
+ required:
+ - reset-names
+
additionalProperties: false
examples:
@@ -81,4 +116,5 @@ examples:
clock-names = "bus", "counter";
power-domains = <&cpg>;
resets = <&cpg R9A08G045_VBAT_BRESETN>;
+ reset-names = "vbattb";
};
--
2.51.0
^ permalink raw reply related
* [PATCH v4 3/4] arm64: dts: renesas: r9a09g057: Add RTC node
From: Ovidiu Panait @ 2025-11-07 21:07 UTC (permalink / raw)
To: claudiu.beznea.uj, alexandre.belloni, robh, krzk+dt, conor+dt,
geert+renesas, magnus.damm, p.zabel
Cc: linux-rtc, linux-renesas-soc, devicetree, linux-kernel
In-Reply-To: <20251107210706.45044-1-ovidiu.panait.rb@renesas.com>
Add RTC node to Renesas RZ/V2H ("R9A09G057") SoC DTSI.
Signed-off-by: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
---
arch/arm64/boot/dts/renesas/r9a09g057.dtsi | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
index 40b15f1db930..8aad46c367ae 100644
--- a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
@@ -591,6 +591,21 @@ wdt3: watchdog@13000400 {
status = "disabled";
};
+ rtc: rtc@11c00800 {
+ compatible = "renesas,r9a09g057-rtca3", "renesas,rz-rtca3";
+ reg = <0 0x11c00800 0 0x400>;
+ interrupts = <GIC_SPI 524 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 525 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 526 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "alarm", "period", "carry";
+ clocks = <&cpg CPG_MOD 0x53>, <&rtxin_clk>;
+ clock-names = "bus", "counter";
+ power-domains = <&cpg>;
+ resets = <&cpg 0x79>, <&cpg 0x7a>;
+ reset-names = "rtc", "rtest";
+ status = "disabled";
+ };
+
scif: serial@11c01400 {
compatible = "renesas,scif-r9a09g057";
reg = <0 0x11c01400 0 0x400>;
--
2.51.0
^ permalink raw reply related
* [PATCH v4 2/4] rtc: renesas-rtca3: Add support for multiple reset lines
From: Ovidiu Panait @ 2025-11-07 21:07 UTC (permalink / raw)
To: claudiu.beznea.uj, alexandre.belloni, robh, krzk+dt, conor+dt,
geert+renesas, magnus.damm, p.zabel
Cc: linux-rtc, linux-renesas-soc, devicetree, linux-kernel
In-Reply-To: <20251107210706.45044-1-ovidiu.panait.rb@renesas.com>
Switch from devm_reset_control_get_shared() to
devm_reset_control_array_get_shared() when retrieving resets.
The RZ/V2H SoC requires two resets for the RTC block instead of one,
so this will allow to handle multiple resets without additional changes.
Signed-off-by: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
---
drivers/rtc/rtc-renesas-rtca3.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/rtc/rtc-renesas-rtca3.c b/drivers/rtc/rtc-renesas-rtca3.c
index ab816bdf0d77..3524053269ef 100644
--- a/drivers/rtc/rtc-renesas-rtca3.c
+++ b/drivers/rtc/rtc-renesas-rtca3.c
@@ -726,7 +726,7 @@ static int rtca3_probe(struct platform_device *pdev)
if (ret)
return ret;
- priv->rstc = devm_reset_control_get_shared(dev, NULL);
+ priv->rstc = devm_reset_control_array_get_shared(dev);
if (IS_ERR(priv->rstc))
return PTR_ERR(priv->rstc);
--
2.51.0
^ permalink raw reply related
* [PATCH v4 4/4] arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable RTC
From: Ovidiu Panait @ 2025-11-07 21:07 UTC (permalink / raw)
To: claudiu.beznea.uj, alexandre.belloni, robh, krzk+dt, conor+dt,
geert+renesas, magnus.damm, p.zabel
Cc: linux-rtc, linux-renesas-soc, devicetree, linux-kernel
In-Reply-To: <20251107210706.45044-1-ovidiu.panait.rb@renesas.com>
Enable RTC.
Signed-off-by: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
---
arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts b/arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts
index 7fff8bea9494..99dfb40b6ea8 100644
--- a/arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts
+++ b/arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts
@@ -407,6 +407,10 @@ &qextal_clk {
clock-frequency = <24000000>;
};
+&rtc {
+ status = "okay";
+};
+
&rtxin_clk {
clock-frequency = <32768>;
};
--
2.51.0
^ permalink raw reply related
* Re: [PATCH v4 2/4] rtc: renesas-rtca3: Add support for multiple reset lines
From: Claudiu Beznea @ 2025-11-08 9:46 UTC (permalink / raw)
To: Ovidiu Panait, claudiu.beznea.uj, alexandre.belloni, robh,
krzk+dt, conor+dt, geert+renesas, magnus.damm, p.zabel
Cc: linux-rtc, linux-renesas-soc, devicetree, linux-kernel
In-Reply-To: <20251107210706.45044-3-ovidiu.panait.rb@renesas.com>
On 11/7/25 23:07, Ovidiu Panait wrote:
> Switch from devm_reset_control_get_shared() to
> devm_reset_control_array_get_shared() when retrieving resets.
>
> The RZ/V2H SoC requires two resets for the RTC block instead of one,
> so this will allow to handle multiple resets without additional changes.
>
> Signed-off-by: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
> ---
> drivers/rtc/rtc-renesas-rtca3.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/rtc/rtc-renesas-rtca3.c b/drivers/rtc/rtc-renesas-rtca3.c
> index ab816bdf0d77..3524053269ef 100644
> --- a/drivers/rtc/rtc-renesas-rtca3.c
> +++ b/drivers/rtc/rtc-renesas-rtca3.c
> @@ -726,7 +726,7 @@ static int rtca3_probe(struct platform_device *pdev)
> if (ret)
> return ret;
>
> - priv->rstc = devm_reset_control_get_shared(dev, NULL);
> + priv->rstc = devm_reset_control_array_get_shared(dev);
> if (IS_ERR(priv->rstc))
> return PTR_ERR(priv->rstc);
>
^ permalink raw reply
* [GIT PULL] RTC fixes for 6.18
From: Alexandre Belloni @ 2025-11-08 20:39 UTC (permalink / raw)
To: Linus Torvalds; +Cc: linux-rtc, linux-kernel
Hello Linus,
Here are some fixes for 6.18. The two reverts are for patches that I
shouldn't have applied. The rx8025 patch fixes an issue present since
2022.
The following changes since commit 3a8660878839faadb4f1a6dd72c3179c1df56787:
Linux 6.18-rc1 (2025-10-12 13:42:36 -0700)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux.git tags/rtc-6.18-fixes
for you to fetch changes up to 162f24cbb0f6ec596e7e9f3e91610d79dc805229:
rtc: rx8025: fix incorrect register reference (2025-11-08 20:56:12 +0100)
----------------------------------------------------------------
RTC fixes for 6.18
Drivers:
- cpcap, tps6586x: revert incorrect irq enable/disable balance fix
- rx8025: fix incorrect register reference
----------------------------------------------------------------
Jon Hunter (2):
Revert "rtc: tps6586x: Fix initial enable_irq/disable_irq balance"
Revert "rtc: cpcap: Fix initial enable_irq/disable_irq balance"
Yuta Hayama (1):
rtc: rx8025: fix incorrect register reference
drivers/rtc/rtc-cpcap.c | 1 -
drivers/rtc/rtc-rx8025.c | 2 +-
drivers/rtc/rtc-tps6586x.c | 1 -
3 files changed, 1 insertion(+), 3 deletions(-)
--
Alexandre Belloni, co-owner and COO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply
* Re: [PATCH] rtc: rx8025: fix incorrect register reference
From: Alexandre Belloni @ 2025-11-08 20:39 UTC (permalink / raw)
To: linux-rtc, linux-kernel, Yuta Hayama; +Cc: Takao Miyasaka, Naokado OGISO
In-Reply-To: <eae5f479-5d28-4a37-859d-d54794e7628c@lineo.co.jp>
On Wed, 15 Oct 2025 12:07:05 +0900, Yuta Hayama wrote:
> This code is intended to operate on the CTRL1 register, but ctrl[1] is
> actually CTRL2. Correctly, ctrl[0] is CTRL1.
>
>
Applied, thanks!
[1/1] rtc: rx8025: fix incorrect register reference
https://git.kernel.org/abelloni/c/162f24cbb0f6
Best regards,
--
Alexandre Belloni, co-owner and COO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply
* Re: [GIT PULL] RTC fixes for 6.18
From: pr-tracker-bot @ 2025-11-09 0:08 UTC (permalink / raw)
To: Alexandre Belloni; +Cc: Linus Torvalds, linux-rtc, linux-kernel
In-Reply-To: <20251108203908b1400ce8@mail.local>
The pull request you sent on Sat, 8 Nov 2025 21:39:08 +0100:
> git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux.git tags/rtc-6.18-fixes
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/41d318c47fa2090dbca7329037e5d63abeddebdf
Thank you!
--
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/prtracker.html
^ permalink raw reply
* [PATCH] rtc: isl12026: Add id_table
From: Akhilesh Patil @ 2025-11-09 5:48 UTC (permalink / raw)
To: alexandre.belloni, ddaney, david.daney, pombredanne
Cc: linux-rtc, linux-kernel, akhileshpatilvnit, skhan
Add i2c id_table for isl12026 rtc.
Signed-off-by: Akhilesh Patil <akhilesh@ee.iitb.ac.in>
---
tested by instantiating isl12026 device as
echo "isl12026 0x6f" > new_device
Tested rtc on TI am62x sk board on i2c-2 using rtctest.
I am currently implementing alarm support for isl12026
this patch helps to instantiate device runtime without DT
for faster testing without reboots.
drivers/rtc/rtc-isl12026.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/rtc/rtc-isl12026.c b/drivers/rtc/rtc-isl12026.c
index 2aabb9151d4c..45a2c9f676c5 100644
--- a/drivers/rtc/rtc-isl12026.c
+++ b/drivers/rtc/rtc-isl12026.c
@@ -484,6 +484,12 @@ static const struct of_device_id isl12026_dt_match[] = {
};
MODULE_DEVICE_TABLE(of, isl12026_dt_match);
+static const struct i2c_device_id isl12026_id[] = {
+ { "isl12026" },
+ { },
+};
+MODULE_DEVICE_TABLE(i2c, isl12026_id);
+
static struct i2c_driver isl12026_driver = {
.driver = {
.name = "rtc-isl12026",
@@ -491,6 +497,7 @@ static struct i2c_driver isl12026_driver = {
},
.probe = isl12026_probe,
.remove = isl12026_remove,
+ .id_table = isl12026_id,
};
module_i2c_driver(isl12026_driver);
--
2.34.1
^ permalink raw reply related
* [PATCH] rtc: Fix error handling in devm_rtc_allocate_device
From: Ma Ke @ 2025-11-09 6:08 UTC (permalink / raw)
To: alexandre.belloni; +Cc: linux-rtc, linux-kernel, akpm, Ma Ke, stable
In rtc_allocate_device(), device_initialize() sets the reference count
to 1. In rtc_allocate_device(), when devm_add_action_or_reset() or
dev_set_name() fails after successful device initialization via
device_initialize(), rtc_allocate_device() returns an error without
properly calling put_device() and releasing the reference count.
Add proper error handling that calls put_device() in all error paths
after device_initialize(), ensuring proper resource cleanup.
Found by code review.
Cc: stable@vger.kernel.org
Fixes: 3068a254d551 ("rtc: introduce new registration method")
Signed-off-by: Ma Ke <make24@iscas.ac.cn>
---
drivers/rtc/class.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/rtc/class.c b/drivers/rtc/class.c
index b1a2be1f9e3b..db5f33a22b14 100644
--- a/drivers/rtc/class.c
+++ b/drivers/rtc/class.c
@@ -379,13 +379,17 @@ struct rtc_device *devm_rtc_allocate_device(struct device *dev)
rtc->dev.parent = dev;
err = devm_add_action_or_reset(dev, devm_rtc_release_device, rtc);
if (err)
- return ERR_PTR(err);
+ goto err_put_device;
err = dev_set_name(&rtc->dev, "rtc%d", id);
if (err)
- return ERR_PTR(err);
+ goto err_put_device;
return rtc;
+
+err_put_device:
+ put_device(&rtc->dev);
+ return ERR_PTR(err);
}
EXPORT_SYMBOL_GPL(devm_rtc_allocate_device);
--
2.17.1
^ permalink raw reply related
* Re: [PATCH] rtc: Fix error handling in devm_rtc_allocate_device
From: Christophe JAILLET @ 2025-11-09 8:59 UTC (permalink / raw)
To: Ma Ke, alexandre.belloni; +Cc: linux-rtc, linux-kernel, akpm, stable
In-Reply-To: <20251109060817.5620-1-make24@iscas.ac.cn>
Le 09/11/2025 à 07:08, Ma Ke a écrit :
> In rtc_allocate_device(), device_initialize() sets the reference count
> to 1. In rtc_allocate_device(), when devm_add_action_or_reset() or
> dev_set_name() fails after successful device initialization via
> device_initialize(), rtc_allocate_device() returns an error without
> properly calling put_device() and releasing the reference count.
The correct error handling is already in place and your patch looks wrong.
> Add proper error handling that calls put_device() in all error paths
> after device_initialize(), ensuring proper resource cleanup.
This is precisely the purpose of devm_add_action_or_reset().
Look at it and at the devm_rtc_release_device() which does what you expect.
CJ
>
> Found by code review.
>
> Cc: stable@vger.kernel.org
> Fixes: 3068a254d551 ("rtc: introduce new registration method")
> Signed-off-by: Ma Ke <make24@iscas.ac.cn>
> ---
> drivers/rtc/class.c | 8 ++++++--
> 1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/rtc/class.c b/drivers/rtc/class.c
> index b1a2be1f9e3b..db5f33a22b14 100644
> --- a/drivers/rtc/class.c
> +++ b/drivers/rtc/class.c
> @@ -379,13 +379,17 @@ struct rtc_device *devm_rtc_allocate_device(struct device *dev)
> rtc->dev.parent = dev;
> err = devm_add_action_or_reset(dev, devm_rtc_release_device, rtc);
> if (err)
> - return ERR_PTR(err);
> + goto err_put_device;
>
> err = dev_set_name(&rtc->dev, "rtc%d", id);
> if (err)
> - return ERR_PTR(err);
> + goto err_put_device;
>
> return rtc;
> +
> +err_put_device:
> + put_device(&rtc->dev);
> + return ERR_PTR(err);
> }
> EXPORT_SYMBOL_GPL(devm_rtc_allocate_device);
>
^ permalink raw reply
* [PATCH] MAINTAINERS: drop unneeded file entry in NVIDIA VRS RTC DRIVER
From: Lukas Bulwahn @ 2025-11-10 7:35 UTC (permalink / raw)
To: Shubhi Garg, Alexandre Belloni, linux-tegra, linux-rtc
Cc: Jon Hunter, kernel-janitors, linux-kernel, Lukas Bulwahn
From: Lukas Bulwahn <lukas.bulwahn@redhat.com>
Commit 9d6d6b06933c ("rtc: nvvrs: add NVIDIA VRS RTC device driver") adds
the section NVIDIA VRS RTC DRIVER in MAINTAINERS, which refers to the
non-existing file include/linux/rtc/rtc-nvidia-vrs10.h
Note, with the changes of v6 to v7 of the patch series adding the driver,
the content of this include file was moved into the driver file, and the
include file was dropped from that patch. It was simply missed to adjust
the section in MAINTAINERS that was newly added with that patch.
Drop the file entry to this non-existing file accordingly now.
Signed-off-by: Lukas Bulwahn <lukas.bulwahn@redhat.com>
---
MAINTAINERS | 1 -
1 file changed, 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 2a881629003c..b2b55947efef 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -18586,7 +18586,6 @@ L: linux-tegra@vger.kernel.org
S: Maintained
F: Documentation/devicetree/bindings/rtc/nvidia,vrs-10.yaml
F: drivers/rtc/rtc-nvidia-vrs10.c
-F: include/linux/rtc/rtc-nvidia-vrs10.h
NVIDIA WMI EC BACKLIGHT DRIVER
M: Daniel Dadap <ddadap@nvidia.com>
--
2.51.1
^ permalink raw reply related
* Re: [PATCH] MAINTAINERS: drop unneeded file entry in NVIDIA VRS RTC DRIVER
From: Jon Hunter @ 2025-11-10 11:47 UTC (permalink / raw)
To: Lukas Bulwahn, Shubhi Garg, Alexandre Belloni, linux-tegra,
linux-rtc
Cc: kernel-janitors, linux-kernel, Lukas Bulwahn
In-Reply-To: <20251110073544.443816-1-lukas.bulwahn@redhat.com>
On 10/11/2025 07:35, Lukas Bulwahn wrote:
> From: Lukas Bulwahn <lukas.bulwahn@redhat.com>
>
> Commit 9d6d6b06933c ("rtc: nvvrs: add NVIDIA VRS RTC device driver") adds
> the section NVIDIA VRS RTC DRIVER in MAINTAINERS, which refers to the
> non-existing file include/linux/rtc/rtc-nvidia-vrs10.h
>
> Note, with the changes of v6 to v7 of the patch series adding the driver,
> the content of this include file was moved into the driver file, and the
> include file was dropped from that patch. It was simply missed to adjust
> the section in MAINTAINERS that was newly added with that patch.
>
> Drop the file entry to this non-existing file accordingly now.
>
> Signed-off-by: Lukas Bulwahn <lukas.bulwahn@redhat.com>
> ---
> MAINTAINERS | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 2a881629003c..b2b55947efef 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -18586,7 +18586,6 @@ L: linux-tegra@vger.kernel.org
> S: Maintained
> F: Documentation/devicetree/bindings/rtc/nvidia,vrs-10.yaml
> F: drivers/rtc/rtc-nvidia-vrs10.c
> -F: include/linux/rtc/rtc-nvidia-vrs10.h
>
> NVIDIA WMI EC BACKLIGHT DRIVER
> M: Daniel Dadap <ddadap@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Thanks!
Jon
--
nvpublic
^ permalink raw reply
* Re: (subset) [PATCH v2 1/4] mfd: simple-mfd-i2c: remove select I2C_K1
From: Lee Jones @ 2025-11-10 13:45 UTC (permalink / raw)
To: Troy Mitchell
Cc: Yixun Lan, Alex Elder, Andi Shyti, Alexandre Belloni,
Liam Girdwood, Mark Brown, linux-kernel, linux-riscv, spacemit,
linux-i2c, linux-rtc, kernel test robot
In-Reply-To: <71DB25E553BE0B04+aQ1LlKzeR-FkZA83@kernel.org>
On Fri, 07 Nov 2025, Troy Mitchell wrote:
> On Thu, Nov 06, 2025 at 04:04:21PM +0000, Lee Jones wrote:
> > On Mon, 27 Oct 2025 13:48:05 +0800, Troy Mitchell wrote:
> > > select will force a symbol to a specific value without considering
> > > its dependencies. As a result, the i2c-k1 driver will fail to build
> > > when OF or COMMON_CLK are disabled.
> > >
> > > The reason for removing I2C_K1 instead of adding a depends on condition
> > > is to keep the possibility for other SoCs to use this PMIC.
> > >
> > > [...]
> >
> > Applied, thanks!
> >
> > [1/4] mfd: simple-mfd-i2c: remove select I2C_K1
> > commit: ecf6bc474ae97c404e2125b413eb0ef3627b03c5
> Hi Lee,
>
> I think you didn't notice this reply [1]
> (Maybe because he was replying to the cover letter).
>
> As Aurelien mentioned, the current shutdown/reboot (and possibly the regulator
> as well) intends to use the `default MFD_SPACEMIT_P1`.
> So if there’s no `default m if ARCH_SPACEMIT`,
> the default value in subdevices may not make much sense.
>
> But don’t worry — to make things easier for you, I’ll send an additional
> patch based on your branch (in this series).
>
> How does that sound?
Go for it.
--
Lee Jones [李琼斯]
^ permalink raw reply
* Re: [PATCH v4 1/4] dt-bindings: rtc: renesas,rz-rtca3: Add RZ/V2H support
From: Conor Dooley @ 2025-11-10 18:50 UTC (permalink / raw)
To: Ovidiu Panait
Cc: claudiu.beznea.uj, alexandre.belloni, robh, krzk+dt, conor+dt,
geert+renesas, magnus.damm, p.zabel, linux-rtc, linux-renesas-soc,
devicetree, linux-kernel
In-Reply-To: <20251107210706.45044-2-ovidiu.panait.rb@renesas.com>
[-- Attachment #1: Type: text/plain, Size: 856 bytes --]
On Fri, Nov 07, 2025 at 09:07:03PM +0000, Ovidiu Panait wrote:
> The Renesas RZ/V2H RTC IP is based on the same RTCA3 IP as RZ/G3S
> (r9a08g045), with the following differences:
> - It lacks the time capture functionality
> - The maximum supported periodic interrupt frequency is 128Hz instead
> of 256Hz
> - It requires two reset lines instead of one
>
> Add new compatible string "renesas,r9a09g057-rtca3" for RZ/V2H and update
> the binding accordingly:
> - Allow "resets" to contain one or two entries depending on the SoC.
> - Add "reset-names" property, but make it required only for RZ/V2H.
>
> Signed-off-by: Ovidiu Panait <ovidiu.panait.rb@renesas.com>
Didn't Alexandre already apply this? The changed version is
Acked-by: Conor Dooley <conor.dooley@microchip.com>
in case this replaces the other.
pw-bot: not-applicable
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
^ permalink raw reply
* Re: [PATCH v3 02/16] dt-bindings: battery: Clarify trickle-charge
From: Linus Walleij @ 2025-11-10 23:04 UTC (permalink / raw)
To: Matti Vaittinen
Cc: Matti Vaittinen, Lee Jones, Pavel Machek, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Sebastian Reichel,
Liam Girdwood, Mark Brown, Michael Turquette, Stephen Boyd,
Bartosz Golaszewski, Alexandre Belloni, linux-leds, devicetree,
linux-kernel, linux-pm, linux-clk, linux-gpio, linux-rtc,
Andreas Kemnade
In-Reply-To: <742fcdcc8b6dcb5989418e8c1cf5a7d7ba5434a5.1762327887.git.mazziesaccount@gmail.com>
On Wed, Nov 5, 2025 at 8:36 AM Matti Vaittinen
<matti.vaittinen@linux.dev> wrote:
> From: Matti Vaittinen <mazziesaccount@gmail.com>
>
> The term 'trickle-charging' is used to describe a very slow charging
> phase, where electrons "trickle-in" the battery.
>
> There are two different use-cases for this type of charging. At least
> some Li-Ion batteries can benefit from very slow, constant current,
> pre-pre phase 'trickle-charging', if a battery is very empty.
>
> Some other batteries use top-off phase 'trickle-charging', which is
> different from the above case.
>
> The battery bindings use the term 'trickle-charge' without specifying
> which of the use-cases properties are addressing. This has already
> caused some confusion.
>
> Clarify that the 'trickle-charge-current-microamp' refers to the first
> one, the "pre-pre" -charging use-case.
>
> Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> Signed-off-by: Matti Vaittinen <mazziesaccount@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Yours,
Linus Walleij
^ permalink raw reply
* [PATCH RESEND] rtc: max31335: Fix ignored return value in set_alarm
From: Nuno Sá via B4 Relay @ 2025-11-11 17:48 UTC (permalink / raw)
To: linux-rtc; +Cc: Alexandre Belloni, Guenter Roeck, Antoniu Miclaus
From: Nuno Sá <nuno.sa@analog.com>
Return the result from regmap_update_bits() instead of ignoring it
and always returning 0.
Fixes: dedaf03b99d6 ("rtc: max31335: add driver support")
Signed-off-by: Nuno Sá <nuno.sa@analog.com>
---
drivers/rtc/rtc-max31335.c | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/rtc/rtc-max31335.c b/drivers/rtc/rtc-max31335.c
index dfb5bad3a369..23b7bf16b4cd 100644
--- a/drivers/rtc/rtc-max31335.c
+++ b/drivers/rtc/rtc-max31335.c
@@ -391,10 +391,8 @@ static int max31335_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
if (ret)
return ret;
- ret = regmap_update_bits(max31335->regmap, max31335->chip->int_status_reg,
- MAX31335_STATUS1_A1F, 0);
-
- return 0;
+ return regmap_update_bits(max31335->regmap, max31335->chip->int_status_reg,
+ MAX31335_STATUS1_A1F, 0);
}
static int max31335_alarm_irq_enable(struct device *dev, unsigned int enabled)
---
base-commit: 9db26d5855d0374d4652487bfb5aacf40821c469
change-id: 20251029-max31335-handler-error-65a286c74289
--
Thanks!
- Nuno Sá
--
Nuno Sá <nuno.sa@analog.com>
^ permalink raw reply related
* Re: [PATCH v2 2/4] i2c: spacemit: configure ILCR for accurate SCL frequency
From: Troy Mitchell @ 2025-11-12 6:14 UTC (permalink / raw)
To: Lee Jones, Yixun Lan, Alex Elder, Andi Shyti, Alexandre Belloni,
Liam Girdwood, Mark Brown
Cc: linux-kernel, linux-riscv, spacemit, linux-i2c, linux-rtc,
Troy Mitchell
In-Reply-To: <20251027-p1-kconfig-fix-v2-2-49688f30bae8@linux.spacemit.com>
On Mon, Oct 27, 2025 at 01:48:06PM +0800, Troy Mitchell wrote:
> The SpacemiT I2C controller's SCL (Serial Clock Line) frequency for
> master mode operations is determined by the ILCR (I2C Load Count Register).
> Previously, the driver relied on the hardware's reset default
> values for this register.
>
> The hardware's default ILCR values (SLV=0x156, FLV=0x5d) yield SCL
> frequencies lower than intended. For example, with the default
> 31.5 MHz input clock, these default settings result in an SCL
> frequency of approximately 93 kHz (standard mode) when targeting 100 kHz,
> and approximately 338 kHz (fast mode) when targeting 400 kHz.
> These frequencies are below the 100 kHz/400 kHz nominal speeds.
>
> This patch integrates the SCL frequency management into
> the Common Clock Framework (CCF). Specifically, the ILCR register,
> which acts as a frequency divider for the SCL clock, is now registered
> as a managed clock (scl_clk) within the CCF.
>
> This patch also cleans up unnecessary whitespace
> in the included header files.
>
> Reviewed-by: Yixun Lan <dlan@gentoo.org>
> Signed-off-by: Troy Mitchell <troy.mitchell@linux.spacemit.com>
> ---
> This patch was affected by the P1 Kconfig, which caused the maintainer
> to revert it.
> The current commit is a direct cherry-pick and reserves the original changelog.
> This note is to clarify for anyone who sees the cover letter marked as v2
> while the changelog entries reach v4.
Hi Andi,
Since the issue affecting the I2C patch has been fixed [1],
I think it should be ready to be merged now. What do you think?
Link: https://lore.kernel.org/all/176244506110.1925720.10807118665958896958.b4-ty@kernel.org/ [1]
- Troy
^ permalink raw reply
* [PATCH v5 00/11] mfd: macsmc: add rtc, hwmon and hid subdevices
From: James Calligeros @ 2025-11-12 11:16 UTC (permalink / raw)
To: Sven Peter, Janne Grunau, Alyssa Rosenzweig, Neal Gompa,
Lee Jones, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Alexandre Belloni, Jean Delvare, Guenter Roeck, Dmitry Torokhov,
Jonathan Corbet, James Calligeros
Cc: asahi, linux-arm-kernel, devicetree, linux-kernel, linux-rtc,
linux-hwmon, linux-input, linux-doc, Mark Kettenis, Hector Martin
Hi all,
This series adds support for the remaining SMC subdevices. These are the
RTC, hwmon, and HID devices. They are being submitted together as the RTC
and hwmon drivers both require changes to the SMC DT schema.
The RTC driver is responsible for getting and setting the system clock,
and requires an NVMEM cell. This series replaces Sven's original RTC driver
submission [1].
The hwmon function is an interesting one. While each Apple Silicon device
exposes pretty similar sets of sensors, these all seem to be paired to
different SMC keys in the firmware interface. This is true even when the
sensors are on the SoC. For example, an M1 MacBook Pro will use different
keys to access the LITTLE core temperature sensors to an M1 Mac mini. This
necessitates describing which keys correspond to which sensors for each
device individually, and populating the hwmon structs at runtime. We do
this with a node in the device tree. This series includes only the keys
for sensors which we know to be common to all devices. The SMC is also
responsible for monitoring and controlling fan speeds on systems with fans,
which we expose via the hwmon driver.
The SMC also handles the hardware power button and lid switch. Power
button presses and lid opening/closing are emitted as HID events, so we
add an input subdevice to handle them.
Since there are no real dependencies between the components of this series,
it should be fine for each subsystem to take the relevant patches through
their trees. The mfd one-liners should be taken in order to avoid trivial
conflicts. Per [2], the hwmon driver should be merged along with the preceding
mfd patch adding the __SMC_KEY macro to avoid build errors.
Regards,
James
[1] https://lore.kernel.org/asahi/CAEg-Je84XxLWH7vznQmPRfjf6GxWOu75ZetwN7AdseAwfMLLrQ@mail.gmail.com/T/#t
[2] https://lore.kernel.org/asahi/20251106140050.GQ8064@google.com/
---
Changes in v5:
- Drop inadvertent mfd core includes in rtc and input drivers
- Link to v4: https://lore.kernel.org/r/20251025-macsmc-subdevs-v4-0-374d5c9eba0e@gmail.com
Changes in v4:
- Added Rob's R-b to hwmon Devicetree schema
- Added missing include to hwmon driver
- Dropped superfluous dev_info() from hwmon probe
- Added Guenter's A-b to hwmon driver
- Renamed INPUT_MACSMC_INPUT to INPUT_MACSMC
- Dropped leftover mention of HID in input driver
- Reinstated input driver MODULE_ALIAS
- Trigger a hard wakeup on power button/lid switch when coming out of
s2idle
- Suppress KEY_POWER event on wakeup to prevent an immediate shutdown
when waking up
- Squashed hwmon Devicetree commits into one
- Link to v3: https://lore.kernel.org/r/20251007-macsmc-subdevs-v3-0-d7d3bfd7ae02@gmail.com
Changes in v3:
- Renamed macsmc-hid to macsmc-input
- Switched to pm_wakeup_event in macsmc-input
- macsmc-input now configures its capabilities before registering the device
- Renamed macsmc_hwmon to macsmc-hwmon
- Dropped module aliases in macsmc-input and macsmc_hwmon
- Introduced new SMC FourCC macro to silence GCC errors
- Condensed hwmon binding using $defs
- Made label property optional for hwmon sensors
- Fixed incorrect hwmon is_visible implementation
- Dropped 64-bit math from SMC float ops
- Fixed incorrect use of error numbers in hwmon driver
- Replaced a number of non-fatal dev_errs with dev_dbgs in hwmon driver
- Added hwmon driver documentation
- Added hwmon subdevice directly to the DT SMC node
- Included "common" hwmon sensors in SoC .dtsi files
- Fixed typo in hwmon-common.dtsi
- Added Neal's R-b to series
- Added required nodes to t602x Devicetrees
- Link to v2: https://lore.kernel.org/r/20250827-macsmc-subdevs-v2-0-ce5e99d54c28@gmail.com
Changes in v2:
- Added Rob's R-b tag to RTC DT binding
- Removed redundant nesting from hwmon DT binding
- Dedpulicated property definitions in hwmon DT schema
- Made label a required property for hwmon DT nodes
- Clarified semantics in hwmon DT schema definitions
- Split mfd tree changes into separate commits
- Fixed numerous style errors in hwmon driver
- Removed log messages sysfs read/write functions in hwmon driver
- Removed ignored errors from hwmon driver
- Removed uses of dev_err for non-errors in hwmon driver
- Made it more obvious that a number of hwmon fan properties are optional
- Modified hwmon driver to reflect DT schema changes
- Added compatible property to hwmon node
- Link to v1: https://lore.kernel.org/r/20250819-macsmc-subdevs-v1-0-57df6c3e5f19@gmail.com
---
Hector Martin (2):
rtc: Add new rtc-macsmc driver for Apple Silicon Macs
input: macsmc-input: New driver to handle the Apple Mac SMC buttons/lid
James Calligeros (7):
dt-bindings: hwmon: Add Apple System Management Controller hwmon schema
mfd: macsmc: Wire up Apple SMC RTC subdevice
mfd: macsmc: Add new __SMC_KEY macro
hwmon: Add Apple Silicon SMC hwmon driver
mfd: macsmc: Wire up Apple SMC hwmon subdevice
mfd: macsmc: Wire up Apple SMC input subdevice
arm64: dts: apple: t8103, t8112, t60xx: Add hwmon SMC subdevice
Sven Peter (2):
dt-bindings: rtc: Add Apple SMC RTC
arm64: dts: apple: t8103,t60xx,t8112: Add SMC RTC node
.../bindings/hwmon/apple,smc-hwmon.yaml | 86 +++
.../bindings/mfd/apple,smc.yaml | 45 ++
.../bindings/rtc/apple,smc-rtc.yaml | 35 +
Documentation/hwmon/macsmc-hwmon.rst | 71 +++
MAINTAINERS | 6 +
.../boot/dts/apple/hwmon-common.dtsi | 33 +
.../boot/dts/apple/hwmon-fan-dual.dtsi | 22 +
arch/arm64/boot/dts/apple/hwmon-fan.dtsi | 17 +
.../boot/dts/apple/hwmon-laptop.dtsi | 33 +
.../boot/dts/apple/hwmon-mac-mini.dtsi | 15 +
.../arm64/boot/dts/apple/t6001-j375c.dts | 2 +
arch/arm64/boot/dts/apple/t6001.dtsi | 2 +
.../arm64/boot/dts/apple/t6002-j375d.dts | 2 +
.../arm64/boot/dts/apple/t600x-die0.dtsi | 10 +
.../boot/dts/apple/t600x-j314-j316.dtsi | 3 +
.../arm64/boot/dts/apple/t602x-die0.dtsi | 10 +
arch/arm64/boot/dts/apple/t8103-j274.dts | 2 +
arch/arm64/boot/dts/apple/t8103-j293.dts | 3 +
arch/arm64/boot/dts/apple/t8103-j313.dts | 2 +
arch/arm64/boot/dts/apple/t8103-j456.dts | 2 +
arch/arm64/boot/dts/apple/t8103-j457.dts | 2 +
arch/arm64/boot/dts/apple/t8103.dtsi | 11 +
arch/arm64/boot/dts/apple/t8112-j413.dts | 2 +
arch/arm64/boot/dts/apple/t8112-j473.dts | 2 +
arch/arm64/boot/dts/apple/t8112-j493.dts | 3 +
arch/arm64/boot/dts/apple/t8112.dtsi | 11 +
drivers/hwmon/Kconfig | 12 +
drivers/hwmon/Makefile | 1 +
drivers/hwmon/macsmc-hwmon.c | 851 +++++++++++++++++++++++++
drivers/input/misc/Kconfig | 11 +
drivers/input/misc/Makefile | 1 +
drivers/input/misc/macsmc-input.c | 207 ++++++
drivers/mfd/macsmc.c | 3 +
drivers/rtc/Kconfig | 11 +
drivers/rtc/Makefile | 1 +
drivers/rtc/rtc-macsmc.c | 140 ++++
include/linux/mfd/macsmc.h | 1 +
37 files changed, 1671 insertions(+)
---
base-commit: 24172e0d79900908cf5ebf366600616d29c9b417
change-id: 20250816-macsmc-subdevs-87032c017d0c
Best regards,
--
James Calligeros <jcalligeros99@gmail.com>
^ permalink raw reply
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