* [PATCH 2/3] rtc: s5m: query platform device IRQ resource for alarm IRQ
From: André Draszik @ 2025-11-14 11:47 UTC (permalink / raw)
To: Krzysztof Kozlowski, Lee Jones, Alexandre Belloni
Cc: Peter Griffin, Tudor Ambarus, Will McVicker, Juan Yescas,
Douglas Anderson, kernel-team, Kaustabh Chakraborty, linux-kernel,
linux-samsung-soc, linux-rtc, André Draszik
In-Reply-To: <20251114-s5m-alarm-v1-0-c9b3bebae65f@linaro.org>
The core driver now exposes the alarm IRQ as a resource, so we can drop
the lookup from here to simplify the code and make adding support for
additional variants easier in this driver.
Signed-off-by: André Draszik <andre.draszik@linaro.org>
---
drivers/rtc/rtc-s5m.c | 21 ++++++++-------------
1 file changed, 8 insertions(+), 13 deletions(-)
diff --git a/drivers/rtc/rtc-s5m.c b/drivers/rtc/rtc-s5m.c
index a7220b4d0e8dd35786b060e2a4106e2a39fe743f..c6ed5a4ca8a0e4554b1c88c879b01fc384735007 100644
--- a/drivers/rtc/rtc-s5m.c
+++ b/drivers/rtc/rtc-s5m.c
@@ -15,7 +15,6 @@
#include <linux/rtc.h>
#include <linux/platform_device.h>
#include <linux/mfd/samsung/core.h>
-#include <linux/mfd/samsung/irq.h>
#include <linux/mfd/samsung/rtc.h>
#include <linux/mfd/samsung/s2mps14.h>
@@ -683,22 +682,18 @@ static int s5m_rtc_probe(struct platform_device *pdev)
case S2MPS15X:
regmap_cfg = &s2mps14_rtc_regmap_config;
info->regs = &s2mps15_rtc_regs;
- alarm_irq = S2MPS14_IRQ_RTCA0;
break;
case S2MPS14X:
regmap_cfg = &s2mps14_rtc_regmap_config;
info->regs = &s2mps14_rtc_regs;
- alarm_irq = S2MPS14_IRQ_RTCA0;
break;
case S2MPS13X:
regmap_cfg = &s2mps14_rtc_regmap_config;
info->regs = &s2mps13_rtc_regs;
- alarm_irq = S2MPS14_IRQ_RTCA0;
break;
case S5M8767X:
regmap_cfg = &s5m_rtc_regmap_config;
info->regs = &s5m_rtc_regs;
- alarm_irq = S5M8767_IRQ_RTCA1;
break;
default:
return dev_err_probe(&pdev->dev, -ENODEV,
@@ -719,7 +714,6 @@ static int s5m_rtc_probe(struct platform_device *pdev)
"Failed to allocate regmap\n");
} else if (device_type == S2MPG10) {
info->regs = &s2mpg10_rtc_regs;
- alarm_irq = S2MPG10_IRQ_RTCA0;
} else {
return dev_err_probe(&pdev->dev, -ENODEV,
"Unsupported device type %d\n",
@@ -730,13 +724,14 @@ static int s5m_rtc_probe(struct platform_device *pdev)
info->s5m87xx = s5m87xx;
info->device_type = device_type;
- if (s5m87xx->irq_data) {
- info->irq = regmap_irq_get_virq(s5m87xx->irq_data, alarm_irq);
- if (info->irq <= 0)
- return dev_err_probe(&pdev->dev, -EINVAL,
- "Failed to get virtual IRQ %d\n",
- alarm_irq);
- }
+ alarm_irq = platform_get_irq_byname_optional(pdev, "alarm");
+ if (alarm_irq > 0)
+ info->irq = alarm_irq;
+ else if (alarm_irq == -ENXIO)
+ info->irq = 0;
+ else
+ return dev_err_probe(&pdev->dev, alarm_irq ? : -EINVAL,
+ "IRQ 'alarm' not found\n");
platform_set_drvdata(pdev, info);
--
2.52.0.rc1.455.g30608eb744-goog
^ permalink raw reply related
* [PATCH 1/3] mfd: sec: add rtc alarm IRQ as platform device resource
From: André Draszik @ 2025-11-14 11:47 UTC (permalink / raw)
To: Krzysztof Kozlowski, Lee Jones, Alexandre Belloni
Cc: Peter Griffin, Tudor Ambarus, Will McVicker, Juan Yescas,
Douglas Anderson, kernel-team, Kaustabh Chakraborty, linux-kernel,
linux-samsung-soc, linux-rtc, André Draszik
In-Reply-To: <20251114-s5m-alarm-v1-0-c9b3bebae65f@linaro.org>
By adding the RTC alarm IRQ to the MFD cell as a resource, the child
driver (rtc) can simply query that IRQ, instead of having a lookup
table itself.
This change therefore allows the child driver to be simplified with
regards to determining the alarm IRQ.
Signed-off-by: André Draszik <andre.draszik@linaro.org>
---
drivers/mfd/sec-common.c | 38 +++++++++++++++++++++++++++++---------
1 file changed, 29 insertions(+), 9 deletions(-)
diff --git a/drivers/mfd/sec-common.c b/drivers/mfd/sec-common.c
index 42d55e70e34c8d7cd68cddaecc88017e259365b4..77370db52a7ba81234136b29f85892f4b197f429 100644
--- a/drivers/mfd/sec-common.c
+++ b/drivers/mfd/sec-common.c
@@ -23,9 +23,13 @@
#include <linux/regmap.h>
#include "sec-core.h"
+static const struct resource s5m8767_rtc_resources[] = {
+ DEFINE_RES_IRQ_NAMED(S5M8767_IRQ_RTCA1, "alarm"),
+};
+
static const struct mfd_cell s5m8767_devs[] = {
MFD_CELL_NAME("s5m8767-pmic"),
- MFD_CELL_NAME("s5m-rtc"),
+ MFD_CELL_RES("s5m-rtc", s5m8767_rtc_resources),
MFD_CELL_OF("s5m8767-clk", NULL, NULL, 0, 0, "samsung,s5m8767-clk"),
};
@@ -33,50 +37,66 @@ static const struct mfd_cell s2dos05_devs[] = {
MFD_CELL_NAME("s2dos05-regulator"),
};
+static const struct resource s2mpg10_rtc_resources[] = {
+ DEFINE_RES_IRQ_NAMED(S2MPG10_IRQ_RTCA0, "alarm"),
+};
+
static const struct mfd_cell s2mpg10_devs[] = {
MFD_CELL_NAME("s2mpg10-meter"),
MFD_CELL_NAME("s2mpg10-regulator"),
- MFD_CELL_NAME("s2mpg10-rtc"),
+ MFD_CELL_RES("s2mpg10-rtc", s2mpg10_rtc_resources),
MFD_CELL_OF("s2mpg10-clk", NULL, NULL, 0, 0, "samsung,s2mpg10-clk"),
MFD_CELL_OF("s2mpg10-gpio", NULL, NULL, 0, 0, "samsung,s2mpg10-gpio"),
};
+static const struct resource s2mps11_rtc_resources[] = {
+ DEFINE_RES_IRQ_NAMED(S2MPS11_IRQ_RTCA0, "alarm"),
+};
+
static const struct mfd_cell s2mps11_devs[] = {
MFD_CELL_NAME("s2mps11-regulator"),
- MFD_CELL_NAME("s2mps14-rtc"),
+ MFD_CELL_RES("s2mps14-rtc", s2mps11_rtc_resources),
MFD_CELL_OF("s2mps11-clk", NULL, NULL, 0, 0, "samsung,s2mps11-clk"),
};
+static const struct resource s2mps14_rtc_resources[] = {
+ DEFINE_RES_IRQ_NAMED(S2MPS14_IRQ_RTCA0, "alarm"),
+};
+
static const struct mfd_cell s2mps13_devs[] = {
MFD_CELL_NAME("s2mps13-regulator"),
- MFD_CELL_NAME("s2mps13-rtc"),
+ MFD_CELL_RES("s2mps13-rtc", s2mps14_rtc_resources),
MFD_CELL_OF("s2mps13-clk", NULL, NULL, 0, 0, "samsung,s2mps13-clk"),
};
static const struct mfd_cell s2mps14_devs[] = {
MFD_CELL_NAME("s2mps14-regulator"),
- MFD_CELL_NAME("s2mps14-rtc"),
+ MFD_CELL_RES("s2mps14-rtc", s2mps14_rtc_resources),
MFD_CELL_OF("s2mps14-clk", NULL, NULL, 0, 0, "samsung,s2mps14-clk"),
};
static const struct mfd_cell s2mps15_devs[] = {
MFD_CELL_NAME("s2mps15-regulator"),
- MFD_CELL_NAME("s2mps15-rtc"),
+ MFD_CELL_RES("s2mps15-rtc", s2mps14_rtc_resources),
MFD_CELL_OF("s2mps13-clk", NULL, NULL, 0, 0, "samsung,s2mps13-clk"),
};
static const struct mfd_cell s2mpa01_devs[] = {
MFD_CELL_NAME("s2mpa01-pmic"),
- MFD_CELL_NAME("s2mps14-rtc"),
+ MFD_CELL_RES("s2mps14-rtc", s2mps14_rtc_resources),
};
static const struct mfd_cell s2mpu02_devs[] = {
MFD_CELL_NAME("s2mpu02-regulator"),
};
+static const struct resource s2mpu05_rtc_resources[] = {
+ DEFINE_RES_IRQ_NAMED(S2MPU05_IRQ_RTCA0, "alarm"),
+};
+
static const struct mfd_cell s2mpu05_devs[] = {
MFD_CELL_NAME("s2mpu05-regulator"),
- MFD_CELL_NAME("s2mps15-rtc"),
+ MFD_CELL_RES("s2mps15-rtc", s2mpu05_rtc_resources),
};
static void sec_pmic_dump_rev(struct sec_pmic_dev *sec_pmic)
@@ -220,7 +240,7 @@ int sec_pmic_probe(struct device *dev, int device_type, unsigned int irq,
sec_pmic->device_type);
}
ret = devm_mfd_add_devices(sec_pmic->dev, -1, sec_devs, num_sec_devs,
- NULL, 0, NULL);
+ NULL, 0, regmap_irq_get_domain(sec_pmic->irq_data));
if (ret)
return ret;
--
2.52.0.rc1.455.g30608eb744-goog
^ permalink raw reply related
* [PATCH 0/3] Samsung mfd/rtc driver alarm IRQ simplification
From: André Draszik @ 2025-11-14 11:47 UTC (permalink / raw)
To: Krzysztof Kozlowski, Lee Jones, Alexandre Belloni
Cc: Peter Griffin, Tudor Ambarus, Will McVicker, Juan Yescas,
Douglas Anderson, kernel-team, Kaustabh Chakraborty, linux-kernel,
linux-samsung-soc, linux-rtc, André Draszik
Hi,
With the attached patches the Samsung s5m RTC driver is simplified a
little bit with regards to alarm IRQ acquisition.
The end result is that instead of having a list of IRQ numbers for each
variant (and a BUILD_BUG_ON() to ensure consistency), the RTC driver
queries the 'alarm' platform resource from the parent (mfd cell).
Additionally, we can drop a now-useless field from runtime data,
reducing memory consumption slightly.
The attached patches must be applied in-order. I would expect them all
to go via the MFD tree. Alternatively, they could be applied one after
another during multiple kernel release cycles, but that seems a
needless complication.
Signed-off-by: André Draszik <andre.draszik@linaro.org>
---
André Draszik (3):
mfd: sec: add rtc alarm IRQ as platform device resource
rtc: s5m: query platform device IRQ resource for alarm IRQ
mfd: sec: drop now unused struct sec_pmic_dev::irq_data
drivers/mfd/sec-common.c | 41 ++++++++++++++++++++++++++++++----------
drivers/mfd/sec-core.h | 2 +-
drivers/mfd/sec-irq.c | 10 ++--------
drivers/rtc/rtc-s5m.c | 21 ++++++++------------
include/linux/mfd/samsung/core.h | 1 -
5 files changed, 42 insertions(+), 33 deletions(-)
---
base-commit: b179ce312bafcb8c68dc718e015aee79b7939ff0
change-id: 20251114-s5m-alarm-3de705ea53ce
Best regards,
--
André Draszik <andre.draszik@linaro.org>
^ permalink raw reply
* Re: [PATCH v4 14/16] power: supply: bd71828: Support wider register addresses
From: Andreas Kemnade @ 2025-11-14 11:15 UTC (permalink / raw)
To: Matti Vaittinen
Cc: Matti Vaittinen, Matti Vaittinen, Lee Jones, Pavel Machek,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Sebastian Reichel,
Liam Girdwood, Mark Brown, Michael Turquette, Stephen Boyd,
Linus Walleij, Bartosz Golaszewski, Alexandre Belloni, linux-leds,
devicetree, linux-kernel, linux-pm, linux-clk, linux-gpio,
linux-rtc
In-Reply-To: <6248200397d3582fe926938736da66d6bbf9535d.1763022807.git.mazziesaccount@gmail.com>
On Thu, 13 Nov 2025 10:55:39 +0200
Matti Vaittinen <matti.vaittinen@linux.dev> wrote:
> As a side note, we can reduce the "wasted space / member / instance" from
> 3 bytes to 1 byte, by using u16 instead of the unsigned int if needed. I
> rather use unsigned int to be initially prepared for devices with 32 bit
> registers if there is no need to count bytes.
Well, this is totally internal to the module, so no ABI/API changes, so
there is no advantage of using 32bit now I think. We can switch any time.
But we have 32bit stuff in the regmap cache anyways, so that is not above
the general level of wasting space.
Regards,
Andreas
^ permalink raw reply
* Re: [PATCH v4 04/16] dt-bindings: power: supply: BD72720 managed battery
From: Matti Vaittinen @ 2025-11-14 9:04 UTC (permalink / raw)
To: Rob Herring (Arm), Matti Vaittinen
Cc: Krzysztof Kozlowski, Mark Brown, Linus Walleij, linux-kernel,
Sebastian Reichel, Bartosz Golaszewski, Alexandre Belloni,
linux-clk, Michael Turquette, Matti Vaittinen, linux-leds,
Pavel Machek, Liam Girdwood, linux-gpio, linux-pm,
Andreas Kemnade, Conor Dooley, devicetree, linux-rtc, Lee Jones,
Stephen Boyd
In-Reply-To: <176303119683.3716572.16868393928566655866.robh@kernel.org>
On 13/11/2025 12:53, Rob Herring (Arm) wrote:
>
> On Thu, 13 Nov 2025 10:52:19 +0200, Matti Vaittinen wrote:
>> From: Matti Vaittinen <mazziesaccount@gmail.com>
>>
>> The BD72720 PMIC has a battery charger + coulomb counter block. These
>> can be used to manage charging of a lithium-ion battery and to do fuel
>> gauging.
>>
>> ROHM has developed a so called "zero-correction" -algorithm to improve
>> the fuel-gauging accuracy close to the point where battery is depleted.
>> This relies on battery specific "VDR" tables, which are measured from
>> the battery, and which describe the voltage drop rate. More thorough
>> explanation about the "zero correction" and "VDR" parameters is here:
>> https://lore.kernel.org/all/676253b9-ff69-7891-1f26-a8b5bb5a421b@fi.rohmeurope.com/
>>
>> Document the VDR zero-correction specific battery properties used by the
>> BD72720 and some other ROHM chargers.
>>
>> Signed-off-by: Matti Vaittinen <mazziesaccount@gmail.com>
>> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
>>
>> ---
>> NOTE:
>> Linus' rb-tag holds only if there's no further comments from Rob.
>>
>> Revision history:
>> v3 =>:
>> - No changes
>>
>> v2 => v3:
>> - Constrain VDR threshold voltage to 48V
>> - Use standard '-bp' -suffix for the rohm,volt-drop-soc
>>
>> RFCv1 => v2:
>> - Add units to rohm,volt-drop-soc (tenths of %)
>> - Give real temperatures matching the VDR tables, instead of vague
>> 'high', 'normal', 'low', 'very low'. (Add table of temperatures and
>> use number matching the right temperature index in the VDR table name).
>> - Fix typoed 'algorithm' in commit message.
>>
>> The parameters are describing the battery voltage drop rates - so they
>> are properties of the battery, not the charger. Thus they do not belong
>> in the charger node.
>>
// snip
> My bot found errors running 'make dt_binding_check' on your patch:
>
> yamllint warnings/errors:
>
> dtschema/dtc warnings/errors:
> /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/power/supply/rohm,vdr-battery.example.dtb: battery (simple-battery): 'degrade-cycle-microamp-hours', 'rohm,volt-drop-0-microvolt', 'rohm,volt-drop-1-microvolt', 'rohm,volt-drop-2-microvolt', 'rohm,volt-drop-3-temp-microvolt', 'rohm,volt-drop-soc-bp', 'rohm,volt-drop-temperatures-millicelsius', 'rohm,voltage-vdr-thresh-microvolt' do not match any of the regexes: '^ocv-capacity-table-[0-9]+$', '^pinctrl-[0-9]+$'
> from schema $id: http://devicetree.org/schemas/power/supply/battery.yaml
>
Odd. I am pretty sure I didn't see this when I ran the make
dt_binding_check. Not 100% sure what happened there. I get this error
now though when including all the bindings to the check.
Do I get this right - these errors result from the properties used in
example not being included in the battery.yaml? So, this means that the
check is done based on the binding (battery.yaml) where the compatible
(simple-battery) is defined - not based on the properties which are
present in this file where the example resides, (and which references
the battery.yaml)?
...
Oh... Now that I wrote it I feel like an idiot.
This approach couldn't work for the validation, right? Let's assume I
had a VDR battery, and I added a static-battery -node for it. Running
the validation would pick the battery.yaml based on the compatible (just
as it does here), and be completely unaware of this vdr-battery.yaml. I
have no idea why I thought this would work. Probably because I only
thought this from the documentation POV.
So, as far as I understand, the only viable options are expanding the
existing battery.yaml with these properties (which I hoped to avoid, see
below)
>> The right place for them is the battery node, which is described by the
>> generic "battery.yaml". I was not comfortable with adding these
>> properties to the generic battery.yaml because they are:
>> - Meaningful only for those charger drivers which have the VDR
>> algorithm implemented. (And even though the algorithm is not
charger
>> specific, AFAICS, it is currently only used by some ROHM PMIC
>> drivers).
>> - Technique of measuring the VDR tables for a battery is not widely
>> known. AFAICS, only folks at ROHM are measuring those for some
>> customer products. We do have those tables available for some
of the
>> products though (Kobo?).
or, to add new compatible for the "vdr-battery".
AFAICS, adding new compatible would require us to wither duplicate the
used properties from battery.yaml here (as battery.yaml mandates the
"simple-battery" - compatible) - or to split the battery.yaml in two
files, one containing the generic properties, other containing the
"simple-battery" -compatible and referencing the generic one. Then the
"vdr-battery" could also reference the generic one.
Any suggestions for the next path to follow?
Oh, and sorry for asking to review something which is obviously not
working approach. I should've understood this from the beginning.
Yours,
-- Matti
---
Matti Vaittinen
Linux kernel developer at ROHM Semiconductors
Oulu Finland
~~ When things go utterly wrong vim users can always type :help! ~~
^ permalink raw reply
* Re: [PATCH 06/13] mfd: sec-irq: add support for creating multiple IRQ chips
From: Alexandre Belloni @ 2025-11-14 7:50 UTC (permalink / raw)
To: Kaustabh Chakraborty
Cc: Lee Jones, Pavel Machek, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, MyungJoo Ham, Chanwoo Choi, Sebastian Reichel,
Krzysztof Kozlowski, André Draszik, Jonathan Corbet,
linux-leds, devicetree, linux-kernel, linux-pm, linux-samsung-soc,
linux-rtc, linux-doc
In-Reply-To: <20251114-s2mu005-pmic-v1-6-9e3184d3a0c9@disroot.org>
On 14/11/2025 00:35:07+0530, Kaustabh Chakraborty wrote:
> The current state of the driver only allows creating only one IRQ chip
> per PMIC. On some PMICs, such as Samsung's S2MU005, there are multiple
> interrupt blocks, for which the current implementation stands insufficient.
>
> Add support for creating multiple IRQ chips for a PMIC. Every IRQ chip is
> given it's own index, which is used by sub-device drivers to request IRQs.
>
> A macro is defined which states the maximum number of chips supported.
> It's set to 1 as currently, no PMIC requires more than one IRQ chip. The
> value must be changed accordingly on adding new PMICs requiring multiple
> IRQ chips.
>
> Moreover, adjust the s5m RTC driver to initialize IRQs with the
> appropriate IRQ chip index.
>
> Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
> ---
> drivers/mfd/sec-irq.c | 163 +++++++++++++++++++++++----------------
> drivers/rtc/rtc-s5m.c | 15 +++-
> include/linux/mfd/samsung/core.h | 5 +-
> include/linux/mfd/samsung/irq.h | 14 ++++
> 4 files changed, 127 insertions(+), 70 deletions(-)
>
> diff --git a/drivers/mfd/sec-irq.c b/drivers/mfd/sec-irq.c
> index c5c80b1ba104..053c28f31ec9 100644
> --- a/drivers/mfd/sec-irq.c
> +++ b/drivers/mfd/sec-irq.c
> @@ -181,25 +181,31 @@ static const struct regmap_irq s5m8767_irqs[] = {
> };
>
> /* All S2MPG10 interrupt sources are read-only and don't require clearing */
> -static const struct regmap_irq_chip s2mpg10_irq_chip = {
> - .name = "s2mpg10",
> - .irqs = s2mpg10_irqs,
> - .num_irqs = ARRAY_SIZE(s2mpg10_irqs),
> - .num_regs = 6,
> - .status_base = S2MPG10_PMIC_INT1,
> - .mask_base = S2MPG10_PMIC_INT1M,
> +static const struct regmap_irq_chip s2mpg10_irq_chip[] = {
> + [S2MPG10_IRQ_CHIP] = {
> + .name = "s2mpg10",
> + .irqs = s2mpg10_irqs,
> + .num_irqs = ARRAY_SIZE(s2mpg10_irqs),
> + .num_regs = 6,
> + .status_base = S2MPG10_PMIC_INT1,
> + .mask_base = S2MPG10_PMIC_INT1M,
> + },
> };
>
> -static const struct regmap_irq_chip s2mps11_irq_chip = {
> - .name = "s2mps11",
> - .irqs = s2mps11_irqs,
> - .num_irqs = ARRAY_SIZE(s2mps11_irqs),
> - .num_regs = 3,
> - .status_base = S2MPS11_REG_INT1,
> - .mask_base = S2MPS11_REG_INT1M,
> - .ack_base = S2MPS11_REG_INT1,
> +static const struct regmap_irq_chip s2mps11_irq_chip[] = {
> + [S2MPS11_IRQ_CHIP] = {
> + .name = "s2mps11",
> + .irqs = s2mps11_irqs,
> + .num_irqs = ARRAY_SIZE(s2mps11_irqs),
> + .num_regs = 3,
> + .status_base = S2MPS11_REG_INT1,
> + .mask_base = S2MPS11_REG_INT1M,
> + .ack_base = S2MPS11_REG_INT1,
> + },
> };
>
> +#define S2MPS1X_IRQ_CHIP S2MPS14_IRQ_CHIP
> +
> #define S2MPS1X_IRQ_CHIP_COMMON_DATA \
> .irqs = s2mps14_irqs, \
> .num_irqs = ARRAY_SIZE(s2mps14_irqs), \
> @@ -208,85 +214,106 @@ static const struct regmap_irq_chip s2mps11_irq_chip = {
> .mask_base = S2MPS14_REG_INT1M, \
> .ack_base = S2MPS14_REG_INT1 \
>
> -static const struct regmap_irq_chip s2mps13_irq_chip = {
> - .name = "s2mps13",
> - S2MPS1X_IRQ_CHIP_COMMON_DATA,
> +static const struct regmap_irq_chip s2mps13_irq_chip[] = {
> + [S2MPS1X_IRQ_CHIP] = {
> + .name = "s2mps13",
> + S2MPS1X_IRQ_CHIP_COMMON_DATA,
> + },
> };
>
> -static const struct regmap_irq_chip s2mps14_irq_chip = {
> - .name = "s2mps14",
> - S2MPS1X_IRQ_CHIP_COMMON_DATA,
> +static const struct regmap_irq_chip s2mps14_irq_chip[] = {
> + [S2MPS1X_IRQ_CHIP] = {
> + .name = "s2mps14",
> + S2MPS1X_IRQ_CHIP_COMMON_DATA,
> + },
> };
>
> -static const struct regmap_irq_chip s2mps15_irq_chip = {
> - .name = "s2mps15",
> - S2MPS1X_IRQ_CHIP_COMMON_DATA,
> +static const struct regmap_irq_chip s2mps15_irq_chip[] = {
> + [S2MPS1X_IRQ_CHIP] = {
> + .name = "s2mps15",
> + S2MPS1X_IRQ_CHIP_COMMON_DATA,
> + },
> };
>
> -static const struct regmap_irq_chip s2mpu02_irq_chip = {
> - .name = "s2mpu02",
> - .irqs = s2mpu02_irqs,
> - .num_irqs = ARRAY_SIZE(s2mpu02_irqs),
> - .num_regs = 3,
> - .status_base = S2MPU02_REG_INT1,
> - .mask_base = S2MPU02_REG_INT1M,
> - .ack_base = S2MPU02_REG_INT1,
> +static const struct regmap_irq_chip s2mpu02_irq_chip[] = {
> + [S2MPU02_IRQ_CHIP] = {
> + .name = "s2mpu02",
> + .irqs = s2mpu02_irqs,
> + .num_irqs = ARRAY_SIZE(s2mpu02_irqs),
> + .num_regs = 3,
> + .status_base = S2MPU02_REG_INT1,
> + .mask_base = S2MPU02_REG_INT1M,
> + .ack_base = S2MPU02_REG_INT1,
> + },
> };
>
> -static const struct regmap_irq_chip s2mpu05_irq_chip = {
> - .name = "s2mpu05",
> - .irqs = s2mpu05_irqs,
> - .num_irqs = ARRAY_SIZE(s2mpu05_irqs),
> - .num_regs = 3,
> - .status_base = S2MPU05_REG_INT1,
> - .mask_base = S2MPU05_REG_INT1M,
> - .ack_base = S2MPU05_REG_INT1,
> +static const struct regmap_irq_chip s2mpu05_irq_chip[] = {
> + [S2MPU05_IRQ_CHIP] = {
> + .name = "s2mpu05",
> + .irqs = s2mpu05_irqs,
> + .num_irqs = ARRAY_SIZE(s2mpu05_irqs),
> + .num_regs = 3,
> + .status_base = S2MPU05_REG_INT1,
> + .mask_base = S2MPU05_REG_INT1M,
> + .ack_base = S2MPU05_REG_INT1,
> + },
> };
>
> -static const struct regmap_irq_chip s5m8767_irq_chip = {
> - .name = "s5m8767",
> - .irqs = s5m8767_irqs,
> - .num_irqs = ARRAY_SIZE(s5m8767_irqs),
> - .num_regs = 3,
> - .status_base = S5M8767_REG_INT1,
> - .mask_base = S5M8767_REG_INT1M,
> - .ack_base = S5M8767_REG_INT1,
> +static const struct regmap_irq_chip s5m8767_irq_chip[] = {
> + [S5M8767_IRQ_CHIP] = {
> + .name = "s5m8767",
> + .irqs = s5m8767_irqs,
> + .num_irqs = ARRAY_SIZE(s5m8767_irqs),
> + .num_regs = 3,
> + .status_base = S5M8767_REG_INT1,
> + .mask_base = S5M8767_REG_INT1M,
> + .ack_base = S5M8767_REG_INT1,
> + },
> };
>
> int sec_irq_init(struct sec_pmic_dev *sec_pmic)
> {
> const struct regmap_irq_chip *sec_irq_chip;
> - int ret;
> + int sec_irq_chip_num, i, ret;
>
> switch (sec_pmic->device_type) {
> case S5M8767X:
> - sec_irq_chip = &s5m8767_irq_chip;
> + sec_irq_chip = s5m8767_irq_chip;
> + sec_irq_chip_num = ARRAY_SIZE(s5m8767_irq_chip);
> break;
> case S2DOS05:
> return 0;
> case S2MPA01:
> - sec_irq_chip = &s2mps14_irq_chip;
> + sec_irq_chip = s2mps14_irq_chip;
> + sec_irq_chip_num = ARRAY_SIZE(s2mps14_irq_chip);
> break;
> case S2MPG10:
> - sec_irq_chip = &s2mpg10_irq_chip;
> + sec_irq_chip = s2mpg10_irq_chip;
> + sec_irq_chip_num = ARRAY_SIZE(s2mpg10_irq_chip);
> break;
> case S2MPS11X:
> - sec_irq_chip = &s2mps11_irq_chip;
> + sec_irq_chip = s2mps11_irq_chip;
> + sec_irq_chip_num = ARRAY_SIZE(s2mps11_irq_chip);
> break;
> case S2MPS13X:
> - sec_irq_chip = &s2mps13_irq_chip;
> + sec_irq_chip = s2mps13_irq_chip;
> + sec_irq_chip_num = ARRAY_SIZE(s2mps13_irq_chip);
> break;
> case S2MPS14X:
> - sec_irq_chip = &s2mps14_irq_chip;
> + sec_irq_chip = s2mps14_irq_chip;
> + sec_irq_chip_num = ARRAY_SIZE(s2mps14_irq_chip);
> break;
> case S2MPS15X:
> - sec_irq_chip = &s2mps15_irq_chip;
> + sec_irq_chip = s2mps15_irq_chip;
> + sec_irq_chip_num = ARRAY_SIZE(s2mps15_irq_chip);
> break;
> case S2MPU02:
> - sec_irq_chip = &s2mpu02_irq_chip;
> + sec_irq_chip = s2mpu02_irq_chip;
> + sec_irq_chip_num = ARRAY_SIZE(s2mpu02_irq_chip);
> break;
> case S2MPU05:
> - sec_irq_chip = &s2mpu05_irq_chip;
> + sec_irq_chip = s2mpu05_irq_chip;
> + sec_irq_chip_num = ARRAY_SIZE(s2mpu05_irq_chip);
> break;
> default:
> return dev_err_probe(sec_pmic->dev, -EINVAL,
> @@ -300,13 +327,19 @@ int sec_irq_init(struct sec_pmic_dev *sec_pmic)
> return 0;
> }
>
> - ret = devm_regmap_add_irq_chip(sec_pmic->dev, sec_pmic->regmap_pmic,
> - sec_pmic->irq, IRQF_ONESHOT,
> - 0, sec_irq_chip, &sec_pmic->irq_data);
> - if (ret)
> - return dev_err_probe(sec_pmic->dev, ret,
> - "Failed to add %s IRQ chip\n",
> - sec_irq_chip->name);
> + for (i = 0; i < sec_irq_chip_num; i++) {
> + ret = devm_regmap_add_irq_chip(sec_pmic->dev,
> + sec_pmic->regmap_pmic,
> + sec_pmic->irq,
> + IRQF_ONESHOT | IRQF_SHARED, 0,
> + sec_irq_chip + i,
> + sec_pmic->irq_data + i);
> + if (ret) {
> + return dev_err_probe(sec_pmic->dev, ret,
> + "Failed to add %s IRQ chip\n",
> + sec_irq_chip->name);
> + }
> + }
>
> /*
> * The rtc-s5m driver requests S2MPS14_IRQ_RTCA0 also for S2MPS11
> diff --git a/drivers/rtc/rtc-s5m.c b/drivers/rtc/rtc-s5m.c
> index a7220b4d0e8d..726915deff7a 100644
> --- a/drivers/rtc/rtc-s5m.c
> +++ b/drivers/rtc/rtc-s5m.c
> @@ -668,7 +668,7 @@ static int s5m_rtc_probe(struct platform_device *pdev)
> enum sec_device_type device_type =
> platform_get_device_id(pdev)->driver_data;
> struct s5m_rtc_info *info;
> - int ret, alarm_irq;
> + int ret, alarm_irq, irq_chip;
>
> info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
> if (!info)
> @@ -684,21 +684,25 @@ static int s5m_rtc_probe(struct platform_device *pdev)
> regmap_cfg = &s2mps14_rtc_regmap_config;
> info->regs = &s2mps15_rtc_regs;
> alarm_irq = S2MPS14_IRQ_RTCA0;
> + irq_chip = S2MPS11_IRQ_CHIP;
> break;
> case S2MPS14X:
> regmap_cfg = &s2mps14_rtc_regmap_config;
> info->regs = &s2mps14_rtc_regs;
> alarm_irq = S2MPS14_IRQ_RTCA0;
> + irq_chip = S2MPS14_IRQ_CHIP;
> break;
> case S2MPS13X:
> regmap_cfg = &s2mps14_rtc_regmap_config;
> info->regs = &s2mps13_rtc_regs;
> alarm_irq = S2MPS14_IRQ_RTCA0;
> + irq_chip = S2MPS14_IRQ_CHIP;
> break;
> case S5M8767X:
> regmap_cfg = &s5m_rtc_regmap_config;
> info->regs = &s5m_rtc_regs;
> alarm_irq = S5M8767_IRQ_RTCA1;
> + irq_chip = S5M8767_IRQ_CHIP;
> break;
> default:
> return dev_err_probe(&pdev->dev, -ENODEV,
> @@ -720,6 +724,7 @@ static int s5m_rtc_probe(struct platform_device *pdev)
> } else if (device_type == S2MPG10) {
> info->regs = &s2mpg10_rtc_regs;
> alarm_irq = S2MPG10_IRQ_RTCA0;
> + irq_chip = S2MPG10_IRQ_CHIP;
> } else {
> return dev_err_probe(&pdev->dev, -ENODEV,
> "Unsupported device type %d\n",
> @@ -730,12 +735,14 @@ static int s5m_rtc_probe(struct platform_device *pdev)
> info->s5m87xx = s5m87xx;
> info->device_type = device_type;
>
> - if (s5m87xx->irq_data) {
> - info->irq = regmap_irq_get_virq(s5m87xx->irq_data, alarm_irq);
> - if (info->irq <= 0)
> + if (s5m87xx->irq_data[irq_chip]) {
> + info->irq = regmap_irq_get_virq(s5m87xx->irq_data[irq_chip],
> + alarm_irq);
> + if (info->irq <= 0) {
> return dev_err_probe(&pdev->dev, -EINVAL,
> "Failed to get virtual IRQ %d\n",
> alarm_irq);
> + }
> }
>
> platform_set_drvdata(pdev, info);
> diff --git a/include/linux/mfd/samsung/core.h b/include/linux/mfd/samsung/core.h
> index d785e101fe79..dcd741c4f0d6 100644
> --- a/include/linux/mfd/samsung/core.h
> +++ b/include/linux/mfd/samsung/core.h
> @@ -33,6 +33,9 @@
> #define STEP_12_5_MV 12500
> #define STEP_6_25_MV 6250
>
> +/* Maximum number of IRQ chips in a PMIC */
> +#define MAX_IRQ_CHIPS 1
> +
> struct gpio_desc;
>
> enum sec_device_type {
> @@ -69,7 +72,7 @@ struct sec_pmic_dev {
>
> int device_type;
> int irq;
> - struct regmap_irq_chip_data *irq_data;
> + struct regmap_irq_chip_data *irq_data[MAX_IRQ_CHIPS];
> };
>
> struct sec_platform_data {
> diff --git a/include/linux/mfd/samsung/irq.h b/include/linux/mfd/samsung/irq.h
> index b4805cbd949b..78eb894e350e 100644
> --- a/include/linux/mfd/samsung/irq.h
> +++ b/include/linux/mfd/samsung/irq.h
> @@ -34,6 +34,8 @@ enum s2mpa01_irq {
> S2MPA01_IRQ_NR,
> };
>
> +#define S2MPA01_IRQ_CHIP 0
> +
> #define S2MPA01_IRQ_PWRONF_MASK (1 << 0)
> #define S2MPA01_IRQ_PWRONR_MASK (1 << 1)
> #define S2MPA01_IRQ_JIGONBF_MASK (1 << 2)
> @@ -58,6 +60,8 @@ enum s2mpa01_irq {
> #define S2MPA01_IRQ_B35_TSD_MASK (1 << 5)
>
> enum s2mpg10_irq {
> +#define S2MPG10_IRQ_CHIP 0
> +
> /* PMIC */
> S2MPG10_IRQ_PWRONF,
> S2MPG10_IRQ_PWRONR,
> @@ -183,6 +187,8 @@ enum s2mps11_irq {
> S2MPS11_IRQ_NR,
> };
>
> +#define S2MPS11_IRQ_CHIP 0
> +
> #define S2MPS11_IRQ_PWRONF_MASK (1 << 0)
> #define S2MPS11_IRQ_PWRONR_MASK (1 << 1)
> #define S2MPS11_IRQ_JIGONBF_MASK (1 << 2)
> @@ -226,6 +232,8 @@ enum s2mps14_irq {
> S2MPS14_IRQ_NR,
> };
>
> +#define S2MPS14_IRQ_CHIP 0
> +
> enum s2mpu02_irq {
> S2MPU02_IRQ_PWRONF,
> S2MPU02_IRQ_PWRONR,
> @@ -250,6 +258,8 @@ enum s2mpu02_irq {
> S2MPU02_IRQ_NR,
> };
>
> +#define S2MPU02_IRQ_CHIP 0
> +
> /* Masks for interrupts are the same as in s2mps11 */
> #define S2MPS14_IRQ_TSD_MASK (1 << 2)
>
> @@ -277,6 +287,8 @@ enum s2mpu05_irq {
> S2MPU05_IRQ_NR,
> };
>
> +#define S2MPU05_IRQ_CHIP 0
> +
> #define S2MPU05_IRQ_PWRONF_MASK BIT(0)
> #define S2MPU05_IRQ_PWRONR_MASK BIT(1)
> #define S2MPU05_IRQ_JIGONBF_MASK BIT(2)
> @@ -321,6 +333,8 @@ enum s5m8767_irq {
> S5M8767_IRQ_NR,
> };
>
> +#define S5M8767_IRQ_CHIP 0
> +
> #define S5M8767_IRQ_PWRR_MASK (1 << 0)
> #define S5M8767_IRQ_PWRF_MASK (1 << 1)
> #define S5M8767_IRQ_PWR1S_MASK (1 << 3)
>
> --
> 2.51.2
>
--
Alexandre Belloni, co-owner and COO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply
* Re: [PATCH v4 12/16] clk: clk-bd718x7: Support BD72720 clk gate
From: Stephen Boyd @ 2025-11-14 3:53 UTC (permalink / raw)
To: Matti Vaittinen, Matti Vaittinen, Matti Vaittinen
Cc: Lee Jones, Pavel Machek, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Sebastian Reichel, Liam Girdwood, Mark Brown,
Michael Turquette, Matti Vaittinen, Linus Walleij,
Bartosz Golaszewski, Alexandre Belloni, linux-leds, devicetree,
linux-kernel, linux-pm, linux-clk, linux-gpio, linux-rtc,
Andreas Kemnade
In-Reply-To: <16c92cc14da67ec6354ee0ac4e1faef4af4d0994.1763022807.git.mazziesaccount@gmail.com>
Quoting Matti Vaittinen (2025-11-13 00:55:05)
> From: Matti Vaittinen <mazziesaccount@gmail.com>
>
> The BD72720 has similar simple clk gate as a few other ROHM PMICs.
>
> Add support for BD72720 clk gate.
>
> Signed-off-by: Matti Vaittinen <mazziesaccount@gmail.com>
>
> ---
Acked-by: Stephen Boyd <sboyd@kernel.org>
^ permalink raw reply
* Re: [PATCH 11/13] Documentation: leds: document pattern behavior of Samsung S2M series PMIC RGB LEDs
From: Randy Dunlap @ 2025-11-13 19:57 UTC (permalink / raw)
To: Kaustabh Chakraborty, Lee Jones, Pavel Machek, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, MyungJoo Ham, Chanwoo Choi,
Sebastian Reichel, Krzysztof Kozlowski, André Draszik,
Alexandre Belloni, Jonathan Corbet
Cc: linux-leds, devicetree, linux-kernel, linux-pm, linux-samsung-soc,
linux-rtc, linux-doc
In-Reply-To: <20251114-s2mu005-pmic-v1-11-9e3184d3a0c9@disroot.org>
On 11/13/25 11:05 AM, Kaustabh Chakraborty wrote:
> Add documentation to describe how hardware patterns (as defined by the
> documentation of led-class-multicolor) are parsed and implemented by the
> Samsung S2M series PMIC RGB LED driver.
>
> Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
> ---
> Documentation/leds/index.rst | 1 +
> Documentation/leds/leds-s2m-rgb.rst | 60 +++++++++++++++++++++++++++++++++++++
> 2 files changed, 61 insertions(+)
>
> diff --git a/Documentation/leds/leds-s2m-rgb.rst b/Documentation/leds/leds-s2m-rgb.rst
> new file mode 100644
> index 000000000000..cf91f0238093
> --- /dev/null
> +++ b/Documentation/leds/leds-s2m-rgb.rst
> @@ -0,0 +1,60 @@
> +.. SPDX-License-Identifier: GPL-2.0
> +
> +======================================
> +Samsung S2M Series PMIC RGB LED Driver
> +======================================
> +
> +Description
> +-----------
> +
> +The RGB LED on the S2M series PMIC hardware features a three-channel LED that is
> +grouped together as a single device. Furthermore, the it supports 8-bit
drop the ^^^
> +brightness control for each channel. This LED is typically used as a status
> +indicator in mobile devices. It also supports various parameters for hardware
> +patterns.
--
~Randy
^ permalink raw reply
* Re: [PATCH 04/13] dt-bindings: power: supply: document Samsung S2M series PMIC charger device
From: Conor Dooley @ 2025-11-13 19:57 UTC (permalink / raw)
To: Kaustabh Chakraborty
Cc: Lee Jones, Pavel Machek, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, MyungJoo Ham, Chanwoo Choi, Sebastian Reichel,
Krzysztof Kozlowski, André Draszik, Alexandre Belloni,
Jonathan Corbet, linux-leds, devicetree, linux-kernel, linux-pm,
linux-samsung-soc, linux-rtc, linux-doc
In-Reply-To: <20251114-s2mu005-pmic-v1-4-9e3184d3a0c9@disroot.org>
[-- Attachment #1: Type: text/plain, Size: 2540 bytes --]
On Fri, Nov 14, 2025 at 12:35:05AM +0530, Kaustabh Chakraborty wrote:
> Certain Samsung S2M series PMICs have a battery charger device which,
> among other things, manages power interfacing of the USB port. It may
> supply power, as done in USB OTG operation mode, or it may accept power
> and redirect it to the battery fuelgauge for charging.
>
> This driver depends on the MUIC device present in the same PMIC block.
>
> The initial driver introduced has support for S2MU005, add its
> compatible as well.
Similar comments in all these binding commit messages, they should only
really contain mentions of "drivers" if you are talking about electrical
circuitry.
>
> Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
> ---
> .../power/supply/samsung,s2mu005-charger.yaml | 35 ++++++++++++++++++++++
> 1 file changed, 35 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/power/supply/samsung,s2mu005-charger.yaml b/Documentation/devicetree/bindings/power/supply/samsung,s2mu005-charger.yaml
> new file mode 100644
> index 000000000000..80292d6e2562
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/power/supply/samsung,s2mu005-charger.yaml
> @@ -0,0 +1,35 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/power/supply/samsung,s2mu005-charger.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Battery Charger Driver for Samsung S2M series PMICs
> +
> +maintainers:
> + - Kaustabh Chakraborty <kauschluss@disroot.org>
> +
> +description: |
> + The Samsung S2M series PMIC battery charger manages power interfacing
> + of the USB port. It may supply power, as done in USB OTG operation
> + mode, or it may accept power and redirect it to the battery fuelgauge
> + for charging.
> +
> + This is a part of device tree bindings for S2M and S5M family of Power
> + Management IC (PMIC).
> +
> + See also Documentation/devicetree/bindings/mfd/samsung,s2mps11.yaml for
> + additional information and example.
> +
> +allOf:
> + - $ref: power-supply.yaml#
> +
> +properties:
> + compatible:
> + enum:
> + - samsung,s2mu005-charger
Why do you need a dedicated child node for this? It's got one property,
other than the compatible, that you're using. It could easily just go
in the parent without a dedicated node etc.
> +
> +required:
> + - compatible
> +
> +unevaluatedProperties: false
>
> --
> 2.51.2
>
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^ permalink raw reply
* Re: [PATCH 03/13] dt-bindings: extcon: document Samsung S2M series PMIC extcon device
From: Conor Dooley @ 2025-11-13 19:54 UTC (permalink / raw)
To: Kaustabh Chakraborty
Cc: Lee Jones, Pavel Machek, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, MyungJoo Ham, Chanwoo Choi, Sebastian Reichel,
Krzysztof Kozlowski, André Draszik, Alexandre Belloni,
Jonathan Corbet, linux-leds, devicetree, linux-kernel, linux-pm,
linux-samsung-soc, linux-rtc, linux-doc
In-Reply-To: <20251114-s2mu005-pmic-v1-3-9e3184d3a0c9@disroot.org>
[-- Attachment #1: Type: text/plain, Size: 2024 bytes --]
On Fri, Nov 14, 2025 at 12:35:04AM +0530, Kaustabh Chakraborty wrote:
> Certain Samsung S2M series PMICs have a MUIC device which reports
> various cable states by measuring the ID-GND resistance with an internal
> ADC. Document the devicetree schema for this device.
>
> The initial driver introduced has support for S2MU005, add its
> compatible as well.
>
> Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
> ---
> .../bindings/extcon/samsung,s2mu005-muic.yaml | 35 ++++++++++++++++++++++
> 1 file changed, 35 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/extcon/samsung,s2mu005-muic.yaml b/Documentation/devicetree/bindings/extcon/samsung,s2mu005-muic.yaml
> new file mode 100644
> index 000000000000..8511bb96b47a
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/extcon/samsung,s2mu005-muic.yaml
> @@ -0,0 +1,35 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/extcon/samsung,s2mu005-muic.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Extcon Driver for Samsung S2M series PMICs
> +
> +maintainers:
> + - Kaustabh Chakraborty <kauschluss@disroot.org>
> +
> +description: |
> + The Samsung S2M series PMIC extcon device is a USB port accessory
> + detector. It reports multiple states depending on the ID-GND
> + resistance measured by an internal ADC.
> +
> + This is a part of device tree bindings for S2M and S5M family of Power
> + Management IC (PMIC).
> +
> + See also Documentation/devicetree/bindings/mfd/samsung,s2mps11.yaml for
> + additional information and example.
> +
> +properties:
> + compatible:
> + enum:
> + - samsung,s2mu005-muic
Why does this need a dedicated child node for just a port property?
> +
> + port:
> + $ref: /schemas/graph.yaml#/properties/port
> +
> +required:
> + - compatible
> + - port
> +
> +additionalProperties: false
>
> --
> 2.51.2
>
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^ permalink raw reply
* Re: [PATCH 02/13] dt-bindings: leds: document Samsung S2M series PMIC RGB LED device
From: Conor Dooley @ 2025-11-13 19:53 UTC (permalink / raw)
To: Kaustabh Chakraborty
Cc: Lee Jones, Pavel Machek, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, MyungJoo Ham, Chanwoo Choi, Sebastian Reichel,
Krzysztof Kozlowski, André Draszik, Alexandre Belloni,
Jonathan Corbet, linux-leds, devicetree, linux-kernel, linux-pm,
linux-samsung-soc, linux-rtc, linux-doc
In-Reply-To: <20251114-s2mu005-pmic-v1-2-9e3184d3a0c9@disroot.org>
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On Fri, Nov 14, 2025 at 12:35:03AM +0530, Kaustabh Chakraborty wrote:
> Certain Samsung S2M series PMICs have a three-channel LED device with
> independent brightness control for each channel, typically used as
> status indicators in mobile phones. Document the devicetree schema from
> this driver.
>
> The initial driver introduced has support for S2MU005, add its
> compatible as well.
Same here.
Additionally "Document the ... from this driver" should lose the driver
part, unless you mean it as "led driver" rather than "linux driver".
pw-bot: changes-requested
>
> Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
> ---
> .../bindings/leds/samsung,s2mu005-rgb.yaml | 34 ++++++++++++++++++++++
> 1 file changed, 34 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/leds/samsung,s2mu005-rgb.yaml b/Documentation/devicetree/bindings/leds/samsung,s2mu005-rgb.yaml
> new file mode 100644
> index 000000000000..bad7080ff8f5
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/leds/samsung,s2mu005-rgb.yaml
> @@ -0,0 +1,34 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/leds/samsung,s2mu005-rgb.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: RGB LED Driver for Samsung S2M series PMICs
> +
> +maintainers:
> + - Kaustabh Chakraborty <kauschluss@disroot.org>
> +
> +description: |
> + The Samsung S2M series PMIC RGB LED is a three-channel LED device with
> + 8-bit brightness control for each channel, typically used as status
> + indicators in mobile phones.
> +
> + This is a part of device tree bindings for S2M and S5M family of Power
> + Management IC (PMIC).
> +
> + See also Documentation/devicetree/bindings/mfd/samsung,s2mps11.yaml for
> + additional information and example.
> +
> +allOf:
> + - $ref: common.yaml#
> +
> +properties:
> + compatible:
> + enum:
> + - samsung,s2mu005-rgb
> +
> +required:
> + - compatible
> +
> +unevaluatedProperties: false
>
> --
> 2.51.2
>
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^ permalink raw reply
* Re: [PATCH 01/13] dt-bindings: leds: document Samsung S2M series PMIC flash LED device
From: Conor Dooley @ 2025-11-13 19:52 UTC (permalink / raw)
To: Kaustabh Chakraborty
Cc: Lee Jones, Pavel Machek, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, MyungJoo Ham, Chanwoo Choi, Sebastian Reichel,
Krzysztof Kozlowski, André Draszik, Alexandre Belloni,
Jonathan Corbet, linux-leds, devicetree, linux-kernel, linux-pm,
linux-samsung-soc, linux-rtc, linux-doc
In-Reply-To: <20251114-s2mu005-pmic-v1-1-9e3184d3a0c9@disroot.org>
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On Fri, Nov 14, 2025 at 12:35:02AM +0530, Kaustabh Chakraborty wrote:
> Certain Samsung S2M series PMICs have a flash LED controller with
> two LED channels, and with torch and flash control modes. Document the
> devicetree schema for the device.
>
> The initial driver introduced has support for S2MU005, add its
> compatible as well.
Drop this sentence please.
pw-bot: changes-requested
With it gone
Acked-by: Conor Dooley <conor.dooley@microchip.com>
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^ permalink raw reply
* Re: [PATCH v6 1/2] dt-bindings: rtc: Add pcf85053 support
From: Conor Dooley @ 2025-11-13 19:42 UTC (permalink / raw)
To: Lakshay Piplani
Cc: alexandre.belloni, linux-rtc, linux-kernel, robh, krzk+dt,
conor+dt, devicetree, pankit.garg, vikash.bansal, priyanka.jain,
shashank.rebbapragada
In-Reply-To: <20251113054243.4045820-1-lakshay.piplani@nxp.com>
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On Thu, Nov 13, 2025 at 11:12:42AM +0530, Lakshay Piplani wrote:
> Add device tree bindings for NXP PCF85053 RTC chip.
>
> Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
> Signed-off-by: Lakshay Piplani <lakshay.piplani@nxp.com>
> ---
> V5 -> V6: - Dropped driver-specific commentary from property descriptions.
> - Simplified and clarified descriptions for better readability.
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
pw-bot: not-applicable
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^ permalink raw reply
* [PATCH 13/13] power: supply: add support for Samsung S2M series PMIC charger device
From: Kaustabh Chakraborty @ 2025-11-13 19:05 UTC (permalink / raw)
To: Lee Jones, Pavel Machek, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, MyungJoo Ham, Chanwoo Choi, Sebastian Reichel,
Krzysztof Kozlowski, André Draszik, Alexandre Belloni,
Jonathan Corbet
Cc: linux-leds, devicetree, linux-kernel, linux-pm, linux-samsung-soc,
linux-rtc, linux-doc, Kaustabh Chakraborty
In-Reply-To: <20251114-s2mu005-pmic-v1-0-9e3184d3a0c9@disroot.org>
Add a driver for charger controllers found in certain Samsung S2M series
PMICs. The driver has very basic support for the device, with only
charger online reporting working.
The driver includes initial support for the S2MU005 PMIC charger.
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
---
drivers/extcon/extcon-s2m.c | 2 +-
drivers/power/supply/Kconfig | 11 ++
drivers/power/supply/Makefile | 1 +
drivers/power/supply/s2m-charger.c | 216 +++++++++++++++++++++++++++++++++++++
4 files changed, 229 insertions(+), 1 deletion(-)
diff --git a/drivers/extcon/extcon-s2m.c b/drivers/extcon/extcon-s2m.c
index b27ee9e79bb6..268ad1f65ffd 100644
--- a/drivers/extcon/extcon-s2m.c
+++ b/drivers/extcon/extcon-s2m.c
@@ -289,7 +289,7 @@ static int s2m_muic_probe(struct platform_device *pdev)
s2m_muic_irq_func, IRQF_ONESHOT,
priv->irq_data[i].name, priv);
if (ret)
- dev_err_probe(dev, ret, "failed to request IRQ\n");
+ return dev_err_probe(dev, ret, "failed to request IRQ\n");
}
return 0;
diff --git a/drivers/power/supply/Kconfig b/drivers/power/supply/Kconfig
index 03c8525b480f..f8742d35a288 100644
--- a/drivers/power/supply/Kconfig
+++ b/drivers/power/supply/Kconfig
@@ -229,6 +229,17 @@ config BATTERY_SAMSUNG_SDI
Say Y to enable support for Samsung SDI battery data.
These batteries are used in Samsung mobile phones.
+config CHARGER_S2M
+ tristate "Samsung S2M series PMIC battery charger support"
+ depends on EXTCON_S2M
+ depends on MFD_SEC_CORE
+ select REGMAP_IRQ
+ help
+ This option enables support for charger devices found in
+ certain Samsung S2M series PMICs, such as the S2MU005. These
+ devices provide USB power supply information and also required
+ for USB OTG role switching.
+
config BATTERY_COLLIE
tristate "Sharp SL-5500 (collie) battery"
depends on SA1100_COLLIE && MCP_UCB1200
diff --git a/drivers/power/supply/Makefile b/drivers/power/supply/Makefile
index 6e37a3edf7e3..dcfae32d1216 100644
--- a/drivers/power/supply/Makefile
+++ b/drivers/power/supply/Makefile
@@ -40,6 +40,7 @@ obj-$(CONFIG_BATTERY_PMU) += pmu_battery.o
obj-$(CONFIG_BATTERY_QCOM_BATTMGR) += qcom_battmgr.o
obj-$(CONFIG_BATTERY_OLPC) += olpc_battery.o
obj-$(CONFIG_BATTERY_SAMSUNG_SDI) += samsung-sdi-battery.o
+obj-$(CONFIG_CHARGER_S2M) += s2m-charger.o
obj-$(CONFIG_BATTERY_COLLIE) += collie_battery.o
obj-$(CONFIG_BATTERY_INGENIC) += ingenic-battery.o
obj-$(CONFIG_BATTERY_INTEL_DC_TI) += intel_dc_ti_battery.o
diff --git a/drivers/power/supply/s2m-charger.c b/drivers/power/supply/s2m-charger.c
new file mode 100644
index 000000000000..0a3216a2b545
--- /dev/null
+++ b/drivers/power/supply/s2m-charger.c
@@ -0,0 +1,216 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Battery Charger Driver for Samsung S2M series PMICs.
+ *
+ * Copyright (c) 2015 Samsung Electronics Co., Ltd
+ * Copyright (c) 2025 Kaustabh Chakraborty <kauschluss@disroot.org>
+ */
+
+#include <linux/devm-helpers.h>
+#include <linux/delay.h>
+#include <linux/extcon.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/mfd/samsung/core.h>
+#include <linux/mfd/samsung/irq.h>
+#include <linux/mfd/samsung/s2mu005.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/power_supply.h>
+#include <linux/regmap.h>
+
+struct s2m_chgr {
+ struct device *dev;
+ struct regmap *regmap;
+ struct power_supply *psy;
+ struct extcon_dev *extcon;
+ struct work_struct extcon_work;
+ struct notifier_block extcon_nb;
+};
+
+static int s2mu005_chgr_get_online(struct s2m_chgr *priv, int *value)
+{
+ u32 val;
+ int ret = 0;
+
+ ret = regmap_read(priv->regmap, S2MU005_REG_CHGR_STATUS0, &val);
+ if (ret < 0) {
+ dev_err(priv->dev, "failed to read register (%d)\n", ret);
+ return ret;
+ }
+
+ *value = !!(val & S2MU005_CHGR_CHG);
+
+ return ret;
+}
+
+static int s2mu005_chgr_get_property(struct power_supply *psy,
+ enum power_supply_property psp,
+ union power_supply_propval *val)
+{
+ struct s2m_chgr *priv = power_supply_get_drvdata(psy);
+ int ret = 0;
+
+ switch (psp) {
+ case POWER_SUPPLY_PROP_ONLINE:
+ ret = s2mu005_chgr_get_online(priv, &val->intval);
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ return ret;
+}
+
+static void s2mu005_chgr_extcon_work(struct work_struct *work)
+{
+ struct s2m_chgr *priv = container_of(work, struct s2m_chgr,
+ extcon_work);
+ int ret;
+
+ if (extcon_get_state(priv->extcon, EXTCON_USB_HOST) == true) {
+ ret = regmap_update_bits(priv->regmap, S2MU005_REG_CHGR_CTRL0,
+ S2MU005_CHGR_OP_MODE,
+ S2MU005_CHGR_OP_MODE_OTG);
+ if (ret < 0)
+ dev_err(priv->dev, "failed to set operation mode to OTG (%d)\n",
+ ret);
+
+ goto psy_update;
+ }
+
+ if (extcon_get_state(priv->extcon, EXTCON_USB) == true) {
+ ret = regmap_update_bits(priv->regmap, S2MU005_REG_CHGR_CTRL0,
+ S2MU005_CHGR_OP_MODE,
+ S2MU005_CHGR_OP_MODE_CHG);
+ if (ret < 0)
+ dev_err(priv->dev, "failed to set operation mode to charging (%d)\n",
+ ret);
+
+ goto psy_update;
+ }
+
+ ret = regmap_clear_bits(priv->regmap, S2MU005_REG_CHGR_CTRL0,
+ S2MU005_CHGR_OP_MODE);
+ if (ret < 0)
+ dev_err(priv->dev, "failed to clear operation mode (%d)\n", ret);
+
+psy_update:
+ power_supply_changed(priv->psy);
+}
+
+static const enum power_supply_property s2mu005_chgr_properties[] = {
+ POWER_SUPPLY_PROP_ONLINE,
+};
+
+static const struct power_supply_desc s2mu005_chgr_psy_desc = {
+ .name = "s2mu005-charger",
+ .type = POWER_SUPPLY_TYPE_USB,
+ .properties = s2mu005_chgr_properties,
+ .num_properties = ARRAY_SIZE(s2mu005_chgr_properties),
+ .get_property = s2mu005_chgr_get_property,
+};
+
+static int s2m_chgr_extcon_notifier(struct notifier_block *nb,
+ unsigned long event, void *param)
+{
+ struct s2m_chgr *priv = container_of(nb, struct s2m_chgr, extcon_nb);
+
+ schedule_work(&priv->extcon_work);
+
+ return NOTIFY_OK;
+}
+
+static int s2m_chgr_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct sec_pmic_dev *pmic_drvdata = dev_get_drvdata(dev->parent);
+ struct s2m_chgr *priv;
+ struct device_node *extcon_node;
+ struct power_supply_config psy_cfg = {};
+ const struct power_supply_desc *psy_desc;
+ work_func_t extcon_work_func;
+ int ret;
+
+ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return dev_err_probe(dev, -ENOMEM, "failed to allocate driver private\n");
+
+ platform_set_drvdata(pdev, priv);
+ priv->dev = dev;
+ priv->regmap = pmic_drvdata->regmap_pmic;
+
+ switch (platform_get_device_id(pdev)->driver_data) {
+ case S2MU005:
+ psy_desc = &s2mu005_chgr_psy_desc;
+ extcon_work_func = s2mu005_chgr_extcon_work;
+ break;
+ default:
+ return dev_err_probe(dev, -ENODEV,
+ "device type %d is not supported by driver\n",
+ pmic_drvdata->device_type);
+ }
+
+ psy_cfg.drv_data = priv;
+ priv->psy = devm_power_supply_register(dev, psy_desc, &psy_cfg);
+ if (IS_ERR(priv->psy))
+ return dev_err_probe(dev, PTR_ERR(priv->psy),
+ "failed to register power supply subsystem\n");
+
+ /* MUIC is mandatory. If unavailable, request probe deferral */
+ extcon_node = of_get_child_by_name(dev->parent->of_node, "extcon");
+ priv->extcon = extcon_find_edev_by_node(extcon_node);
+ if (IS_ERR(priv->extcon))
+ return -EPROBE_DEFER;
+
+ ret = devm_work_autocancel(dev, &priv->extcon_work, extcon_work_func);
+ if (ret)
+ return dev_err_probe(dev, ret, "failed to initialize extcon work\n");
+
+ priv->extcon_nb.notifier_call = s2m_chgr_extcon_notifier;
+ ret = devm_extcon_register_notifier_all(dev, priv->extcon, &priv->extcon_nb);
+ if (ret)
+ dev_err_probe(dev, ret, "failed to register extcon notifier\n");
+
+ return 0;
+}
+
+static const struct platform_device_id s2m_chgr_id_table[] = {
+ { "s2mu005-charger", S2MU005 },
+ { /* sentinel */ },
+};
+MODULE_DEVICE_TABLE(platform, s2m_chgr_id_table);
+
+#ifdef CONFIG_OF
+/*
+ * Device is instantiated through parent MFD device and device matching
+ * is done through platform_device_id.
+ *
+ * However if device's DT node contains proper compatible and driver is
+ * built as a module, then the *module* matching will be done through DT
+ * aliases. This requires of_device_id table. In the same time this will
+ * not change the actual *device* matching so do not add .of_match_table.
+ */
+static const struct of_device_id s2m_chgr_of_match_table[] = {
+ {
+ .compatible = "samsung,s2mu005-charger",
+ .data = (void *)S2MU005,
+ }, {
+ /* sentinel */
+ },
+};
+MODULE_DEVICE_TABLE(of, s2m_chgr_of_match_table);
+#endif
+
+static struct platform_driver s2m_chgr_driver = {
+ .driver = {
+ .name = "s2m-charger",
+ },
+ .probe = s2m_chgr_probe,
+ .id_table = s2m_chgr_id_table,
+};
+module_platform_driver(s2m_chgr_driver);
+
+MODULE_DESCRIPTION("Battery Charger Driver For Samsung S2M Series PMICs");
+MODULE_AUTHOR("Kaustabh Chakraborty <kauschluss@disroot.org>");
+MODULE_LICENSE("GPL");
--
2.51.2
^ permalink raw reply related
* [PATCH 12/13] extcon: add support for Samsung S2M series PMIC extcon devices
From: Kaustabh Chakraborty @ 2025-11-13 19:05 UTC (permalink / raw)
To: Lee Jones, Pavel Machek, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, MyungJoo Ham, Chanwoo Choi, Sebastian Reichel,
Krzysztof Kozlowski, André Draszik, Alexandre Belloni,
Jonathan Corbet
Cc: linux-leds, devicetree, linux-kernel, linux-pm, linux-samsung-soc,
linux-rtc, linux-doc, Kaustabh Chakraborty
In-Reply-To: <20251114-s2mu005-pmic-v1-0-9e3184d3a0c9@disroot.org>
Add a driver for MUIC devices found in certain Samsung S2M series PMICs
These are USB port accessory detectors. These devices report multiple
cable states depending on the ID-GND resistance measured by an internal
ADC.
The driver includes initial support for the S2MU005 PMIC extcon.
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
---
drivers/extcon/Kconfig | 10 ++
drivers/extcon/Makefile | 1 +
drivers/extcon/extcon-s2m.c | 355 ++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 366 insertions(+)
diff --git a/drivers/extcon/Kconfig b/drivers/extcon/Kconfig
index aec46bf03302..89b3427175f7 100644
--- a/drivers/extcon/Kconfig
+++ b/drivers/extcon/Kconfig
@@ -182,6 +182,16 @@ config EXTCON_RT8973A
and switch that is optimized to protect low voltage system
from abnormal high input voltage (up to 28V).
+config EXTCON_S2M
+ tristate "Samsung S2M series PMIC EXTCON support"
+ depends on MFD_SEC_CORE
+ select REGMAP_IRQ
+ help
+ This option enables support for MUIC devices found in certain
+ Samsung S2M series PMICs, such as the S2MU005. These devices
+ have internal ADCs measuring the ID-GND resistance, thereby
+ can be used as a USB port accessory detector.
+
config EXTCON_SM5502
tristate "Silicon Mitus SM5502/SM5504/SM5703 EXTCON support"
depends on I2C
diff --git a/drivers/extcon/Makefile b/drivers/extcon/Makefile
index 6482f2bfd661..e3939786f347 100644
--- a/drivers/extcon/Makefile
+++ b/drivers/extcon/Makefile
@@ -23,6 +23,7 @@ obj-$(CONFIG_EXTCON_PALMAS) += extcon-palmas.o
obj-$(CONFIG_EXTCON_PTN5150) += extcon-ptn5150.o
obj-$(CONFIG_EXTCON_QCOM_SPMI_MISC) += extcon-qcom-spmi-misc.o
obj-$(CONFIG_EXTCON_RT8973A) += extcon-rt8973a.o
+obj-$(CONFIG_EXTCON_S2M) += extcon-s2m.o
obj-$(CONFIG_EXTCON_SM5502) += extcon-sm5502.o
obj-$(CONFIG_EXTCON_USB_GPIO) += extcon-usb-gpio.o
obj-$(CONFIG_EXTCON_USBC_CROS_EC) += extcon-usbc-cros-ec.o
diff --git a/drivers/extcon/extcon-s2m.c b/drivers/extcon/extcon-s2m.c
new file mode 100644
index 000000000000..b27ee9e79bb6
--- /dev/null
+++ b/drivers/extcon/extcon-s2m.c
@@ -0,0 +1,355 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Extcon Driver for Samsung S2M series PMICs.
+ *
+ * Copyright (c) 2015 Samsung Electronics Co., Ltd
+ * Copyright (C) 2025 Kaustabh Chakraborty <kauschluss@disroot.org>
+ */
+
+#include <linux/delay.h>
+#include <linux/extcon-provider.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/mfd/samsung/core.h>
+#include <linux/mfd/samsung/irq.h>
+#include <linux/mfd/samsung/s2mu005.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/power_supply.h>
+#include <linux/regmap.h>
+
+struct s2m_muic {
+ struct device *dev;
+ struct regmap *regmap;
+ struct extcon_dev *extcon;
+ struct s2m_muic_irq_data *irq_data;
+ const unsigned int *extcon_cable;
+ bool attached;
+};
+
+struct s2m_muic_irq_data {
+ const enum s2mu005_muic_irq irq;
+ const char *name;
+ int (* const handler)(struct s2m_muic *);
+ int virq;
+};
+
+static int s2mu005_muic_detach(struct s2m_muic *priv)
+{
+ int ret;
+ int i;
+
+ ret = regmap_set_bits(priv->regmap, S2MU005_REG_MUIC_CTRL1,
+ S2MU005_MUIC_MAN_SW);
+ if (ret < 0) {
+ dev_err(priv->dev, "failed to disable manual switching\n");
+ return ret;
+ }
+
+ ret = regmap_set_bits(priv->regmap, S2MU005_REG_MUIC_CTRL3,
+ S2MU005_MUIC_ONESHOT_ADC);
+ if (ret < 0) {
+ dev_err(priv->dev, "failed to enable ADC oneshot mode\n");
+ return ret;
+ }
+
+ ret = regmap_clear_bits(priv->regmap, S2MU005_REG_MUIC_SWCTRL, ~0);
+ if (ret < 0) {
+ dev_err(priv->dev, "failed to clear switch control register\n");
+ return ret;
+ }
+
+ /* Find all set states and clear them */
+ for (i = 0; priv->extcon_cable[i]; i++) {
+ unsigned int state = priv->extcon_cable[i];
+
+ if (extcon_get_state(priv->extcon, state) == true)
+ extcon_set_state_sync(priv->extcon, state, false);
+ }
+
+ priv->attached = false;
+
+ return 0;
+}
+
+static int s2mu005_muic_attach(struct s2m_muic *priv)
+{
+ unsigned int type;
+ int ret;
+
+ /* If any device is already attached, detach it */
+ if (priv->attached) {
+ s2mu005_muic_detach(priv);
+ msleep(100);
+ }
+
+ ret = regmap_read(priv->regmap, S2MU005_REG_MUIC_DEV1, &type);
+ if (ret < 0) {
+ dev_err(priv->dev, "failed to read DEV1 register\n");
+ return ret;
+ }
+
+ /*
+ * All USB connections which require communication via its D+
+ * and D- wires need it.
+ */
+ if (type & (S2MU005_MUIC_OTG | S2MU005_MUIC_DCP | S2MU005_MUIC_SDP)) {
+ ret = regmap_update_bits(priv->regmap, S2MU005_REG_MUIC_SWCTRL,
+ S2MU005_MUIC_DM_DP,
+ S2MU005_MUIC_DM_DP_USB);
+ if (ret < 0) {
+ dev_err(priv->dev, "failed to configure DM/DP pins\n");
+ return ret;
+ }
+ }
+
+ /*
+ * For OTG connections, enable manual switching and ADC oneshot
+ * mode. Since the port will now be supplying power, the
+ * internal ADC (measuring the ID-GND resistance) is made to
+ * poll periodically for any changes, so as to prevent any
+ * damages due to power.
+ */
+ if (type & S2MU005_MUIC_OTG) {
+ ret = regmap_clear_bits(priv->regmap, S2MU005_REG_MUIC_CTRL1,
+ S2MU005_MUIC_MAN_SW);
+ if (ret < 0) {
+ dev_err(priv->dev, "failed to enable manual switching\n");
+ return ret;
+ }
+
+ ret = regmap_clear_bits(priv->regmap, S2MU005_REG_MUIC_CTRL3,
+ S2MU005_MUIC_ONESHOT_ADC);
+ if (ret < 0) {
+ dev_err(priv->dev, "failed to disable ADC oneshot mode\n");
+ return ret;
+ }
+ }
+
+ switch (type) {
+ case S2MU005_MUIC_OTG:
+ dev_dbg(priv->dev, "USB OTG connection detected\n");
+ extcon_set_state_sync(priv->extcon, EXTCON_USB_HOST, true);
+ priv->attached = true;
+ break;
+ case S2MU005_MUIC_CDP:
+ dev_dbg(priv->dev, "USB CDP connection detected\n");
+ extcon_set_state_sync(priv->extcon, EXTCON_USB, true);
+ extcon_set_state_sync(priv->extcon, EXTCON_CHG_USB_CDP, true);
+ priv->attached = true;
+ break;
+ case S2MU005_MUIC_SDP:
+ dev_dbg(priv->dev, "USB SDP connection detected\n");
+ extcon_set_state_sync(priv->extcon, EXTCON_USB, true);
+ extcon_set_state_sync(priv->extcon, EXTCON_CHG_USB_SDP, true);
+ priv->attached = true;
+ break;
+ case S2MU005_MUIC_DCP:
+ dev_dbg(priv->dev, "USB DCP connection detected\n");
+ extcon_set_state_sync(priv->extcon, EXTCON_USB, true);
+ extcon_set_state_sync(priv->extcon, EXTCON_CHG_USB_DCP, true);
+ priv->attached = true;
+ break;
+ case S2MU005_MUIC_UART:
+ dev_dbg(priv->dev, "UART connection detected\n");
+ extcon_set_state_sync(priv->extcon, EXTCON_JIG, true);
+ priv->attached = true;
+ break;
+ }
+
+ if (!priv->attached)
+ dev_warn(priv->dev, "failed to recognize the device attached\n");
+
+ return ret;
+}
+
+static int s2mu005_muic_init(struct s2m_muic *priv)
+{
+ int ret = 0;
+
+ ret = regmap_update_bits(priv->regmap, S2MU005_REG_MUIC_LDOADC_L,
+ S2MU005_MUIC_VSET, S2MU005_MUIC_VSET_3P0V);
+ if (ret < 0) {
+ dev_err(priv->dev, "failed to set internal ADC voltage regulator\n");
+ return ret;
+ }
+
+ ret = regmap_update_bits(priv->regmap, S2MU005_REG_MUIC_LDOADC_H,
+ S2MU005_MUIC_VSET, S2MU005_MUIC_VSET_3P0V);
+ if (ret < 0) {
+ dev_err(priv->dev, "failed to set internal ADC voltage regulator\n");
+ return ret;
+ }
+
+ ret = regmap_clear_bits(priv->regmap, S2MU005_REG_MUIC_CTRL1,
+ S2MU005_MUIC_IRQ);
+ if (ret < 0) {
+ dev_err(priv->dev, "failed to enable MUIC interrupts\n");
+ return ret;
+ }
+
+ return s2mu005_muic_attach(priv);
+}
+
+static const unsigned int s2mu005_muic_extcon_cable[] = {
+ EXTCON_USB,
+ EXTCON_USB_HOST,
+ EXTCON_CHG_USB_SDP,
+ EXTCON_CHG_USB_DCP,
+ EXTCON_CHG_USB_CDP,
+ EXTCON_JIG,
+ EXTCON_NONE,
+};
+
+static struct s2m_muic_irq_data s2mu005_muic_irq_data[] = {
+ {
+ .irq = S2MU005_MUIC_IRQ_ATTACH,
+ .name = "s2mu005-muic-attach",
+ .handler = s2mu005_muic_attach
+ }, {
+ .irq = S2MU005_MUIC_IRQ_DETACH,
+ .name = "s2mu005-muic-detach",
+ .handler = s2mu005_muic_detach
+ }, {
+ /* sentinel */
+ }
+};
+
+static irqreturn_t s2m_muic_irq_func(int virq, void *data)
+{
+ struct s2m_muic *priv = data;
+ const struct s2m_muic_irq_data *irq_data = priv->irq_data;
+ int ret;
+ int i;
+
+ for (i = 0; irq_data[i].handler; i++) {
+ if (virq != irq_data[i].virq)
+ continue;
+
+ ret = irq_data[i].handler(priv);
+ if (ret < 0)
+ dev_err(priv->dev, "failed to handle interrupt for %s (%d)\n",
+ irq_data[i].name, ret);
+ break;
+ }
+
+ return IRQ_HANDLED;
+}
+
+static int s2m_muic_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct sec_pmic_dev *pmic_drvdata = dev_get_drvdata(dev->parent);
+ struct s2m_muic *priv;
+ struct regmap_irq_chip_data *irq_chip_data;
+ int ret;
+ int i;
+
+ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return dev_err_probe(dev, -ENOMEM, "failed to allocate driver private\n");
+
+ platform_set_drvdata(pdev, priv);
+ priv->dev = dev;
+ priv->regmap = pmic_drvdata->regmap_pmic;
+
+ switch (platform_get_device_id(pdev)->driver_data) {
+ case S2MU005:
+ irq_chip_data = pmic_drvdata->irq_data[S2MU005_MUIC_IRQ_CHIP];
+ priv->irq_data = s2mu005_muic_irq_data;
+ priv->extcon_cable = s2mu005_muic_extcon_cable;
+ /* Initialize MUIC */
+ ret = s2mu005_muic_init(priv);
+ break;
+ default:
+ return dev_err_probe(dev, -ENODEV,
+ "device type %d is not supported by driver\n",
+ pmic_drvdata->device_type);
+ }
+ if (ret < 0)
+ return dev_err_probe(dev, ret, "failed to initialize MUIC\n");
+
+ priv->extcon = devm_extcon_dev_allocate(&pdev->dev, priv->extcon_cable);
+ if (IS_ERR(priv->extcon))
+ return dev_err_probe(dev, PTR_ERR(priv->extcon),
+ "failed to allocate memory for extcon\n");
+
+ ret = devm_extcon_dev_register(dev, priv->extcon);
+ if (ret)
+ return dev_err_probe(dev, ret, "failed to register extcon device\n");
+
+ for (i = 0; priv->irq_data[i].handler; i++) {
+ int virq = regmap_irq_get_virq(irq_chip_data,
+ priv->irq_data[i].irq);
+ if (virq <= 0)
+ return dev_err_probe(dev, -EINVAL, "failed to get virtual IRQ\n");
+
+ priv->irq_data[i].virq = virq;
+ ret = devm_request_threaded_irq(dev, virq, NULL,
+ s2m_muic_irq_func, IRQF_ONESHOT,
+ priv->irq_data[i].name, priv);
+ if (ret)
+ dev_err_probe(dev, ret, "failed to request IRQ\n");
+ }
+
+ return 0;
+}
+
+static void s2m_muic_remove(struct platform_device *pdev)
+{
+ struct s2m_muic *priv = dev_get_drvdata(&pdev->dev);
+
+ /*
+ * Disabling the MUIC device is important as it disables manual
+ * switching mode, thereby enabling auto switching mode.
+ *
+ * This is to ensure that when the board is powered off, it
+ * goes into LPM charging mode when a USB charger is connected.
+ */
+ switch (platform_get_device_id(pdev)->driver_data) {
+ case S2MU005:
+ s2mu005_muic_detach(priv);
+ break;
+ }
+}
+
+static const struct platform_device_id s2m_muic_id_table[] = {
+ { "s2mu005-muic", S2MU005 },
+ { /* sentinel */ },
+};
+MODULE_DEVICE_TABLE(platform, s2m_muic_id_table);
+
+#ifdef CONFIG_OF
+/*
+ * Device is instantiated through parent MFD device and device matching
+ * is done through platform_device_id.
+ *
+ * However if device's DT node contains proper compatible and driver is
+ * built as a module, then the *module* matching will be done through DT
+ * aliases. This requires of_device_id table. In the same time this will
+ * not change the actual *device* matching so do not add .of_match_table.
+ */
+static const struct of_device_id s2m_muic_of_match_table[] = {
+ {
+ .compatible = "samsung,s2mu005-muic",
+ .data = (void *)S2MU005,
+ }, {
+ /* sentinel */
+ },
+};
+MODULE_DEVICE_TABLE(of, s2m_muic_of_match_table);
+#endif
+
+static struct platform_driver s2m_muic_driver = {
+ .driver = {
+ .name = "s2m-muic",
+ },
+ .probe = s2m_muic_probe,
+ .remove = s2m_muic_remove,
+ .id_table = s2m_muic_id_table,
+};
+module_platform_driver(s2m_muic_driver);
+
+MODULE_DESCRIPTION("Extcon Driver For Samsung S2M Series PMICs");
+MODULE_AUTHOR("Kaustabh Chakraborty <kauschluss@disroot.org>");
+MODULE_LICENSE("GPL");
--
2.51.2
^ permalink raw reply related
* [PATCH 11/13] Documentation: leds: document pattern behavior of Samsung S2M series PMIC RGB LEDs
From: Kaustabh Chakraborty @ 2025-11-13 19:05 UTC (permalink / raw)
To: Lee Jones, Pavel Machek, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, MyungJoo Ham, Chanwoo Choi, Sebastian Reichel,
Krzysztof Kozlowski, André Draszik, Alexandre Belloni,
Jonathan Corbet
Cc: linux-leds, devicetree, linux-kernel, linux-pm, linux-samsung-soc,
linux-rtc, linux-doc, Kaustabh Chakraborty
In-Reply-To: <20251114-s2mu005-pmic-v1-0-9e3184d3a0c9@disroot.org>
Add documentation to describe how hardware patterns (as defined by the
documentation of led-class-multicolor) are parsed and implemented by the
Samsung S2M series PMIC RGB LED driver.
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
---
Documentation/leds/index.rst | 1 +
Documentation/leds/leds-s2m-rgb.rst | 60 +++++++++++++++++++++++++++++++++++++
2 files changed, 61 insertions(+)
diff --git a/Documentation/leds/index.rst b/Documentation/leds/index.rst
index 76fae171039c..05d8e8517a80 100644
--- a/Documentation/leds/index.rst
+++ b/Documentation/leds/index.rst
@@ -27,6 +27,7 @@ LEDs
leds-lp55xx
leds-mlxcpld
leds-mt6370-rgb
+ leds-s2m-rgb
leds-sc27xx
leds-st1202
leds-qcom-lpg
diff --git a/Documentation/leds/leds-s2m-rgb.rst b/Documentation/leds/leds-s2m-rgb.rst
new file mode 100644
index 000000000000..cf91f0238093
--- /dev/null
+++ b/Documentation/leds/leds-s2m-rgb.rst
@@ -0,0 +1,60 @@
+.. SPDX-License-Identifier: GPL-2.0
+
+======================================
+Samsung S2M Series PMIC RGB LED Driver
+======================================
+
+Description
+-----------
+
+The RGB LED on the S2M series PMIC hardware features a three-channel LED that is
+grouped together as a single device. Furthermore, the it supports 8-bit
+brightness control for each channel. This LED is typically used as a status
+indicator in mobile devices. It also supports various parameters for hardware
+patterns.
+
+The hardware pattern can be programmed using the "pattern" trigger, using the
+hw_pattern attribute.
+
+/sys/class/leds/<led>/repeat
+----------------------------
+
+The hardware supports only indefinitely repeating patterns. The repeat
+attribute must be set to -1 for hardware patterns to function.
+
+/sys/class/leds/<led>/hw_pattern
+--------------------------------
+
+Specify a hardware pattern for the RGB LEDs.
+
+The pattern is a series of brightness levels and durations in milliseconds.
+There should be only one non-zero brightness level. Unlike the results
+described in leds-trigger-pattern, the transitions between on and off states
+are smoothed out by the hardware.
+
+Simple pattern::
+
+ "255 3000 0 1000"
+
+ 255 -+ ''''''-. .-'''''''-.
+ | '. .' '.
+ | \ / \
+ | '. .' '.
+ | '-.......-' '-
+ 0 -+-------+-------+-------+-------+-------+-------+--> time (s)
+ 0 1 2 3 4 5 6
+
+As described in leds-trigger-pattern, it is also possible to use zero-length
+entries to disable the ramping mechanism.
+
+On-Off pattern::
+
+ "255 1000 255 0 0 1000 0 0"
+
+ 255 -+ ------+ +-------+ +-------+
+ | | | | | |
+ | | | | | |
+ | | | | | |
+ | +-------+ +-------+ +-------
+ 0 -+-------+-------+-------+-------+-------+-------+--> time (s)
+ 0 1 2 3 4 5 6
--
2.51.2
^ permalink raw reply related
* [PATCH 10/13] leds: rgb: add support for Samsung S2M series PMIC RGB LED device
From: Kaustabh Chakraborty @ 2025-11-13 19:05 UTC (permalink / raw)
To: Lee Jones, Pavel Machek, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, MyungJoo Ham, Chanwoo Choi, Sebastian Reichel,
Krzysztof Kozlowski, André Draszik, Alexandre Belloni,
Jonathan Corbet
Cc: linux-leds, devicetree, linux-kernel, linux-pm, linux-samsung-soc,
linux-rtc, linux-doc, Kaustabh Chakraborty
In-Reply-To: <20251114-s2mu005-pmic-v1-0-9e3184d3a0c9@disroot.org>
Add support for the RGB LEDs found in certain Samsung S2M series PMICs.
The device has three LED channels, controlled as a single device. These
LEDs are typically used as status indicators in mobile phones.
The driver includes initial support for the S2MU005 PMIC RGB LEDs.
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
---
drivers/leds/rgb/Kconfig | 11 +
drivers/leds/rgb/Makefile | 1 +
drivers/leds/rgb/leds-s2m-rgb.c | 462 ++++++++++++++++++++++++++++++++++++++++
3 files changed, 474 insertions(+)
diff --git a/drivers/leds/rgb/Kconfig b/drivers/leds/rgb/Kconfig
index 222d943d826a..e38ba1bd434e 100644
--- a/drivers/leds/rgb/Kconfig
+++ b/drivers/leds/rgb/Kconfig
@@ -62,6 +62,17 @@ config LEDS_QCOM_LPG
If compiled as a module, the module will be named leds-qcom-lpg.
+config LEDS_S2M_RGB
+ tristate "Samsung S2M series PMICs RGB LED support"
+ depends on LEDS_CLASS
+ depends on MFD_SEC_CORE
+ select REGMAP_IRQ
+ help
+ This option enables support for the S2MU005 RGB LEDs. These
+ devices have three LED channels, with 8-bit brightness control
+ for each channel. It's usually found in mobile phones as
+ status indicators.
+
config LEDS_MT6370_RGB
tristate "LED Support for MediaTek MT6370 PMIC"
depends on MFD_MT6370
diff --git a/drivers/leds/rgb/Makefile b/drivers/leds/rgb/Makefile
index a501fd27f179..fc9d38fa60e1 100644
--- a/drivers/leds/rgb/Makefile
+++ b/drivers/leds/rgb/Makefile
@@ -5,4 +5,5 @@ obj-$(CONFIG_LEDS_KTD202X) += leds-ktd202x.o
obj-$(CONFIG_LEDS_NCP5623) += leds-ncp5623.o
obj-$(CONFIG_LEDS_PWM_MULTICOLOR) += leds-pwm-multicolor.o
obj-$(CONFIG_LEDS_QCOM_LPG) += leds-qcom-lpg.o
+obj-$(CONFIG_LEDS_S2M_RGB) += leds-s2m-rgb.o
obj-$(CONFIG_LEDS_MT6370_RGB) += leds-mt6370-rgb.o
diff --git a/drivers/leds/rgb/leds-s2m-rgb.c b/drivers/leds/rgb/leds-s2m-rgb.c
new file mode 100644
index 000000000000..2184ae0aec16
--- /dev/null
+++ b/drivers/leds/rgb/leds-s2m-rgb.c
@@ -0,0 +1,462 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * RGB LED Driver for Samsung S2M series PMICs.
+ *
+ * Copyright (c) 2015 Samsung Electronics Co., Ltd
+ * Copyright (c) 2025 Kaustabh Chakraborty <kauschluss@disroot.org>
+ */
+
+#include <linux/container_of.h>
+#include <linux/device.h>
+#include <linux/led-class-multicolor.h>
+#include <linux/math.h>
+#include <linux/mfd/samsung/core.h>
+#include <linux/mfd/samsung/s2mu005.h>
+#include <linux/module.h>
+#include <linux/mutex.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/property.h>
+#include <linux/regmap.h>
+
+struct s2m_rgb {
+ struct device *dev;
+ struct regmap *regmap;
+ struct led_classdev_mc cdev;
+ struct mutex lock;
+ const struct s2m_rgb_spec *spec;
+ u8 ramp_up;
+ u8 ramp_dn;
+ u8 stay_hi;
+ u8 stay_lo;
+};
+
+struct s2m_rgb_spec {
+ int (*params_apply)(struct s2m_rgb *priv);
+ int (*params_reset)(struct s2m_rgb *priv);
+ const u32 *lut_ramp_up;
+ const size_t lut_ramp_up_len;
+ const u32 *lut_ramp_dn;
+ const size_t lut_ramp_dn_len;
+ const u32 *lut_stay_hi;
+ const size_t lut_stay_hi_len;
+ const u32 *lut_stay_lo;
+ const size_t lut_stay_lo_len;
+ const unsigned int max_brightness;
+};
+
+static struct led_classdev_mc *to_cdev_mc(struct led_classdev *cdev)
+{
+ return container_of(cdev, struct led_classdev_mc, led_cdev);
+}
+
+static struct s2m_rgb *to_rgb_priv(struct led_classdev_mc *cdev)
+{
+ return container_of(cdev, struct s2m_rgb, cdev);
+}
+
+static int s2m_rgb_lut_calc_timing(const u32 *lut, const size_t len,
+ const u32 req_time, u8 *idx)
+{
+ int lo = 0;
+ int hi = len - 2;
+
+ /* Bounds checking */
+ if (req_time < lut[0] || req_time > lut[len - 1])
+ return -EINVAL;
+
+ /*
+ * Perform a binary search to pick the best timing from the LUT.
+ *
+ * The search algorithm picks two consecutive elements of the
+ * LUT and tries to search the pair between which the requested
+ * time lies.
+ */
+ while (lo <= hi) {
+ *idx = (lo + hi) / 2;
+
+ if ((lut[*idx] <= req_time) && (req_time <= lut[*idx + 1]))
+ break;
+
+ if ((req_time < lut[*idx]) && (req_time < lut[*idx + 1]))
+ hi = *idx - 1;
+ else
+ lo = *idx + 1;
+ }
+
+ /*
+ * The searched timing is always less than the requested time. At
+ * times, the succeeding timing in the LUT is closer thus more
+ * accurate. Adjust the resulting value if that's the case.
+ */
+ if (abs(req_time - lut[*idx]) > abs(lut[*idx + 1] - req_time))
+ (*idx)++;
+
+ return 0;
+}
+
+static int s2m_rgb_brightness_set(struct led_classdev *cdev,
+ enum led_brightness value)
+{
+ struct s2m_rgb *priv = to_rgb_priv(to_cdev_mc(cdev));
+ int ret;
+
+ mutex_lock(&priv->lock);
+
+ led_mc_calc_color_components(&priv->cdev, value);
+
+ if (value == LED_OFF)
+ ret = priv->spec->params_reset(priv);
+ else
+ ret = priv->spec->params_apply(priv);
+
+ mutex_unlock(&priv->lock);
+
+ return ret;
+}
+
+static int s2m_rgb_pattern_set(struct led_classdev *cdev,
+ struct led_pattern *pattern, u32 len, int repeat)
+{
+ struct s2m_rgb *priv = to_rgb_priv(to_cdev_mc(cdev));
+ int brightness_peak = 0;
+ u32 time_hi = 0;
+ u32 time_lo = 0;
+ bool ramp_up_en;
+ bool ramp_dn_en;
+ int ret;
+ int i;
+
+ /*
+ * The typical pattern supported by this device can be
+ * represented with the following graph:
+ *
+ * 255 T ''''''-. .-'''''''-.
+ * | '. .' '.
+ * | \ / \
+ * | '. .' '.
+ * | '-...........-' '-
+ * 0 +----------------------------------------------------> time (s)
+ *
+ * <---- HIGH ----><-- LOW --><-------- HIGH --------->
+ * <-----><-------><---------><-------><-----><------->
+ * stay_hi ramp_dn stay_lo ramp_up stay_hi ramp_dn
+ *
+ * There are two states, named HIGH and LOW. HIGH has a non-zero
+ * brightness level, while LOW is of zero brightness. The
+ * pattern provided should mention only one zero and non-zero
+ * brightness level. The hardware always starts the pattern from
+ * the HIGH state, as shown in the graph.
+ *
+ * The HIGH state can be divided in three somewhat equal timings:
+ * ramp_up, stay_hi, and ramp_dn. The LOW state has only one
+ * timing: stay_lo.
+ */
+
+ /* Only indefinitely looping patterns are supported. */
+ if (repeat != -1)
+ return -EINVAL;
+
+ /* Pattern should consist of at least two tuples. */
+ if (len < 2)
+ return -EINVAL;
+
+ for (i = 0; i < len; i++) {
+ int brightness = pattern[i].brightness;
+ u32 delta_t = pattern[i].delta_t;
+
+ if (brightness) {
+ /*
+ * The pattern shold define only one non-zero
+ * brightness in the HIGH state. The device
+ * doesn't have any provisions to handle
+ * multiple peak brightness levels.
+ */
+ if (brightness_peak && brightness_peak != brightness)
+ return -EINVAL;
+
+ brightness_peak = brightness;
+ time_hi += delta_t;
+ ramp_dn_en = !!delta_t;
+ } else {
+ time_lo += delta_t;
+ ramp_up_en = !!delta_t;
+ }
+ }
+
+ mutex_lock(&priv->lock);
+
+ /*
+ * The timings ramp_up, stay_hi, and ramp_dn of the HIGH state
+ * are roughly equal. Firstly, calculate and set timings for
+ * ramp_up and ramp_dn (making sure they're exactly equal).
+ */
+ priv->ramp_up = 0;
+ priv->ramp_dn = 0;
+
+ if (ramp_up_en) {
+ ret = s2m_rgb_lut_calc_timing(priv->spec->lut_ramp_up,
+ priv->spec->lut_ramp_up_len,
+ time_hi / 3, &priv->ramp_up);
+ if (ret < 0)
+ goto param_fail;
+ }
+
+ if (ramp_dn_en) {
+ ret = s2m_rgb_lut_calc_timing(priv->spec->lut_ramp_dn,
+ priv->spec->lut_ramp_dn_len,
+ time_hi / 3, &priv->ramp_dn);
+ if (ret < 0)
+ goto param_fail;
+ }
+
+ /*
+ * Subtract the allocated ramp timings from time_hi (and also
+ * making sure it doesn't underflow!). The remaining time is
+ * allocated to stay_hi.
+ */
+ time_hi -= min(time_hi, priv->spec->lut_ramp_up[priv->ramp_up]);
+ time_hi -= min(time_hi, priv->spec->lut_ramp_dn[priv->ramp_dn]);
+
+ ret = s2m_rgb_lut_calc_timing(priv->spec->lut_stay_hi,
+ priv->spec->lut_stay_hi_len, time_hi,
+ &priv->stay_hi);
+ if (ret < 0)
+ goto param_fail;
+
+ ret = s2m_rgb_lut_calc_timing(priv->spec->lut_stay_lo,
+ priv->spec->lut_stay_lo_len, time_lo,
+ &priv->stay_lo);
+ if (ret < 0)
+ goto param_fail;
+
+ led_mc_calc_color_components(&priv->cdev, brightness_peak);
+ ret = priv->spec->params_apply(priv);
+ if (ret < 0)
+ goto param_fail;
+
+ mutex_unlock(&priv->lock);
+
+ return 0;
+
+param_fail:
+ mutex_unlock(&priv->lock);
+ priv->ramp_up = 0;
+ priv->ramp_dn = 0;
+ priv->stay_hi = 0;
+ priv->stay_lo = 0;
+
+ return ret;
+}
+
+static int s2m_rgb_pattern_clear(struct led_classdev *cdev)
+{
+ struct s2m_rgb *priv = to_rgb_priv(to_cdev_mc(cdev));
+ int ret;
+
+ mutex_lock(&priv->lock);
+
+ ret = priv->spec->params_reset(priv);
+
+ mutex_unlock(&priv->lock);
+
+ return ret;
+}
+
+static int s2mu005_rgb_apply_params(struct s2m_rgb *priv)
+{
+ struct regmap *regmap = priv->regmap;
+ unsigned int ramp_val = 0;
+ unsigned int stay_val = 0;
+ int ret;
+ int i;
+
+ ramp_val |= FIELD_PREP(S2MU005_RGB_CH_RAMP_UP, priv->ramp_up);
+ ramp_val |= FIELD_PREP(S2MU005_RGB_CH_RAMP_DN, priv->ramp_dn);
+
+ stay_val |= FIELD_PREP(S2MU005_RGB_CH_STAY_HI, priv->stay_hi);
+ stay_val |= FIELD_PREP(S2MU005_RGB_CH_STAY_LO, priv->stay_lo);
+
+ ret = regmap_write(regmap, S2MU005_REG_RGB_EN, S2MU005_RGB_RESET);
+ if (ret < 0) {
+ dev_err(priv->dev, "failed to reset RGB LEDs\n");
+ return ret;
+ }
+
+ for (i = 0; i < priv->cdev.num_colors; i++) {
+ ret = regmap_write(regmap, S2MU005_REG_RGB_CH_CTRL(i),
+ priv->cdev.subled_info[i].brightness);
+ if (ret < 0) {
+ dev_err(priv->dev, "failed to set LED brightness\n");
+ return ret;
+ }
+
+ ret = regmap_write(regmap, S2MU005_REG_RGB_CH_RAMP(i), ramp_val);
+ if (ret < 0) {
+ dev_err(priv->dev, "failed to set ramp timings\n");
+ return ret;
+ }
+
+ ret = regmap_write(regmap, S2MU005_REG_RGB_CH_STAY(i), stay_val);
+ if (ret < 0) {
+ dev_err(priv->dev, "failed to set stay timings\n");
+ return ret;
+ }
+ }
+
+ ret = regmap_update_bits(regmap, S2MU005_REG_RGB_EN, S2MU005_RGB_SLOPE,
+ S2MU005_RGB_SLOPE_SMOOTH);
+ if (ret < 0) {
+ dev_err(priv->dev, "failed to set ramp slope\n");
+ return ret;
+ }
+
+ return 0;
+}
+
+static int s2mu005_rgb_reset_params(struct s2m_rgb *priv)
+{
+ struct regmap *regmap = priv->regmap;
+ int ret;
+
+ ret = regmap_write(regmap, S2MU005_REG_RGB_EN, S2MU005_RGB_RESET);
+ if (ret < 0) {
+ dev_err(priv->dev, "failed to reset RGB LEDs\n");
+ return ret;
+ }
+
+ priv->ramp_up = 0;
+ priv->ramp_dn = 0;
+ priv->stay_hi = 0;
+ priv->stay_lo = 0;
+
+ return 0;
+}
+
+static const u32 s2mu005_rgb_lut_ramp[] = {
+ 0, 100, 200, 300, 400, 500, 600, 700,
+ 800, 1000, 1200, 1400, 1600, 1800, 2000, 2200,
+};
+
+static const u32 s2mu005_rgb_lut_stay_hi[] = {
+ 100, 200, 300, 400, 500, 750, 1000, 1250,
+ 1500, 1750, 2000, 2250, 2500, 2750, 3000, 3250,
+};
+
+static const u32 s2mu005_rgb_lut_stay_lo[] = {
+ 0, 500, 1000, 1500, 2000, 2500, 3000, 3500,
+ 4000, 4500, 5000, 6000, 7000, 8000, 10000, 12000,
+};
+
+static const struct s2m_rgb_spec s2mu005_rgb_spec = {
+ .params_apply = s2mu005_rgb_apply_params,
+ .params_reset = s2mu005_rgb_reset_params,
+ .lut_ramp_up = s2mu005_rgb_lut_ramp,
+ .lut_ramp_up_len = ARRAY_SIZE(s2mu005_rgb_lut_ramp),
+ .lut_ramp_dn = s2mu005_rgb_lut_ramp,
+ .lut_ramp_dn_len = ARRAY_SIZE(s2mu005_rgb_lut_ramp),
+ .lut_stay_hi = s2mu005_rgb_lut_stay_hi,
+ .lut_stay_hi_len = ARRAY_SIZE(s2mu005_rgb_lut_stay_hi),
+ .lut_stay_lo = s2mu005_rgb_lut_stay_lo,
+ .lut_stay_lo_len = ARRAY_SIZE(s2mu005_rgb_lut_stay_lo),
+ .max_brightness = 255,
+};
+
+static struct mc_subled s2mu005_rgb_subled_info[] = {
+ {
+ .channel = 0,
+ .color_index = LED_COLOR_ID_BLUE,
+ }, {
+ .channel = 1,
+ .color_index = LED_COLOR_ID_GREEN,
+ }, {
+ .channel = 2,
+ .color_index = LED_COLOR_ID_RED,
+ },
+};
+
+static int s2m_rgb_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct sec_pmic_dev *pmic_drvdata = dev_get_drvdata(dev->parent);
+ struct s2m_rgb *priv;
+ struct led_init_data init_data = {};
+ int ret;
+
+ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return dev_err_probe(dev, -ENOMEM, "failed to allocate driver private\n");
+
+ platform_set_drvdata(pdev, priv);
+ priv->dev = dev;
+ priv->regmap = pmic_drvdata->regmap_pmic;
+
+ switch (platform_get_device_id(pdev)->driver_data) {
+ case S2MU005:
+ priv->spec = &s2mu005_rgb_spec;
+ priv->cdev.subled_info = s2mu005_rgb_subled_info;
+ priv->cdev.num_colors = ARRAY_SIZE(s2mu005_rgb_subled_info);
+ break;
+ default:
+ return dev_err_probe(dev, -ENODEV,
+ "device type %d is not supported by driver\n",
+ pmic_drvdata->device_type);
+ }
+
+ priv->cdev.led_cdev.max_brightness = priv->spec->max_brightness;
+ priv->cdev.led_cdev.brightness_set_blocking = s2m_rgb_brightness_set;
+ priv->cdev.led_cdev.pattern_set = s2m_rgb_pattern_set;
+ priv->cdev.led_cdev.pattern_clear = s2m_rgb_pattern_clear;
+
+ ret = devm_mutex_init(dev, &priv->lock);
+ if (ret)
+ return dev_err_probe(dev, ret, "failed to create mutex lock\n");
+
+ init_data.fwnode = of_fwnode_handle(dev->of_node);
+ ret = devm_led_classdev_multicolor_register_ext(dev, &priv->cdev,
+ &init_data);
+ if (ret < 0)
+ return dev_err_probe(dev, ret, "failed to create LED device\n");
+
+ return 0;
+}
+
+static const struct platform_device_id s2m_rgb_id_table[] = {
+ { "s2mu005-rgb", S2MU005 },
+ { /* sentinel */ },
+};
+MODULE_DEVICE_TABLE(platform, s2m_rgb_id_table);
+
+#ifdef CONFIG_OF
+/*
+ * Device is instantiated through parent MFD device and device matching
+ * is done through platform_device_id.
+ *
+ * However if device's DT node contains proper compatible and driver is
+ * built as a module, then the *module* matching will be done through DT
+ * aliases. This requires of_device_id table. In the same time this will
+ * not change the actual *device* matching so do not add .of_match_table.
+ */
+static const struct of_device_id s2m_rgb_of_match_table[] = {
+ {
+ .compatible = "samsung,s2mu005-rgb",
+ .data = (void *)S2MU005,
+ }, {
+ /* sentinel */
+ },
+};
+MODULE_DEVICE_TABLE(of, s2m_rgb_of_match_table);
+#endif
+
+static struct platform_driver s2m_rgb_driver = {
+ .driver = {
+ .name = "s2m-rgb",
+ },
+ .probe = s2m_rgb_probe,
+ .id_table = s2m_rgb_id_table,
+};
+module_platform_driver(s2m_rgb_driver);
+
+MODULE_DESCRIPTION("RGB LED Driver For Samsung S2M Series PMICs");
+MODULE_AUTHOR("Kaustabh Chakraborty <kauschluss@disroot.org>");
+MODULE_LICENSE("GPL");
--
2.51.2
^ permalink raw reply related
* [PATCH 09/13] leds: flash: add support for Samsung S2M series PMIC flash LED device
From: Kaustabh Chakraborty @ 2025-11-13 19:05 UTC (permalink / raw)
To: Lee Jones, Pavel Machek, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, MyungJoo Ham, Chanwoo Choi, Sebastian Reichel,
Krzysztof Kozlowski, André Draszik, Alexandre Belloni,
Jonathan Corbet
Cc: linux-leds, devicetree, linux-kernel, linux-pm, linux-samsung-soc,
linux-rtc, linux-doc, Kaustabh Chakraborty
In-Reply-To: <20251114-s2mu005-pmic-v1-0-9e3184d3a0c9@disroot.org>
Add support for flash LEDs found in certain Samsung S2M series PMICs.
The device has two channels for LEDs, typically for the back and front
cameras in mobile devices. Both channels can be independently
controlled, and can be operated in torch or flash modes.
The driver includes initial support for the S2MU005 PMIC flash LEDs.
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
---
drivers/leds/flash/Kconfig | 12 ++
drivers/leds/flash/Makefile | 1 +
drivers/leds/flash/leds-s2m-flash.c | 413 ++++++++++++++++++++++++++++++++++++
3 files changed, 426 insertions(+)
diff --git a/drivers/leds/flash/Kconfig b/drivers/leds/flash/Kconfig
index 5e08102a6784..be62e0527742 100644
--- a/drivers/leds/flash/Kconfig
+++ b/drivers/leds/flash/Kconfig
@@ -114,6 +114,18 @@ config LEDS_RT8515
To compile this driver as a module, choose M here: the module
will be called leds-rt8515.
+config LEDS_S2M_FLASH
+ tristate "Samsung S2M series PMICs flash/torch LED support"
+ depends on LEDS_CLASS
+ depends on MFD_SEC_CORE
+ depends on V4L2_FLASH_LED_CLASS || !V4L2_FLASH_LED_CLASS
+ select REGMAP_IRQ
+ help
+ This option enables support for the flash/torch LEDs found in
+ certain Samsung S2M series PMICs, such as the S2MU005. It has
+ a LED channel dedicated for every physical LED. The LEDs can
+ be controlled in flash and torch modes.
+
config LEDS_SGM3140
tristate "LED support for the SGM3140"
depends on V4L2_FLASH_LED_CLASS || !V4L2_FLASH_LED_CLASS
diff --git a/drivers/leds/flash/Makefile b/drivers/leds/flash/Makefile
index 712fb737a428..44e6c1b4beb3 100644
--- a/drivers/leds/flash/Makefile
+++ b/drivers/leds/flash/Makefile
@@ -10,6 +10,7 @@ obj-$(CONFIG_LEDS_MAX77693) += leds-max77693.o
obj-$(CONFIG_LEDS_QCOM_FLASH) += leds-qcom-flash.o
obj-$(CONFIG_LEDS_RT4505) += leds-rt4505.o
obj-$(CONFIG_LEDS_RT8515) += leds-rt8515.o
+obj-$(CONFIG_LEDS_S2M_FLASH) += leds-s2m-flash.o
obj-$(CONFIG_LEDS_SGM3140) += leds-sgm3140.o
obj-$(CONFIG_LEDS_SY7802) += leds-sy7802.o
obj-$(CONFIG_LEDS_TPS6131X) += leds-tps6131x.o
diff --git a/drivers/leds/flash/leds-s2m-flash.c b/drivers/leds/flash/leds-s2m-flash.c
new file mode 100644
index 000000000000..7ea033403b43
--- /dev/null
+++ b/drivers/leds/flash/leds-s2m-flash.c
@@ -0,0 +1,413 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Flash and Torch LED Driver for Samsung S2M series PMICs.
+ *
+ * Copyright (c) 2015 Samsung Electronics Co., Ltd
+ * Copyright (c) 2025 Kaustabh Chakraborty <kauschluss@disroot.org>
+ */
+
+#include <linux/container_of.h>
+#include <linux/device.h>
+#include <linux/led-class-flash.h>
+#include <linux/mfd/samsung/core.h>
+#include <linux/mfd/samsung/s2mu005.h>
+#include <linux/minmax.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/property.h>
+#include <linux/regmap.h>
+#include <media/v4l2-flash-led-class.h>
+
+#define MAX_CHANNELS 2
+
+struct s2m_fled {
+ struct device *dev;
+ struct regmap *regmap;
+ struct led_classdev_flash cdev;
+ struct v4l2_flash *v4l2_flash;
+ struct mutex lock;
+ const struct s2m_fled_spec *spec;
+ unsigned int pmic_revision;
+ u8 channel;
+ u8 flash_brightness;
+ u8 flash_timeout;
+};
+
+struct s2m_fled_spec {
+ u8 num_channels;
+ u32 torch_max_brightness;
+ u32 flash_min_current_ua;
+ u32 flash_max_current_ua;
+ u32 flash_min_timeout_us;
+ u32 flash_max_timeout_us;
+ int (*torch_brightness_set_blocking)(struct led_classdev *led_cdev,
+ enum led_brightness brightness);
+ const struct led_flash_ops *flash_ops;
+};
+
+static struct led_classdev_flash *to_cdev_flash(struct led_classdev *cdev)
+{
+ return container_of(cdev, struct led_classdev_flash, led_cdev);
+}
+
+static struct s2m_fled *to_led_priv(struct led_classdev_flash *cdev)
+{
+ return container_of(cdev, struct s2m_fled, cdev);
+}
+
+static int s2m_fled_flash_brightness_set(struct led_classdev_flash *cdev,
+ u32 brightness)
+{
+ struct s2m_fled *priv = to_led_priv(cdev);
+ struct led_flash_setting *setting = &cdev->brightness;
+
+ priv->flash_brightness = (brightness - setting->min) / setting->step;
+
+ return 0;
+}
+
+static int s2m_fled_flash_timeout_set(struct led_classdev_flash *cdev,
+ u32 timeout)
+{
+ struct s2m_fled *priv = to_led_priv(cdev);
+ struct led_flash_setting *setting = &cdev->timeout;
+
+ priv->flash_timeout = (timeout - setting->min) / setting->step;
+
+ return 0;
+}
+
+#if IS_ENABLED(CONFIG_V4L2_FLASH_LED_CLASS)
+static int s2m_fled_flash_external_strobe_set(struct v4l2_flash *v4l2_flash,
+ bool enable)
+{
+ struct s2m_fled *priv = to_led_priv(v4l2_flash->fled_cdev);
+
+ mutex_lock(&priv->lock);
+
+ priv->cdev.ops->strobe_set(&priv->cdev, enable);
+
+ mutex_unlock(&priv->lock);
+
+ return 0;
+}
+
+static const struct v4l2_flash_ops s2m_fled_v4l2_flash_ops = {
+ .external_strobe_set = s2m_fled_flash_external_strobe_set,
+};
+#else
+static const struct v4l2_flash_ops s2m_fled_v4l2_flash_ops;
+#endif
+
+static int s2mu005_fled_torch_brightness_set(struct led_classdev *cdev,
+ enum led_brightness value)
+{
+ struct s2m_fled *priv = to_led_priv(to_cdev_flash(cdev));
+ struct regmap *regmap = priv->regmap;
+ u8 channel = priv->channel;
+ unsigned int reg_enable;
+ int ret;
+
+ mutex_lock(&priv->lock);
+
+ /*
+ * Get the LED enable register address. Revision EVT0 has the
+ * register at CTRL4, while EVT1 and higher have it at CTRL6.
+ */
+ if (priv->pmic_revision == 0)
+ reg_enable = S2MU005_REG_FLED_CTRL4;
+ else
+ reg_enable = S2MU005_REG_FLED_CTRL6;
+
+ if (value == LED_OFF) {
+ ret = regmap_clear_bits(regmap, reg_enable,
+ S2MU005_FLED_TORCH_EN(channel));
+ if (ret < 0)
+ dev_err(priv->dev, "failed to disable torch LED\n");
+ goto unlock;
+ }
+
+ ret = regmap_update_bits(regmap, S2MU005_REG_FLED_CH_CTRL1(channel),
+ S2MU005_FLED_TORCH_IOUT,
+ FIELD_PREP(S2MU005_FLED_TORCH_IOUT, value - 1));
+ if (ret < 0) {
+ dev_err(priv->dev, "failed to set torch current\n");
+ goto unlock;
+ }
+
+ ret = regmap_set_bits(regmap, reg_enable, S2MU005_FLED_TORCH_EN(channel));
+ if (ret < 0) {
+ dev_err(priv->dev, "failed to enable torch LED\n");
+ goto unlock;
+ }
+
+unlock:
+ mutex_unlock(&priv->lock);
+
+ return ret;
+}
+
+static int s2mu005_fled_flash_strobe_set(struct led_classdev_flash *cdev,
+ bool state)
+{
+ struct s2m_fled *priv = to_led_priv(cdev);
+ struct regmap *regmap = priv->regmap;
+ u8 channel = priv->channel;
+ unsigned int reg_enable;
+ int ret;
+
+ mutex_lock(&priv->lock);
+
+ /*
+ * Get the LED enable register address. Revision EVT0 has the
+ * register at CTRL4, while EVT1 and higher have it at CTRL6.
+ */
+ if (priv->pmic_revision == 0)
+ reg_enable = S2MU005_REG_FLED_CTRL4;
+ else
+ reg_enable = S2MU005_REG_FLED_CTRL6;
+
+ ret = regmap_clear_bits(regmap, reg_enable, S2MU005_FLED_FLASH_EN(channel));
+ if (ret < 0) {
+ dev_err(priv->dev, "failed to disable flash LED\n");
+ goto unlock;
+ }
+
+ if (!state)
+ goto unlock;
+
+ ret = regmap_update_bits(regmap, S2MU005_REG_FLED_CH_CTRL0(channel),
+ S2MU005_FLED_FLASH_IOUT,
+ FIELD_PREP(S2MU005_FLED_FLASH_IOUT,
+ priv->flash_brightness));
+ if (ret < 0) {
+ dev_err(priv->dev, "failed to set flash brightness\n");
+ goto unlock;
+ }
+
+ ret = regmap_update_bits(regmap, S2MU005_REG_FLED_CH_CTRL3(channel),
+ S2MU005_FLED_FLASH_TIMEOUT,
+ FIELD_PREP(S2MU005_FLED_FLASH_TIMEOUT,
+ priv->flash_timeout));
+ if (ret < 0) {
+ dev_err(priv->dev, "failed to set flash timeout\n");
+ goto unlock;
+ }
+
+ ret = regmap_set_bits(regmap, reg_enable, S2MU005_FLED_FLASH_EN(channel));
+ if (ret < 0) {
+ dev_err(priv->dev, "failed to enable flash LED\n");
+ goto unlock;
+ }
+
+unlock:
+ mutex_unlock(&priv->lock);
+
+ return 0;
+}
+
+static int s2mu005_fled_flash_strobe_get(struct led_classdev_flash *cdev,
+ bool *state)
+{
+ struct s2m_fled *priv = to_led_priv(cdev);
+ struct regmap *regmap = priv->regmap;
+ u8 channel = priv->channel;
+ u32 val;
+ int ret;
+
+ mutex_lock(&priv->lock);
+
+ ret = regmap_read(regmap, S2MU005_REG_FLED_STATUS, &val);
+ if (ret < 0) {
+ dev_err(priv->dev, "failed to fetch LED status");
+ goto unlock;
+ }
+
+ *state = !!(val & S2MU005_FLED_FLASH_STATUS(channel));
+
+unlock:
+ mutex_unlock(&priv->lock);
+
+ return ret;
+}
+
+static const struct led_flash_ops s2mu005_fled_flash_ops = {
+ .flash_brightness_set = s2m_fled_flash_brightness_set,
+ .timeout_set = s2m_fled_flash_timeout_set,
+ .strobe_set = s2mu005_fled_flash_strobe_set,
+ .strobe_get = s2mu005_fled_flash_strobe_get,
+};
+
+static const struct s2m_fled_spec s2mu005_fled_spec = {
+ .num_channels = 2,
+ .torch_max_brightness = 16,
+ .flash_min_current_ua = 25000,
+ .flash_max_current_ua = 375000, /* 400000 causes flickering */
+ .flash_min_timeout_us = 62000,
+ .flash_max_timeout_us = 992000,
+ .torch_brightness_set_blocking = s2mu005_fled_torch_brightness_set,
+ .flash_ops = &s2mu005_fled_flash_ops,
+};
+
+static int s2m_fled_init_channel(struct device *dev, struct fwnode_handle *fwnp,
+ struct s2m_fled *priv)
+{
+ struct led_classdev *led = &priv->cdev.led_cdev;
+ struct led_init_data init_data = {};
+ struct v4l2_flash_config v4l2_cfg = {};
+ int ret;
+
+ led->max_brightness = priv->spec->torch_max_brightness;
+ led->brightness_set_blocking = priv->spec->torch_brightness_set_blocking;
+ led->flags |= LED_DEV_CAP_FLASH;
+
+ priv->cdev.timeout.min = priv->spec->flash_min_timeout_us;
+ priv->cdev.timeout.step = priv->spec->flash_min_timeout_us;
+ priv->cdev.timeout.max = priv->spec->flash_max_timeout_us;
+ priv->cdev.timeout.val = priv->spec->flash_max_timeout_us;
+
+ priv->cdev.brightness.min = priv->spec->flash_min_current_ua;
+ priv->cdev.brightness.step = priv->spec->flash_min_current_ua;
+ priv->cdev.brightness.max = priv->spec->flash_max_current_ua;
+ priv->cdev.brightness.val = priv->spec->flash_max_current_ua;
+
+ s2m_fled_flash_timeout_set(&priv->cdev, priv->cdev.timeout.val);
+ s2m_fled_flash_brightness_set(&priv->cdev, priv->cdev.brightness.val);
+
+ priv->cdev.ops = priv->spec->flash_ops;
+
+ init_data.fwnode = fwnp;
+ ret = devm_led_classdev_flash_register_ext(dev, &priv->cdev, &init_data);
+ if (ret < 0) {
+ dev_err(dev, "failed to create LED flash device\n");
+ return ret;
+ }
+
+ v4l2_cfg.intensity.min = priv->spec->flash_min_current_ua;
+ v4l2_cfg.intensity.step = priv->spec->flash_min_current_ua;
+ v4l2_cfg.intensity.max = priv->spec->flash_max_current_ua;
+ v4l2_cfg.intensity.val = priv->spec->flash_max_current_ua;
+
+ v4l2_cfg.has_external_strobe = true;
+
+ priv->v4l2_flash = v4l2_flash_init(dev, fwnp, &priv->cdev,
+ &s2m_fled_v4l2_flash_ops, &v4l2_cfg);
+ if (IS_ERR(priv->v4l2_flash)) {
+ dev_err(dev, "failed to create V4L2 flash device\n");
+ v4l2_flash_release(priv->v4l2_flash);
+ return PTR_ERR(priv->v4l2_flash);
+ }
+
+ return devm_add_action_or_reset(dev, (void *)v4l2_flash_release,
+ priv->v4l2_flash);
+}
+
+static int s2m_fled_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct sec_pmic_dev *pmic_drvdata = dev_get_drvdata(dev->parent);
+ struct s2m_fled *priv;
+ struct fwnode_handle *child;
+ struct regmap *regmap;
+ const struct s2m_fled_spec *spec;
+ int ret;
+
+ priv = devm_kzalloc(dev, sizeof(*priv) * MAX_CHANNELS, GFP_KERNEL);
+ if (!priv)
+ return dev_err_probe(dev, -ENOMEM, "failed to allocate driver private\n");
+
+ platform_set_drvdata(pdev, priv);
+ regmap = pmic_drvdata->regmap_pmic;
+
+ switch (platform_get_device_id(pdev)->driver_data) {
+ case S2MU005:
+ spec = &s2mu005_fled_spec;
+ /* Enable the LED channels. */
+ ret = regmap_set_bits(regmap, S2MU005_REG_FLED_CTRL1,
+ S2MU005_FLED_CH_EN);
+ if (ret < 0)
+ return dev_err_probe(dev, ret, "failed to enable LED channels\n");
+ break;
+ default:
+ return dev_err_probe(dev, -ENODEV,
+ "device type %d is not supported by driver\n",
+ pmic_drvdata->device_type);
+ }
+
+ device_for_each_child_node(dev, child) {
+ u32 reg;
+
+ if (fwnode_property_read_u32(child, "reg", ®))
+ goto next_child;
+
+ if (reg >= spec->num_channels) {
+ dev_warn(dev, "channel %d is non-existent\n", reg);
+ goto next_child;
+ }
+
+ if (priv[reg].dev) {
+ dev_warn(dev, "duplicate node for channel %d\n", reg);
+ goto next_child;
+ }
+
+ priv[reg].dev = dev;
+ priv[reg].regmap = regmap;
+ priv[reg].channel = (u8)reg;
+ priv[reg].spec = spec;
+ priv[reg].pmic_revision = pmic_drvdata->revision;
+
+ ret = devm_mutex_init(dev, &priv[reg].lock);
+ if (ret)
+ return dev_err_probe(dev, ret, "failed to create mutex lock\n");
+
+ ret = s2m_fled_init_channel(dev, child, &priv[reg]);
+ if (ret < 0)
+ dev_warn(dev, "channel init failed (%d)\n", ret);
+
+next_child:
+ fwnode_handle_put(child);
+ }
+
+ return 0;
+}
+
+static const struct platform_device_id s2m_fled_id_table[] = {
+ { "s2mu005-flash", S2MU005 },
+ { /* sentinel */ },
+};
+MODULE_DEVICE_TABLE(platform, s2m_fled_id_table);
+
+#ifdef CONFIG_OF
+/*
+ * Device is instantiated through parent MFD device and device matching
+ * is done through platform_device_id.
+ *
+ * However if device's DT node contains proper compatible and driver is
+ * built as a module, then the *module* matching will be done through DT
+ * aliases. This requires of_device_id table. In the same time this will
+ * not change the actual *device* matching so do not add .of_match_table.
+ */
+static const struct of_device_id s2m_fled_of_match_table[] = {
+ {
+ .compatible = "samsung,s2mu005-flash",
+ .data = (void *)S2MU005,
+ }, {
+ /* sentinel */
+ },
+};
+MODULE_DEVICE_TABLE(of, s2m_fled_of_match_table);
+#endif
+
+static struct platform_driver s2m_fled_driver = {
+ .driver = {
+ .name = "s2m-flash",
+ },
+ .probe = s2m_fled_probe,
+ .id_table = s2m_fled_id_table,
+};
+module_platform_driver(s2m_fled_driver);
+
+MODULE_DESCRIPTION("Flash/Torch LED Driver For Samsung S2M Series PMICs");
+MODULE_AUTHOR("Kaustabh Chakraborty <kauschluss@disroot.org>");
+MODULE_LICENSE("GPL");
--
2.51.2
^ permalink raw reply related
* [PATCH 08/13] mfd: sec: store hardware revision in sec_pmic_dev and add S2MU005 support
From: Kaustabh Chakraborty @ 2025-11-13 19:05 UTC (permalink / raw)
To: Lee Jones, Pavel Machek, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, MyungJoo Ham, Chanwoo Choi, Sebastian Reichel,
Krzysztof Kozlowski, André Draszik, Alexandre Belloni,
Jonathan Corbet
Cc: linux-leds, devicetree, linux-kernel, linux-pm, linux-samsung-soc,
linux-rtc, linux-doc, Kaustabh Chakraborty
In-Reply-To: <20251114-s2mu005-pmic-v1-0-9e3184d3a0c9@disroot.org>
The device revision matters in cases when in some PMICs, the correct
register offsets very in different revisions. Instead of just debug
printing the value, store it in the driver data struct.
Unlike other devices, S2MU005 has its hardware revision ID in register
offset 0x73. Allow handling different devices and add support for S2MU005.
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
---
drivers/mfd/sec-common.c | 30 ++++++++++++++++++++++++------
include/linux/mfd/samsung/core.h | 3 +++
2 files changed, 27 insertions(+), 6 deletions(-)
diff --git a/drivers/mfd/sec-common.c b/drivers/mfd/sec-common.c
index 4c5f4dc2905b..f51c53e7a164 100644
--- a/drivers/mfd/sec-common.c
+++ b/drivers/mfd/sec-common.c
@@ -16,6 +16,7 @@
#include <linux/mfd/samsung/irq.h>
#include <linux/mfd/samsung/s2mps11.h>
#include <linux/mfd/samsung/s2mps13.h>
+#include <linux/mfd/samsung/s2mu005.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/pm.h>
@@ -86,17 +87,34 @@ static const struct mfd_cell s2mu005_devs[] = {
MFD_CELL_OF("s2mu005-rgb", NULL, NULL, 0, 0, "samsung,s2mu005-rgb"),
};
-static void sec_pmic_dump_rev(struct sec_pmic_dev *sec_pmic)
+static void sec_pmic_store_rev(struct sec_pmic_dev *sec_pmic)
{
- unsigned int val;
+ unsigned int reg, mask, shift;
/* For s2mpg1x, the revision is in a different regmap */
if (sec_pmic->device_type == S2MPG10)
return;
- /* For each device type, the REG_ID is always the first register */
- if (!regmap_read(sec_pmic->regmap_pmic, S2MPS11_REG_ID, &val))
- dev_dbg(sec_pmic->dev, "Revision: 0x%x\n", val);
+ switch (sec_pmic->device_type) {
+ case S2MU005:
+ reg = S2MU005_REG_ID;
+ mask = S2MU005_ID_MASK;
+ shift = S2MU005_ID_SHIFT;
+ break;
+ default:
+ /* For other device types, the REG_ID is always the first register. */
+ reg = S2MPS11_REG_ID;
+ mask = ~0;
+ shift = 0;
+ }
+
+ if (!regmap_read(sec_pmic->regmap_pmic, reg, &sec_pmic->revision))
+ return;
+
+ sec_pmic->revision &= mask;
+ sec_pmic->revision >>= shift;
+
+ dev_dbg(sec_pmic->dev, "Revision: 0x%x\n", sec_pmic->revision);
}
static void sec_pmic_configure(struct sec_pmic_dev *sec_pmic)
@@ -236,7 +254,7 @@ int sec_pmic_probe(struct device *dev, int device_type, unsigned int irq,
return ret;
sec_pmic_configure(sec_pmic);
- sec_pmic_dump_rev(sec_pmic);
+ sec_pmic_store_rev(sec_pmic);
return ret;
}
diff --git a/include/linux/mfd/samsung/core.h b/include/linux/mfd/samsung/core.h
index fc07f7944dcd..ccd1bfa15b85 100644
--- a/include/linux/mfd/samsung/core.h
+++ b/include/linux/mfd/samsung/core.h
@@ -63,6 +63,7 @@ enum sec_device_type {
* @irq_base: Base IRQ number for device, required for IRQs
* @irq: Generic IRQ number for device
* @irq_data: Runtime data structure for IRQ controller
+ * @revision: Revision number of the device
* @wakeup: Whether or not this is a wakeup device
*/
struct sec_pmic_dev {
@@ -74,6 +75,8 @@ struct sec_pmic_dev {
int device_type;
int irq;
struct regmap_irq_chip_data *irq_data[MAX_IRQ_CHIPS];
+
+ unsigned int revision;
};
struct sec_platform_data {
--
2.51.2
^ permalink raw reply related
* [PATCH 07/13] mfd: sec: add support for S2MU005 PMIC
From: Kaustabh Chakraborty @ 2025-11-13 19:05 UTC (permalink / raw)
To: Lee Jones, Pavel Machek, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, MyungJoo Ham, Chanwoo Choi, Sebastian Reichel,
Krzysztof Kozlowski, André Draszik, Alexandre Belloni,
Jonathan Corbet
Cc: linux-leds, devicetree, linux-kernel, linux-pm, linux-samsung-soc,
linux-rtc, linux-doc, Kaustabh Chakraborty
In-Reply-To: <20251114-s2mu005-pmic-v1-0-9e3184d3a0c9@disroot.org>
Samsung's S2MU005 PMIC includes subdevices for a charger, an MUIC (Micro
USB Interface Controller), and flash and RGB LED controllers.
S2MU005's interrupt registers can be properly divided into three regmap
IRQ chips, one each for the charger, flash LEDs, and the MUIC.
Add initial support for S2MU005 in the PMIC driver, along with it's three
interrupt chips.
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
---
drivers/mfd/sec-common.c | 11 ++
drivers/mfd/sec-i2c.c | 29 ++++
drivers/mfd/sec-irq.c | 71 ++++++++
include/linux/mfd/samsung/core.h | 3 +-
include/linux/mfd/samsung/irq.h | 80 +++++++++
include/linux/mfd/samsung/s2mu005.h | 328 ++++++++++++++++++++++++++++++++++++
6 files changed, 521 insertions(+), 1 deletion(-)
diff --git a/drivers/mfd/sec-common.c b/drivers/mfd/sec-common.c
index 42d55e70e34c..4c5f4dc2905b 100644
--- a/drivers/mfd/sec-common.c
+++ b/drivers/mfd/sec-common.c
@@ -79,6 +79,13 @@ static const struct mfd_cell s2mpu05_devs[] = {
MFD_CELL_NAME("s2mps15-rtc"),
};
+static const struct mfd_cell s2mu005_devs[] = {
+ MFD_CELL_OF("s2mu005-charger", NULL, NULL, 0, 0, "samsung,s2mu005-charger"),
+ MFD_CELL_OF("s2mu005-flash", NULL, NULL, 0, 0, "samsung,s2mu005-flash"),
+ MFD_CELL_OF("s2mu005-muic", NULL, NULL, 0, 0, "samsung,s2mu005-muic"),
+ MFD_CELL_OF("s2mu005-rgb", NULL, NULL, 0, 0, "samsung,s2mu005-rgb"),
+};
+
static void sec_pmic_dump_rev(struct sec_pmic_dev *sec_pmic)
{
unsigned int val;
@@ -214,6 +221,10 @@ int sec_pmic_probe(struct device *dev, int device_type, unsigned int irq,
sec_devs = s2mpu05_devs;
num_sec_devs = ARRAY_SIZE(s2mpu05_devs);
break;
+ case S2MU005:
+ sec_devs = s2mu005_devs;
+ num_sec_devs = ARRAY_SIZE(s2mu005_devs);
+ break;
default:
return dev_err_probe(sec_pmic->dev, -EINVAL,
"Unsupported device type %d\n",
diff --git a/drivers/mfd/sec-i2c.c b/drivers/mfd/sec-i2c.c
index 3132b849b4bc..bc5ad8b1c432 100644
--- a/drivers/mfd/sec-i2c.c
+++ b/drivers/mfd/sec-i2c.c
@@ -17,6 +17,7 @@
#include <linux/mfd/samsung/s2mps14.h>
#include <linux/mfd/samsung/s2mps15.h>
#include <linux/mfd/samsung/s2mpu02.h>
+#include <linux/mfd/samsung/s2mu005.h>
#include <linux/mfd/samsung/s5m8767.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
@@ -66,6 +67,19 @@ static bool s2mpu02_volatile(struct device *dev, unsigned int reg)
}
}
+static bool s2mu005_volatile(struct device *dev, unsigned int reg)
+{
+ switch (reg) {
+ case S2MU005_REG_CHGR_INT1M:
+ case S2MU005_REG_FLED_INT1M:
+ case S2MU005_REG_MUIC_INT1M:
+ case S2MU005_REG_MUIC_INT2M:
+ return false;
+ default:
+ return true;
+ }
+}
+
static const struct regmap_config s2dos05_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
@@ -130,6 +144,15 @@ static const struct regmap_config s2mpu05_regmap_config = {
.val_bits = 8,
};
+static const struct regmap_config s2mu005_regmap_config = {
+ .reg_bits = 8,
+ .val_bits = 8,
+
+ .max_register = S2MU005_REG_MUIC_LDOADC_H,
+ .volatile_reg = s2mu005_volatile,
+ .cache_type = REGCACHE_FLAT,
+};
+
static const struct regmap_config s5m8767_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
@@ -203,6 +226,11 @@ static const struct sec_pmic_i2c_platform_data s2mpu05_data = {
.device_type = S2MPU05,
};
+static const struct sec_pmic_i2c_platform_data s2mu005_data = {
+ .regmap_cfg = &s2mu005_regmap_config,
+ .device_type = S2MU005,
+};
+
static const struct sec_pmic_i2c_platform_data s5m8767_data = {
.regmap_cfg = &s5m8767_regmap_config,
.device_type = S5M8767X,
@@ -217,6 +245,7 @@ static const struct of_device_id sec_pmic_i2c_of_match[] = {
{ .compatible = "samsung,s2mps15-pmic", .data = &s2mps15_data, },
{ .compatible = "samsung,s2mpu02-pmic", .data = &s2mpu02_data, },
{ .compatible = "samsung,s2mpu05-pmic", .data = &s2mpu05_data, },
+ { .compatible = "samsung,s2mu005-pmic", .data = &s2mu005_data, },
{ .compatible = "samsung,s5m8767-pmic", .data = &s5m8767_data, },
{ },
};
diff --git a/drivers/mfd/sec-irq.c b/drivers/mfd/sec-irq.c
index 053c28f31ec9..fc82893fe6b7 100644
--- a/drivers/mfd/sec-irq.c
+++ b/drivers/mfd/sec-irq.c
@@ -15,6 +15,7 @@
#include <linux/mfd/samsung/s2mps14.h>
#include <linux/mfd/samsung/s2mpu02.h>
#include <linux/mfd/samsung/s2mpu05.h>
+#include <linux/mfd/samsung/s2mu005.h>
#include <linux/mfd/samsung/s5m8767.h>
#include <linux/regmap.h>
#include "sec-core.h"
@@ -158,6 +159,42 @@ static const struct regmap_irq s2mpu05_irqs[] = {
REGMAP_IRQ_REG(S2MPU05_IRQ_TSD, 2, S2MPU05_IRQ_TSD_MASK),
};
+static const struct regmap_irq s2mu005_chgr_irqs[] = {
+ REGMAP_IRQ_REG(S2MU005_CHGR_IRQ_DETBAT, 0, S2MU005_CHGR_IRQ_DETBAT_MASK),
+ REGMAP_IRQ_REG(S2MU005_CHGR_IRQ_BAT, 0, S2MU005_CHGR_IRQ_BAT_MASK),
+ REGMAP_IRQ_REG(S2MU005_CHGR_IRQ_IVR, 0, S2MU005_CHGR_IRQ_IVR_MASK),
+ REGMAP_IRQ_REG(S2MU005_CHGR_IRQ_EVENT, 0, S2MU005_CHGR_IRQ_EVENT_MASK),
+ REGMAP_IRQ_REG(S2MU005_CHGR_IRQ_CHG, 0, S2MU005_CHGR_IRQ_CHG_MASK),
+ REGMAP_IRQ_REG(S2MU005_CHGR_IRQ_VMID, 0, S2MU005_CHGR_IRQ_VMID_MASK),
+ REGMAP_IRQ_REG(S2MU005_CHGR_IRQ_WCIN, 0, S2MU005_CHGR_IRQ_WCIN_MASK),
+ REGMAP_IRQ_REG(S2MU005_CHGR_IRQ_VBUS, 0, S2MU005_CHGR_IRQ_VBUS_MASK),
+};
+
+static const struct regmap_irq s2mu005_fled_irqs[] = {
+ REGMAP_IRQ_REG(S2MU005_FLED_IRQ_LBPROT, 0, S2MU005_FLED_IRQ_LBPROT_MASK),
+ REGMAP_IRQ_REG(S2MU005_FLED_IRQ_OPENCH2, 0, S2MU005_FLED_IRQ_OPENCH2_MASK),
+ REGMAP_IRQ_REG(S2MU005_FLED_IRQ_OPENCH1, 0, S2MU005_FLED_IRQ_OPENCH1_MASK),
+ REGMAP_IRQ_REG(S2MU005_FLED_IRQ_SHORTCH2, 0, S2MU005_FLED_IRQ_SHORTCH2_MASK),
+ REGMAP_IRQ_REG(S2MU005_FLED_IRQ_SHORTCH1, 0, S2MU005_FLED_IRQ_SHORTCH1_MASK),
+};
+
+static const struct regmap_irq s2mu005_muic_irqs[] = {
+ REGMAP_IRQ_REG(S2MU005_MUIC_IRQ_ATTACH, 0, S2MU005_MUIC_IRQ_ATTACH_MASK),
+ REGMAP_IRQ_REG(S2MU005_MUIC_IRQ_DETACH, 0, S2MU005_MUIC_IRQ_DETACH_MASK),
+ REGMAP_IRQ_REG(S2MU005_MUIC_IRQ_KP, 0, S2MU005_MUIC_IRQ_KP_MASK),
+ REGMAP_IRQ_REG(S2MU005_MUIC_IRQ_LKP, 0, S2MU005_MUIC_IRQ_LKP_MASK),
+ REGMAP_IRQ_REG(S2MU005_MUIC_IRQ_LKR, 0, S2MU005_MUIC_IRQ_LKR_MASK),
+ REGMAP_IRQ_REG(S2MU005_MUIC_IRQ_RIDCHG, 0, S2MU005_MUIC_IRQ_RIDCHG_MASK),
+ REGMAP_IRQ_REG(S2MU005_MUIC_IRQ_VBUSON, 1, S2MU005_MUIC_IRQ_VBUSON_MASK),
+ REGMAP_IRQ_REG(S2MU005_MUIC_IRQ_RSVD, 1, S2MU005_MUIC_IRQ_RSVD_MASK),
+ REGMAP_IRQ_REG(S2MU005_MUIC_IRQ_ADC, 1, S2MU005_MUIC_IRQ_ADC_MASK),
+ REGMAP_IRQ_REG(S2MU005_MUIC_IRQ_STUCK, 1, S2MU005_MUIC_IRQ_STUCK_MASK),
+ REGMAP_IRQ_REG(S2MU005_MUIC_IRQ_STUCKRCV, 1, S2MU005_MUIC_IRQ_STUCKRCV_MASK),
+ REGMAP_IRQ_REG(S2MU005_MUIC_IRQ_MHDL, 1, S2MU005_MUIC_IRQ_MHDL_MASK),
+ REGMAP_IRQ_REG(S2MU005_MUIC_IRQ_AVCHG, 1, S2MU005_MUIC_IRQ_AVCHG_MASK),
+ REGMAP_IRQ_REG(S2MU005_MUIC_IRQ_VBUSOFF, 1, S2MU005_MUIC_IRQ_VBUSOFF_MASK),
+};
+
static const struct regmap_irq s5m8767_irqs[] = {
REGMAP_IRQ_REG(S5M8767_IRQ_PWRR, 0, S5M8767_IRQ_PWRR_MASK),
REGMAP_IRQ_REG(S5M8767_IRQ_PWRF, 0, S5M8767_IRQ_PWRF_MASK),
@@ -259,6 +296,36 @@ static const struct regmap_irq_chip s2mpu05_irq_chip[] = {
},
};
+static const struct regmap_irq_chip s2mu005_irq_chip[] = {
+ [S2MU005_CHGR_IRQ_CHIP] = {
+ .name = "s2mu005-chgr",
+ .irqs = s2mu005_chgr_irqs,
+ .num_irqs = ARRAY_SIZE(s2mu005_chgr_irqs),
+ .num_regs = 1,
+ .status_base = S2MU005_REG_CHGR_INT1,
+ .mask_base = S2MU005_REG_CHGR_INT1M,
+ .ack_base = S2MU005_REG_CHGR_INT1,
+ },
+ [S2MU005_FLED_IRQ_CHIP] = {
+ .name = "s2mu005-fled",
+ .irqs = s2mu005_fled_irqs,
+ .num_irqs = ARRAY_SIZE(s2mu005_fled_irqs),
+ .num_regs = 1,
+ .status_base = S2MU005_REG_FLED_INT1,
+ .mask_base = S2MU005_REG_FLED_INT1M,
+ .ack_base = S2MU005_REG_FLED_INT1,
+ },
+ [S2MU005_MUIC_IRQ_CHIP] = {
+ .name = "s2mu005-muic",
+ .irqs = s2mu005_muic_irqs,
+ .num_irqs = ARRAY_SIZE(s2mu005_muic_irqs),
+ .num_regs = 2,
+ .status_base = S2MU005_REG_MUIC_INT1,
+ .mask_base = S2MU005_REG_MUIC_INT1M,
+ .ack_base = S2MU005_REG_MUIC_INT1,
+ },
+};
+
static const struct regmap_irq_chip s5m8767_irq_chip[] = {
[S5M8767_IRQ_CHIP] = {
.name = "s5m8767",
@@ -315,6 +382,10 @@ int sec_irq_init(struct sec_pmic_dev *sec_pmic)
sec_irq_chip = s2mpu05_irq_chip;
sec_irq_chip_num = ARRAY_SIZE(s2mpu05_irq_chip);
break;
+ case S2MU005:
+ sec_irq_chip = s2mu005_irq_chip;
+ sec_irq_chip_num = ARRAY_SIZE(s2mu005_irq_chip);
+ break;
default:
return dev_err_probe(sec_pmic->dev, -EINVAL,
"Unsupported device type %d\n",
diff --git a/include/linux/mfd/samsung/core.h b/include/linux/mfd/samsung/core.h
index dcd741c4f0d6..fc07f7944dcd 100644
--- a/include/linux/mfd/samsung/core.h
+++ b/include/linux/mfd/samsung/core.h
@@ -34,7 +34,7 @@
#define STEP_6_25_MV 6250
/* Maximum number of IRQ chips in a PMIC */
-#define MAX_IRQ_CHIPS 1
+#define MAX_IRQ_CHIPS 3
struct gpio_desc;
@@ -49,6 +49,7 @@ enum sec_device_type {
S2MPS15X,
S2MPU02,
S2MPU05,
+ S2MU005,
};
/**
diff --git a/include/linux/mfd/samsung/irq.h b/include/linux/mfd/samsung/irq.h
index 78eb894e350e..b3a51b74aa59 100644
--- a/include/linux/mfd/samsung/irq.h
+++ b/include/linux/mfd/samsung/irq.h
@@ -309,6 +309,86 @@ enum s2mpu05_irq {
#define S2MPU05_IRQ_INT140C_MASK BIT(1)
#define S2MPU05_IRQ_TSD_MASK BIT(2)
+enum s2mu005_chgr_irq {
+ S2MU005_CHGR_IRQ_DETBAT,
+ S2MU005_CHGR_IRQ_BAT,
+ S2MU005_CHGR_IRQ_IVR,
+ S2MU005_CHGR_IRQ_EVENT,
+ S2MU005_CHGR_IRQ_CHG,
+ S2MU005_CHGR_IRQ_VMID,
+ S2MU005_CHGR_IRQ_WCIN,
+ S2MU005_CHGR_IRQ_VBUS,
+
+ S2MU005_CHGR_IRQ_NR,
+};
+
+#define S2MU005_CHGR_IRQ_CHIP 0
+
+#define S2MU005_CHGR_IRQ_DETBAT_MASK BIT(0)
+#define S2MU005_CHGR_IRQ_BAT_MASK BIT(1)
+#define S2MU005_CHGR_IRQ_IVR_MASK BIT(2)
+#define S2MU005_CHGR_IRQ_EVENT_MASK BIT(3)
+#define S2MU005_CHGR_IRQ_CHG_MASK BIT(4)
+#define S2MU005_CHGR_IRQ_VMID_MASK BIT(5)
+#define S2MU005_CHGR_IRQ_WCIN_MASK BIT(6)
+#define S2MU005_CHGR_IRQ_VBUS_MASK BIT(7)
+
+enum s2mu005_fled_irq {
+ S2MU005_FLED_IRQ_LBPROT,
+ S2MU005_FLED_IRQ_OPENCH2,
+ S2MU005_FLED_IRQ_OPENCH1,
+ S2MU005_FLED_IRQ_SHORTCH2,
+ S2MU005_FLED_IRQ_SHORTCH1,
+
+ S2MU005_FLED_IRQ_NR,
+};
+
+#define S2MU005_FLED_IRQ_CHIP 1
+
+#define S2MU005_FLED_IRQ_LBPROT_MASK BIT(2)
+#define S2MU005_FLED_IRQ_OPENCH2_MASK BIT(4)
+#define S2MU005_FLED_IRQ_OPENCH1_MASK BIT(5)
+#define S2MU005_FLED_IRQ_SHORTCH2_MASK BIT(6)
+#define S2MU005_FLED_IRQ_SHORTCH1_MASK BIT(7)
+
+enum s2mu005_muic_irq {
+ S2MU005_MUIC_IRQ_ATTACH,
+ S2MU005_MUIC_IRQ_DETACH,
+ S2MU005_MUIC_IRQ_KP,
+ S2MU005_MUIC_IRQ_LKP,
+ S2MU005_MUIC_IRQ_LKR,
+ S2MU005_MUIC_IRQ_RIDCHG,
+
+ S2MU005_MUIC_IRQ_VBUSON,
+ S2MU005_MUIC_IRQ_RSVD,
+ S2MU005_MUIC_IRQ_ADC,
+ S2MU005_MUIC_IRQ_STUCK,
+ S2MU005_MUIC_IRQ_STUCKRCV,
+ S2MU005_MUIC_IRQ_MHDL,
+ S2MU005_MUIC_IRQ_AVCHG,
+ S2MU005_MUIC_IRQ_VBUSOFF,
+
+ S2MU005_IRQ_NR,
+};
+
+#define S2MU005_MUIC_IRQ_CHIP 2
+
+#define S2MU005_MUIC_IRQ_ATTACH_MASK BIT(0)
+#define S2MU005_MUIC_IRQ_DETACH_MASK BIT(1)
+#define S2MU005_MUIC_IRQ_KP_MASK BIT(2)
+#define S2MU005_MUIC_IRQ_LKP_MASK BIT(3)
+#define S2MU005_MUIC_IRQ_LKR_MASK BIT(4)
+#define S2MU005_MUIC_IRQ_RIDCHG_MASK BIT(5)
+
+#define S2MU005_MUIC_IRQ_VBUSON_MASK BIT(0)
+#define S2MU005_MUIC_IRQ_RSVD_MASK BIT(1)
+#define S2MU005_MUIC_IRQ_ADC_MASK BIT(2)
+#define S2MU005_MUIC_IRQ_STUCK_MASK BIT(3)
+#define S2MU005_MUIC_IRQ_STUCKRCV_MASK BIT(4)
+#define S2MU005_MUIC_IRQ_MHDL_MASK BIT(5)
+#define S2MU005_MUIC_IRQ_AVCHG_MASK BIT(6)
+#define S2MU005_MUIC_IRQ_VBUSOFF_MASK BIT(7)
+
enum s5m8767_irq {
S5M8767_IRQ_PWRR,
S5M8767_IRQ_PWRF,
diff --git a/include/linux/mfd/samsung/s2mu005.h b/include/linux/mfd/samsung/s2mu005.h
new file mode 100644
index 000000000000..32ad35dda661
--- /dev/null
+++ b/include/linux/mfd/samsung/s2mu005.h
@@ -0,0 +1,328 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (c) 2015 Samsung Electronics Co., Ltd
+ * Copyright (c) 2025 Kaustabh Chakraborty <kauschluss@disroot.org>
+ */
+
+#ifndef __LINUX_MFD_S2MU005_H
+#define __LINUX_MFD_S2MU005_H
+
+#include <linux/bitfield.h>
+#include <linux/bits.h>
+
+/* S2MU005 registers */
+enum s2mu005_reg {
+ S2MU005_REG_CHGR_INT1,
+ S2MU005_REG_CHGR_INT1M,
+
+ S2MU005_REG_FLED_INT1,
+ S2MU005_REG_FLED_INT1M,
+
+ S2MU005_REG_MUIC_INT1,
+ S2MU005_REG_MUIC_INT2,
+ S2MU005_REG_MUIC_INT1M,
+ S2MU005_REG_MUIC_INT2M,
+
+ S2MU005_REG_CHGR_STATUS0,
+ S2MU005_REG_CHGR_STATUS1,
+ S2MU005_REG_CHGR_STATUS2,
+ S2MU005_REG_CHGR_STATUS3,
+ S2MU005_REG_CHGR_STATUS4,
+ S2MU005_REG_CHGR_STATUS5,
+ S2MU005_REG_CHGR_CTRL0,
+ S2MU005_REG_CHGR_CTRL1,
+ S2MU005_REG_CHGR_CTRL2,
+ S2MU005_REG_CHGR_CTRL3,
+ S2MU005_REG_CHGR_CTRL4,
+ S2MU005_REG_CHGR_CTRL5,
+ S2MU005_REG_CHGR_CTRL6,
+ S2MU005_REG_CHGR_CTRL7,
+ S2MU005_REG_CHGR_CTRL8,
+ S2MU005_REG_CHGR_CTRL9,
+ S2MU005_REG_CHGR_CTRL10,
+ S2MU005_REG_CHGR_CTRL11,
+ S2MU005_REG_CHGR_CTRL12,
+ S2MU005_REG_CHGR_CTRL13,
+ S2MU005_REG_CHGR_CTRL14,
+ S2MU005_REG_CHGR_CTRL15,
+ S2MU005_REG_CHGR_CTRL16,
+ S2MU005_REG_CHGR_CTRL17,
+ S2MU005_REG_CHGR_CTRL18,
+ S2MU005_REG_CHGR_CTRL19,
+ S2MU005_REG_CHGR_TEST0,
+ S2MU005_REG_CHGR_TEST1,
+ S2MU005_REG_CHGR_TEST2,
+ S2MU005_REG_CHGR_TEST3,
+ S2MU005_REG_CHGR_TEST4,
+ S2MU005_REG_CHGR_TEST5,
+ S2MU005_REG_CHGR_TEST6,
+ S2MU005_REG_CHGR_TEST7,
+ S2MU005_REG_CHGR_TEST8,
+ S2MU005_REG_CHGR_TEST9,
+ S2MU005_REG_CHGR_TEST10,
+
+ S2MU005_REG_FLED_STATUS,
+ S2MU005_REG_FLED_CH0_CTRL0,
+ S2MU005_REG_FLED_CH0_CTRL1,
+ S2MU005_REG_FLED_CH0_CTRL2,
+ S2MU005_REG_FLED_CH0_CTRL3,
+ S2MU005_REG_FLED_CH1_CTRL0,
+ S2MU005_REG_FLED_CH1_CTRL1,
+ S2MU005_REG_FLED_CH1_CTRL2,
+ S2MU005_REG_FLED_CH1_CTRL3,
+ S2MU005_REG_FLED_CTRL0,
+ S2MU005_REG_FLED_CTRL1,
+ S2MU005_REG_FLED_CTRL2,
+ S2MU005_REG_FLED_CTRL3,
+ S2MU005_REG_FLED_CTRL4,
+ S2MU005_REG_FLED_CTRL5,
+ S2MU005_REG_FLED_CTRL6,
+
+ S2MU005_REG_RGB_EN,
+ S2MU005_REG_RGB_CH0_CTRL,
+ S2MU005_REG_RGB_CH1_CTRL,
+ S2MU005_REG_RGB_CH2_CTRL,
+ S2MU005_REG_RGB_CH0_RAMP,
+ S2MU005_REG_RGB_CH0_STAY,
+ S2MU005_REG_RGB_CH1_RAMP,
+ S2MU005_REG_RGB_CH1_STAY,
+ S2MU005_REG_RGB_CH2_RAMP,
+ S2MU005_REG_RGB_CH2_STAY,
+ S2MU005_REG_RGB_TEST0,
+ S2MU005_REG_RGB_CTRL0,
+
+ S2MU005_REG_MUIC_ADC,
+ S2MU005_REG_MUIC_DEV1,
+ S2MU005_REG_MUIC_DEV2,
+ S2MU005_REG_MUIC_DEV3,
+ S2MU005_REG_MUIC_BUTTON1,
+ S2MU005_REG_MUIC_BUTTON2,
+ S2MU005_REG_MUIC_RESET,
+ S2MU005_REG_MUIC_CHGTYPE,
+ S2MU005_REG_MUIC_DEVAPPLE,
+ S2MU005_REG_MUIC_BCDRESCAN,
+ S2MU005_REG_MUIC_TEST1,
+ S2MU005_REG_MUIC_TEST2,
+ S2MU005_REG_MUIC_TEST3,
+
+ S2MU005_REG_ID = 0x73,
+
+ S2MU005_REG_MUIC_CTRL1 = 0xb2,
+ S2MU005_REG_MUIC_TIMERSET1,
+ S2MU005_REG_MUIC_TIMERSET2,
+ S2MU005_REG_MUIC_SWCTRL,
+ S2MU005_REG_MUIC_TIMERSET3,
+ S2MU005_REG_MUIC_CTRL2,
+ S2MU005_REG_MUIC_CTRL3,
+
+ S2MU005_REG_MUIC_LDOADC_L = 0xbf,
+ S2MU005_REG_MUIC_LDOADC_H,
+};
+
+#define S2MU005_REG_FLED_CH_CTRL0(x) (S2MU005_REG_FLED_CH0_CTRL0 + 4 * (x))
+#define S2MU005_REG_FLED_CH_CTRL1(x) (S2MU005_REG_FLED_CH0_CTRL1 + 4 * (x))
+#define S2MU005_REG_FLED_CH_CTRL2(x) (S2MU005_REG_FLED_CH0_CTRL2 + 4 * (x))
+#define S2MU005_REG_FLED_CH_CTRL3(x) (S2MU005_REG_FLED_CH0_CTRL3 + 4 * (x))
+
+#define S2MU005_REG_RGB_CH_CTRL(x) (S2MU005_REG_RGB_CH0_CTRL + 1 * (x))
+#define S2MU005_REG_RGB_CH_RAMP(x) (S2MU005_REG_RGB_CH0_RAMP + 2 * (x))
+#define S2MU005_REG_RGB_CH_STAY(x) (S2MU005_REG_RGB_CH0_STAY + 2 * (x))
+
+/* S2MU005_REG_CHGR_STATUS0 */
+#define S2MU005_CHGR_VBUS BIT(7)
+#define S2MU005_CHGR_WCIN BIT(6)
+#define S2MU005_CHGR_VMID BIT(5)
+#define S2MU005_CHGR_CHG BIT(4)
+#define S2MU005_CHGR_STAT GENMASK(3, 0)
+
+#define S2MU005_CHGR_STAT_DONE FIELD_PREP(S2MU005_CHGR_STAT, 8)
+#define S2MU005_CHGR_STAT_TOPOFF FIELD_PREP(S2MU005_CHGR_STAT, 7)
+#define S2MU005_CHGR_STAT_DONE_FLAG FIELD_PREP(S2MU005_CHGR_STAT, 6)
+#define S2MU005_CHGR_STAT_CV FIELD_PREP(S2MU005_CHGR_STAT, 5)
+#define S2MU005_CHGR_STAT_CC FIELD_PREP(S2MU005_CHGR_STAT, 4)
+#define S2MU005_CHGR_STAT_COOL_CHG FIELD_PREP(S2MU005_CHGR_STAT, 3)
+#define S2MU005_CHGR_STAT_PRE_CHG FIELD_PREP(S2MU005_CHGR_STAT, 2)
+
+/* S2MU005_REG_CHGR_STATUS1 */
+#define S2MU005_CHGR_DETBAT BIT(7)
+#define S2MU005_CHGR_VBUSOVP GENMASK(6, 4)
+
+#define S2MU005_CHGR_VBUS_OVP_OVERVOLT FIELD_PREP(S2MU005_CHGR_OVP, 2)
+
+/* S2MU005_REG_CHGR_STATUS2 */
+#define S2MU005_CHGR_BAT GENMASK(6, 4)
+
+#define S2MU005_CHGR_BAT_VOLT_DET FIELD_PREP(S2MU005_CHGR_BAT, 7)
+#define S2MU005_CHGR_BAT_FAST_CHG_DET FIELD_PREP(S2MU005_CHGR_BAT, 6)
+#define S2MU005_CHGR_BAT_COOL_CHG_DET FIELD_PREP(S2MU005_CHGR_BAT, 5)
+#define S2MU005_CHGR_BAT_LOW_CHG FIELD_PREP(S2MU005_CHGR_BAT, 2)
+#define S2MU005_CHGR_BAT_SELF_DISCHG FIELD_PREP(S2MU005_CHGR_BAT, 1)
+#define S2MU005_CHGR_BAT_OVP_DET FIELD_PREP(S2MU005_CHGR_BAT, 0)
+
+/* S2MU005_REG_CHGR_STATUS3 */
+#define S2MU005_CHGR_EVT GENMASK(3, 0)
+
+#define S2MU005_CHGR_EVT_WDT_RST FIELD_PREP(S2MU005_CHGR_EVT, 6)
+#define S2MU005_CHGR_EVT_WDT_SUSP FIELD_PREP(S2MU005_CHGR_EVT, 5)
+#define S2MU005_CHGR_EVT_VSYS_VUVLO FIELD_PREP(S2MU005_CHGR_EVT, 4)
+#define S2MU005_CHGR_EVT_VSYS_VOVP FIELD_PREP(S2MU005_CHGR_EVT, 3)
+#define S2MU005_CHGR_EVT_THERM_FOLDBACK FIELD_PREP(S2MU005_CHGR_EVT, 2)
+#define S2MU005_CHGR_EVT_THERM_SHUTDOWN FIELD_PREP(S2MU005_CHGR_EVT, 1)
+
+/* S2MU005_REG_CHGR_CTRL0 */
+#define S2MU005_CHGR_CHG_EN BIT(4)
+#define S2MU005_CHGR_OP_MODE GENMASK(2, 0)
+
+#define S2MU005_CHGR_OP_MODE_OTG FIELD_PREP(S2MU005_CHGR_OP_MODE, BIT(2))
+#define S2MU005_CHGR_OP_MODE_CHG FIELD_PREP(S2MU005_CHGR_OP_MODE, BIT(1))
+
+/* S2MU005_REG_CHGR_CTRL1 */
+#define S2MU005_CHGR_VIN_DROP GENMASK(6, 4)
+
+/* S2MU005_REG_CHGR_CTRL2 */
+#define S2MU005_CHGR_IN_CURR_LIM GENMASK(5, 0)
+
+/* S2MU005_REG_CHGR_CTRL4 */
+#define S2MU005_CHGR_OTG_OCP_ON BIT(5)
+#define S2MU005_CHGR_OTG_OCP_OFF BIT(4)
+#define S2MU005_CHGR_OTG_OCP GENMASK(3, 2)
+
+/* S2MU005_REG_CHGR_CTRL5 */
+#define S2MU005_CHGR_VMID_BOOST GENMASK(4, 0)
+
+/* S2MU005_REG_CHGR_CTRL6 */
+#define S2MU005_CHGR_COOL_CHG_CURR GENMASK(5, 0)
+
+/* S2MU005_REG_CHGR_CTRL7 */
+#define S2MU005_CHGR_FAST_CHG_CURR GENMASK(5, 0)
+
+/* S2MU005_REG_CHGR_CTRL8 */
+#define S2MU005_CHGR_VF_VBAT GENMASK(6, 1)
+
+/* S2MU005_REG_CHGR_CTRL10 */
+#define S2MU005_CHGR_TOPOFF_CURR(x) (GENMASK(3, 0) << 4 * (x))
+
+/* S2MU005_REG_CHGR_CTRL11 */
+#define S2MU005_CHGR_OSC_BOOST GENMASK(6, 5)
+#define S2MU005_CHGR_OSC_BUCK GENMASK(4, 3)
+
+/* S2MU005_REG_CHGR_CTRL12 */
+#define S2MU005_CHGR_WDT GENMASK(2, 0)
+
+#define S2MU005_CHGR_WDT_ON FIELD_PREP(S2MU005_CHGR_WDT, BIT(2))
+#define S2MU005_CHGR_WDT_OFF FIELD_PREP(S2MU005_CHGR_WDT, BIT(1))
+
+/* S2MU005_REG_CHGR_CTRL15 */
+#define S2MU005_CHGR_OTG_EN GENMASK(3, 2)
+
+/* S2MU005_REG_FLED_STATUS */
+#define S2MU005_FLED_FLASH_STATUS(x) (BIT(7) >> 2 * (x))
+#define S2MU005_FLED_TORCH_STATUS(x) (BIT(6) >> 2 * (x))
+
+/* S2MU005_REG_FLED_CHx_CTRL0 */
+#define S2MU005_FLED_FLASH_IOUT GENMASK(3, 0)
+
+/* S2MU005_REG_FLED_CHx_CTRL1 */
+#define S2MU005_FLED_TORCH_IOUT GENMASK(3, 0)
+
+/* S2MU005_REG_FLED_CHx_CTRL2 */
+#define S2MU005_FLED_TORCH_TIMEOUT GENMASK(3, 0)
+
+/* S2MU005_REG_FLED_CHx_CTRL3 */
+#define S2MU005_FLED_FLASH_TIMEOUT GENMASK(3, 0)
+
+/* S2MU005_REG_FLED_CTRL1 */
+#define S2MU005_FLED_CH_EN BIT(7)
+
+/*
+ * S2MU005_REG_FLED_CTRL4 - Rev. EVT0
+ * S2MU005_REG_FLED_CTRL6 - Rev. EVT1 and later
+ */
+#define S2MU005_FLED_FLASH_EN(x) (GENMASK(7, 6) >> 4 * (x))
+#define S2MU005_FLED_TORCH_EN(x) (GENMASK(5, 4) >> 4 * (x))
+
+/* S2MU005_REG_RGB_EN */
+#define S2MU005_RGB_RESET BIT(6)
+#define S2MU005_RGB_SLOPE GENMASK(5, 0)
+
+#define S2MU005_RGB_SLOPE_CONST (BIT(4) | BIT(2) | BIT(0))
+#define S2MU005_RGB_SLOPE_SMOOTH (BIT(5) | BIT(3) | BIT(1))
+
+/* S2MU005_REG_RGB_CHx_RAMP */
+#define S2MU005_RGB_CH_RAMP_UP GENMASK(7, 4)
+#define S2MU005_RGB_CH_RAMP_DN GENMASK(3, 0)
+
+/* S2MU005_REG_RGB_CHx_STAY */
+#define S2MU005_RGB_CH_STAY_HI GENMASK(7, 4)
+#define S2MU005_RGB_CH_STAY_LO GENMASK(3, 0)
+
+/* S2MU005_REG_MUIC_DEV1 */
+#define S2MU005_MUIC_OTG BIT(7)
+#define S2MU005_MUIC_DCP BIT(6)
+#define S2MU005_MUIC_CDP BIT(5)
+#define S2MU005_MUIC_T1_T2_CHG BIT(4)
+#define S2MU005_MUIC_UART BIT(3)
+#define S2MU005_MUIC_SDP BIT(2)
+#define S2MU005_MUIC_LANHUB BIT(1)
+#define S2MU005_MUIC_AUDIO BIT(0)
+
+/* S2MU005_REG_MUIC_DEV2 */
+#define S2MU005_MUIC_SDP_1P8S BIT(7)
+#define S2MU005_MUIC_AV BIT(6)
+#define S2MU005_MUIC_TTY BIT(5)
+#define S2MU005_MUIC_PPD BIT(4)
+#define S2MU005_MUIC_JIG_UART_OFF BIT(3)
+#define S2MU005_MUIC_JIG_UART_ON BIT(2)
+#define S2MU005_MUIC_JIG_USB_OFF BIT(1)
+#define S2MU005_MUIC_JIG_USB_ON BIT(0)
+
+/* S2MU005_REG_MUIC_DEV3 */
+#define S2MU005_MUIC_U200_CHG BIT(7)
+#define S2MU005_MUIC_VBUS_AV BIT(4)
+#define S2MU005_MUIC_VBUS_R255 BIT(1)
+#define S2MU005_MUIC_MHL BIT(0)
+
+/* S2MU005_REG_MUIC_DEVAPPLE */
+#define S2MU005_MUIC_APPLE_CHG_0P5A BIT(7)
+#define S2MU005_MUIC_APPLE_CHG_1P0A BIT(6)
+#define S2MU005_MUIC_APPLE_CHG_2P0A BIT(5)
+#define S2MU005_MUIC_APPLE_CHG_2P4A BIT(4)
+#define S2MU005_MUIC_SDP_DCD_OUT BIT(3)
+#define S2MU005_MUIC_RID_WAKEUP BIT(2)
+#define S2MU005_MUIC_VBUS_WAKEUP BIT(1)
+#define S2MU005_MUIC_BCV1P2_OR_OPEN BIT(0)
+
+/* S2MU005_REG_ID */
+#define S2MU005_ID_MASK GENMASK(3, 0)
+#define S2MU005_ID_SHIFT 0
+
+/* S2MU005_REG_MUIC_SWCTRL */
+#define S2MU005_MUIC_DM_DP GENMASK(7, 2)
+#define S2MU005_MUIC_JIG BIT(0)
+
+#define S2MU005_MUIC_DM_DP_UART FIELD_PREP(S2MU005_MUIC_DM_DP, 0x12)
+#define S2MU005_MUIC_DM_DP_USB FIELD_PREP(S2MU005_MUIC_DM_DP, 0x09)
+
+/* S2MU005_REG_MUIC_CTRL1 */
+#define S2MU005_MUIC_OPEN BIT(4)
+#define S2MU005_MUIC_RAW_DATA BIT(3)
+#define S2MU005_MUIC_MAN_SW BIT(2)
+#define S2MU005_MUIC_WAIT BIT(1)
+#define S2MU005_MUIC_IRQ BIT(0)
+
+/* S2MU005_REG_MUIC_CTRL3 */
+#define S2MU005_MUIC_ONESHOT_ADC BIT(2)
+
+/* S2MU005_REG_MUIC_LDOADC_L and S2MU005_REG_MUIC_LDOADC_H */
+#define S2MU005_MUIC_VSET GENMASK(4, 0)
+
+#define S2MU005_MUIC_VSET_3P0V FIELD_PREP(S2MU005_MUIC_VSET, 0x1f)
+#define S2MU005_MUIC_VSET_2P6V FIELD_PREP(S2MU005_MUIC_VSET, 0x0e)
+#define S2MU005_MUIC_VSET_2P4V FIELD_PREP(S2MU005_MUIC_VSET, 0x0c)
+#define S2MU005_MUIC_VSET_2P2V FIELD_PREP(S2MU005_MUIC_VSET, 0x0a)
+#define S2MU005_MUIC_VSET_2P0V FIELD_PREP(S2MU005_MUIC_VSET, 0x08)
+#define S2MU005_MUIC_VSET_1P5V FIELD_PREP(S2MU005_MUIC_VSET, 0x03)
+#define S2MU005_MUIC_VSET_1P4V FIELD_PREP(S2MU005_MUIC_VSET, 0x02)
+#define S2MU005_MUIC_VSET_1P2V FIELD_PREP(S2MU005_MUIC_VSET, 0x00)
+
+#endif /* __LINUX_MFD_S2MU005_H */
--
2.51.2
^ permalink raw reply related
* [PATCH 06/13] mfd: sec-irq: add support for creating multiple IRQ chips
From: Kaustabh Chakraborty @ 2025-11-13 19:05 UTC (permalink / raw)
To: Lee Jones, Pavel Machek, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, MyungJoo Ham, Chanwoo Choi, Sebastian Reichel,
Krzysztof Kozlowski, André Draszik, Alexandre Belloni,
Jonathan Corbet
Cc: linux-leds, devicetree, linux-kernel, linux-pm, linux-samsung-soc,
linux-rtc, linux-doc, Kaustabh Chakraborty
In-Reply-To: <20251114-s2mu005-pmic-v1-0-9e3184d3a0c9@disroot.org>
The current state of the driver only allows creating only one IRQ chip
per PMIC. On some PMICs, such as Samsung's S2MU005, there are multiple
interrupt blocks, for which the current implementation stands insufficient.
Add support for creating multiple IRQ chips for a PMIC. Every IRQ chip is
given it's own index, which is used by sub-device drivers to request IRQs.
A macro is defined which states the maximum number of chips supported.
It's set to 1 as currently, no PMIC requires more than one IRQ chip. The
value must be changed accordingly on adding new PMICs requiring multiple
IRQ chips.
Moreover, adjust the s5m RTC driver to initialize IRQs with the
appropriate IRQ chip index.
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
---
drivers/mfd/sec-irq.c | 163 +++++++++++++++++++++++----------------
drivers/rtc/rtc-s5m.c | 15 +++-
include/linux/mfd/samsung/core.h | 5 +-
include/linux/mfd/samsung/irq.h | 14 ++++
4 files changed, 127 insertions(+), 70 deletions(-)
diff --git a/drivers/mfd/sec-irq.c b/drivers/mfd/sec-irq.c
index c5c80b1ba104..053c28f31ec9 100644
--- a/drivers/mfd/sec-irq.c
+++ b/drivers/mfd/sec-irq.c
@@ -181,25 +181,31 @@ static const struct regmap_irq s5m8767_irqs[] = {
};
/* All S2MPG10 interrupt sources are read-only and don't require clearing */
-static const struct regmap_irq_chip s2mpg10_irq_chip = {
- .name = "s2mpg10",
- .irqs = s2mpg10_irqs,
- .num_irqs = ARRAY_SIZE(s2mpg10_irqs),
- .num_regs = 6,
- .status_base = S2MPG10_PMIC_INT1,
- .mask_base = S2MPG10_PMIC_INT1M,
+static const struct regmap_irq_chip s2mpg10_irq_chip[] = {
+ [S2MPG10_IRQ_CHIP] = {
+ .name = "s2mpg10",
+ .irqs = s2mpg10_irqs,
+ .num_irqs = ARRAY_SIZE(s2mpg10_irqs),
+ .num_regs = 6,
+ .status_base = S2MPG10_PMIC_INT1,
+ .mask_base = S2MPG10_PMIC_INT1M,
+ },
};
-static const struct regmap_irq_chip s2mps11_irq_chip = {
- .name = "s2mps11",
- .irqs = s2mps11_irqs,
- .num_irqs = ARRAY_SIZE(s2mps11_irqs),
- .num_regs = 3,
- .status_base = S2MPS11_REG_INT1,
- .mask_base = S2MPS11_REG_INT1M,
- .ack_base = S2MPS11_REG_INT1,
+static const struct regmap_irq_chip s2mps11_irq_chip[] = {
+ [S2MPS11_IRQ_CHIP] = {
+ .name = "s2mps11",
+ .irqs = s2mps11_irqs,
+ .num_irqs = ARRAY_SIZE(s2mps11_irqs),
+ .num_regs = 3,
+ .status_base = S2MPS11_REG_INT1,
+ .mask_base = S2MPS11_REG_INT1M,
+ .ack_base = S2MPS11_REG_INT1,
+ },
};
+#define S2MPS1X_IRQ_CHIP S2MPS14_IRQ_CHIP
+
#define S2MPS1X_IRQ_CHIP_COMMON_DATA \
.irqs = s2mps14_irqs, \
.num_irqs = ARRAY_SIZE(s2mps14_irqs), \
@@ -208,85 +214,106 @@ static const struct regmap_irq_chip s2mps11_irq_chip = {
.mask_base = S2MPS14_REG_INT1M, \
.ack_base = S2MPS14_REG_INT1 \
-static const struct regmap_irq_chip s2mps13_irq_chip = {
- .name = "s2mps13",
- S2MPS1X_IRQ_CHIP_COMMON_DATA,
+static const struct regmap_irq_chip s2mps13_irq_chip[] = {
+ [S2MPS1X_IRQ_CHIP] = {
+ .name = "s2mps13",
+ S2MPS1X_IRQ_CHIP_COMMON_DATA,
+ },
};
-static const struct regmap_irq_chip s2mps14_irq_chip = {
- .name = "s2mps14",
- S2MPS1X_IRQ_CHIP_COMMON_DATA,
+static const struct regmap_irq_chip s2mps14_irq_chip[] = {
+ [S2MPS1X_IRQ_CHIP] = {
+ .name = "s2mps14",
+ S2MPS1X_IRQ_CHIP_COMMON_DATA,
+ },
};
-static const struct regmap_irq_chip s2mps15_irq_chip = {
- .name = "s2mps15",
- S2MPS1X_IRQ_CHIP_COMMON_DATA,
+static const struct regmap_irq_chip s2mps15_irq_chip[] = {
+ [S2MPS1X_IRQ_CHIP] = {
+ .name = "s2mps15",
+ S2MPS1X_IRQ_CHIP_COMMON_DATA,
+ },
};
-static const struct regmap_irq_chip s2mpu02_irq_chip = {
- .name = "s2mpu02",
- .irqs = s2mpu02_irqs,
- .num_irqs = ARRAY_SIZE(s2mpu02_irqs),
- .num_regs = 3,
- .status_base = S2MPU02_REG_INT1,
- .mask_base = S2MPU02_REG_INT1M,
- .ack_base = S2MPU02_REG_INT1,
+static const struct regmap_irq_chip s2mpu02_irq_chip[] = {
+ [S2MPU02_IRQ_CHIP] = {
+ .name = "s2mpu02",
+ .irqs = s2mpu02_irqs,
+ .num_irqs = ARRAY_SIZE(s2mpu02_irqs),
+ .num_regs = 3,
+ .status_base = S2MPU02_REG_INT1,
+ .mask_base = S2MPU02_REG_INT1M,
+ .ack_base = S2MPU02_REG_INT1,
+ },
};
-static const struct regmap_irq_chip s2mpu05_irq_chip = {
- .name = "s2mpu05",
- .irqs = s2mpu05_irqs,
- .num_irqs = ARRAY_SIZE(s2mpu05_irqs),
- .num_regs = 3,
- .status_base = S2MPU05_REG_INT1,
- .mask_base = S2MPU05_REG_INT1M,
- .ack_base = S2MPU05_REG_INT1,
+static const struct regmap_irq_chip s2mpu05_irq_chip[] = {
+ [S2MPU05_IRQ_CHIP] = {
+ .name = "s2mpu05",
+ .irqs = s2mpu05_irqs,
+ .num_irqs = ARRAY_SIZE(s2mpu05_irqs),
+ .num_regs = 3,
+ .status_base = S2MPU05_REG_INT1,
+ .mask_base = S2MPU05_REG_INT1M,
+ .ack_base = S2MPU05_REG_INT1,
+ },
};
-static const struct regmap_irq_chip s5m8767_irq_chip = {
- .name = "s5m8767",
- .irqs = s5m8767_irqs,
- .num_irqs = ARRAY_SIZE(s5m8767_irqs),
- .num_regs = 3,
- .status_base = S5M8767_REG_INT1,
- .mask_base = S5M8767_REG_INT1M,
- .ack_base = S5M8767_REG_INT1,
+static const struct regmap_irq_chip s5m8767_irq_chip[] = {
+ [S5M8767_IRQ_CHIP] = {
+ .name = "s5m8767",
+ .irqs = s5m8767_irqs,
+ .num_irqs = ARRAY_SIZE(s5m8767_irqs),
+ .num_regs = 3,
+ .status_base = S5M8767_REG_INT1,
+ .mask_base = S5M8767_REG_INT1M,
+ .ack_base = S5M8767_REG_INT1,
+ },
};
int sec_irq_init(struct sec_pmic_dev *sec_pmic)
{
const struct regmap_irq_chip *sec_irq_chip;
- int ret;
+ int sec_irq_chip_num, i, ret;
switch (sec_pmic->device_type) {
case S5M8767X:
- sec_irq_chip = &s5m8767_irq_chip;
+ sec_irq_chip = s5m8767_irq_chip;
+ sec_irq_chip_num = ARRAY_SIZE(s5m8767_irq_chip);
break;
case S2DOS05:
return 0;
case S2MPA01:
- sec_irq_chip = &s2mps14_irq_chip;
+ sec_irq_chip = s2mps14_irq_chip;
+ sec_irq_chip_num = ARRAY_SIZE(s2mps14_irq_chip);
break;
case S2MPG10:
- sec_irq_chip = &s2mpg10_irq_chip;
+ sec_irq_chip = s2mpg10_irq_chip;
+ sec_irq_chip_num = ARRAY_SIZE(s2mpg10_irq_chip);
break;
case S2MPS11X:
- sec_irq_chip = &s2mps11_irq_chip;
+ sec_irq_chip = s2mps11_irq_chip;
+ sec_irq_chip_num = ARRAY_SIZE(s2mps11_irq_chip);
break;
case S2MPS13X:
- sec_irq_chip = &s2mps13_irq_chip;
+ sec_irq_chip = s2mps13_irq_chip;
+ sec_irq_chip_num = ARRAY_SIZE(s2mps13_irq_chip);
break;
case S2MPS14X:
- sec_irq_chip = &s2mps14_irq_chip;
+ sec_irq_chip = s2mps14_irq_chip;
+ sec_irq_chip_num = ARRAY_SIZE(s2mps14_irq_chip);
break;
case S2MPS15X:
- sec_irq_chip = &s2mps15_irq_chip;
+ sec_irq_chip = s2mps15_irq_chip;
+ sec_irq_chip_num = ARRAY_SIZE(s2mps15_irq_chip);
break;
case S2MPU02:
- sec_irq_chip = &s2mpu02_irq_chip;
+ sec_irq_chip = s2mpu02_irq_chip;
+ sec_irq_chip_num = ARRAY_SIZE(s2mpu02_irq_chip);
break;
case S2MPU05:
- sec_irq_chip = &s2mpu05_irq_chip;
+ sec_irq_chip = s2mpu05_irq_chip;
+ sec_irq_chip_num = ARRAY_SIZE(s2mpu05_irq_chip);
break;
default:
return dev_err_probe(sec_pmic->dev, -EINVAL,
@@ -300,13 +327,19 @@ int sec_irq_init(struct sec_pmic_dev *sec_pmic)
return 0;
}
- ret = devm_regmap_add_irq_chip(sec_pmic->dev, sec_pmic->regmap_pmic,
- sec_pmic->irq, IRQF_ONESHOT,
- 0, sec_irq_chip, &sec_pmic->irq_data);
- if (ret)
- return dev_err_probe(sec_pmic->dev, ret,
- "Failed to add %s IRQ chip\n",
- sec_irq_chip->name);
+ for (i = 0; i < sec_irq_chip_num; i++) {
+ ret = devm_regmap_add_irq_chip(sec_pmic->dev,
+ sec_pmic->regmap_pmic,
+ sec_pmic->irq,
+ IRQF_ONESHOT | IRQF_SHARED, 0,
+ sec_irq_chip + i,
+ sec_pmic->irq_data + i);
+ if (ret) {
+ return dev_err_probe(sec_pmic->dev, ret,
+ "Failed to add %s IRQ chip\n",
+ sec_irq_chip->name);
+ }
+ }
/*
* The rtc-s5m driver requests S2MPS14_IRQ_RTCA0 also for S2MPS11
diff --git a/drivers/rtc/rtc-s5m.c b/drivers/rtc/rtc-s5m.c
index a7220b4d0e8d..726915deff7a 100644
--- a/drivers/rtc/rtc-s5m.c
+++ b/drivers/rtc/rtc-s5m.c
@@ -668,7 +668,7 @@ static int s5m_rtc_probe(struct platform_device *pdev)
enum sec_device_type device_type =
platform_get_device_id(pdev)->driver_data;
struct s5m_rtc_info *info;
- int ret, alarm_irq;
+ int ret, alarm_irq, irq_chip;
info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
if (!info)
@@ -684,21 +684,25 @@ static int s5m_rtc_probe(struct platform_device *pdev)
regmap_cfg = &s2mps14_rtc_regmap_config;
info->regs = &s2mps15_rtc_regs;
alarm_irq = S2MPS14_IRQ_RTCA0;
+ irq_chip = S2MPS11_IRQ_CHIP;
break;
case S2MPS14X:
regmap_cfg = &s2mps14_rtc_regmap_config;
info->regs = &s2mps14_rtc_regs;
alarm_irq = S2MPS14_IRQ_RTCA0;
+ irq_chip = S2MPS14_IRQ_CHIP;
break;
case S2MPS13X:
regmap_cfg = &s2mps14_rtc_regmap_config;
info->regs = &s2mps13_rtc_regs;
alarm_irq = S2MPS14_IRQ_RTCA0;
+ irq_chip = S2MPS14_IRQ_CHIP;
break;
case S5M8767X:
regmap_cfg = &s5m_rtc_regmap_config;
info->regs = &s5m_rtc_regs;
alarm_irq = S5M8767_IRQ_RTCA1;
+ irq_chip = S5M8767_IRQ_CHIP;
break;
default:
return dev_err_probe(&pdev->dev, -ENODEV,
@@ -720,6 +724,7 @@ static int s5m_rtc_probe(struct platform_device *pdev)
} else if (device_type == S2MPG10) {
info->regs = &s2mpg10_rtc_regs;
alarm_irq = S2MPG10_IRQ_RTCA0;
+ irq_chip = S2MPG10_IRQ_CHIP;
} else {
return dev_err_probe(&pdev->dev, -ENODEV,
"Unsupported device type %d\n",
@@ -730,12 +735,14 @@ static int s5m_rtc_probe(struct platform_device *pdev)
info->s5m87xx = s5m87xx;
info->device_type = device_type;
- if (s5m87xx->irq_data) {
- info->irq = regmap_irq_get_virq(s5m87xx->irq_data, alarm_irq);
- if (info->irq <= 0)
+ if (s5m87xx->irq_data[irq_chip]) {
+ info->irq = regmap_irq_get_virq(s5m87xx->irq_data[irq_chip],
+ alarm_irq);
+ if (info->irq <= 0) {
return dev_err_probe(&pdev->dev, -EINVAL,
"Failed to get virtual IRQ %d\n",
alarm_irq);
+ }
}
platform_set_drvdata(pdev, info);
diff --git a/include/linux/mfd/samsung/core.h b/include/linux/mfd/samsung/core.h
index d785e101fe79..dcd741c4f0d6 100644
--- a/include/linux/mfd/samsung/core.h
+++ b/include/linux/mfd/samsung/core.h
@@ -33,6 +33,9 @@
#define STEP_12_5_MV 12500
#define STEP_6_25_MV 6250
+/* Maximum number of IRQ chips in a PMIC */
+#define MAX_IRQ_CHIPS 1
+
struct gpio_desc;
enum sec_device_type {
@@ -69,7 +72,7 @@ struct sec_pmic_dev {
int device_type;
int irq;
- struct regmap_irq_chip_data *irq_data;
+ struct regmap_irq_chip_data *irq_data[MAX_IRQ_CHIPS];
};
struct sec_platform_data {
diff --git a/include/linux/mfd/samsung/irq.h b/include/linux/mfd/samsung/irq.h
index b4805cbd949b..78eb894e350e 100644
--- a/include/linux/mfd/samsung/irq.h
+++ b/include/linux/mfd/samsung/irq.h
@@ -34,6 +34,8 @@ enum s2mpa01_irq {
S2MPA01_IRQ_NR,
};
+#define S2MPA01_IRQ_CHIP 0
+
#define S2MPA01_IRQ_PWRONF_MASK (1 << 0)
#define S2MPA01_IRQ_PWRONR_MASK (1 << 1)
#define S2MPA01_IRQ_JIGONBF_MASK (1 << 2)
@@ -58,6 +60,8 @@ enum s2mpa01_irq {
#define S2MPA01_IRQ_B35_TSD_MASK (1 << 5)
enum s2mpg10_irq {
+#define S2MPG10_IRQ_CHIP 0
+
/* PMIC */
S2MPG10_IRQ_PWRONF,
S2MPG10_IRQ_PWRONR,
@@ -183,6 +187,8 @@ enum s2mps11_irq {
S2MPS11_IRQ_NR,
};
+#define S2MPS11_IRQ_CHIP 0
+
#define S2MPS11_IRQ_PWRONF_MASK (1 << 0)
#define S2MPS11_IRQ_PWRONR_MASK (1 << 1)
#define S2MPS11_IRQ_JIGONBF_MASK (1 << 2)
@@ -226,6 +232,8 @@ enum s2mps14_irq {
S2MPS14_IRQ_NR,
};
+#define S2MPS14_IRQ_CHIP 0
+
enum s2mpu02_irq {
S2MPU02_IRQ_PWRONF,
S2MPU02_IRQ_PWRONR,
@@ -250,6 +258,8 @@ enum s2mpu02_irq {
S2MPU02_IRQ_NR,
};
+#define S2MPU02_IRQ_CHIP 0
+
/* Masks for interrupts are the same as in s2mps11 */
#define S2MPS14_IRQ_TSD_MASK (1 << 2)
@@ -277,6 +287,8 @@ enum s2mpu05_irq {
S2MPU05_IRQ_NR,
};
+#define S2MPU05_IRQ_CHIP 0
+
#define S2MPU05_IRQ_PWRONF_MASK BIT(0)
#define S2MPU05_IRQ_PWRONR_MASK BIT(1)
#define S2MPU05_IRQ_JIGONBF_MASK BIT(2)
@@ -321,6 +333,8 @@ enum s5m8767_irq {
S5M8767_IRQ_NR,
};
+#define S5M8767_IRQ_CHIP 0
+
#define S5M8767_IRQ_PWRR_MASK (1 << 0)
#define S5M8767_IRQ_PWRF_MASK (1 << 1)
#define S5M8767_IRQ_PWR1S_MASK (1 << 3)
--
2.51.2
^ permalink raw reply related
* [PATCH 05/13] dt-bindings: mfd: s2mps11: add documentation for S2MU005 PMIC
From: Kaustabh Chakraborty @ 2025-11-13 19:05 UTC (permalink / raw)
To: Lee Jones, Pavel Machek, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, MyungJoo Ham, Chanwoo Choi, Sebastian Reichel,
Krzysztof Kozlowski, André Draszik, Alexandre Belloni,
Jonathan Corbet
Cc: linux-leds, devicetree, linux-kernel, linux-pm, linux-samsung-soc,
linux-rtc, linux-doc, Kaustabh Chakraborty
In-Reply-To: <20251114-s2mu005-pmic-v1-0-9e3184d3a0c9@disroot.org>
Samsung's S2MU005 PMIC includes subdevices for a charger, an MUIC (Micro
USB Interface Controller), and flash and RGB LED controllers.
Since regulators are not supported by this device, unmark this property
as required and instead set this in a per-device basis for ones which
need it.
Add the compatible and documentation for the S2MU005 PMIC. Also, add an
example for nodes for supported sub-devices, i.e. charger, extcon,
flash, and rgb.
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
---
.../devicetree/bindings/mfd/samsung,s2mps11.yaml | 103 ++++++++++++++++++++-
1 file changed, 102 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/mfd/samsung,s2mps11.yaml b/Documentation/devicetree/bindings/mfd/samsung,s2mps11.yaml
index 31d544a9c05c..aef634ca2e36 100644
--- a/Documentation/devicetree/bindings/mfd/samsung,s2mps11.yaml
+++ b/Documentation/devicetree/bindings/mfd/samsung,s2mps11.yaml
@@ -27,12 +27,28 @@ properties:
- samsung,s2mps15-pmic
- samsung,s2mpu02-pmic
- samsung,s2mpu05-pmic
+ - samsung,s2mu005-pmic
clocks:
$ref: /schemas/clock/samsung,s2mps11.yaml
description:
Child node describing clock provider.
+ charger:
+ $ref: /schemas/power/supply/samsung,s2m-charger.yaml
+ description:
+ Child node describing battery charger device.
+
+ extcon:
+ $ref: /schemas/extcon/samsung,s2m-muic.yaml
+ description:
+ Child node describing extcon device.
+
+ flash:
+ $ref: /schemas/leds/samsung,s2m-flash.yaml
+ description:
+ Child node describing flash LEDs.
+
interrupts:
maxItems: 1
@@ -44,6 +60,11 @@ properties:
description:
List of child nodes that specify the regulators.
+ rgb:
+ $ref: /schemas/leds/samsung,s2m-rgb.yaml
+ description:
+ Child node describing RGB LEDs.
+
samsung,s2mps11-acokb-ground:
description: |
Indicates that ACOKB pin of S2MPS11 PMIC is connected to the ground so
@@ -65,7 +86,6 @@ properties:
required:
- compatible
- - regulators
additionalProperties: false
@@ -105,6 +125,8 @@ allOf:
regulators:
$ref: /schemas/regulator/samsung,s2mps11.yaml
samsung,s2mps11-wrstbi-ground: false
+ required:
+ - regulators
- if:
properties:
@@ -116,6 +138,8 @@ allOf:
regulators:
$ref: /schemas/regulator/samsung,s2mps13.yaml
samsung,s2mps11-acokb-ground: false
+ required:
+ - regulators
- if:
properties:
@@ -128,6 +152,8 @@ allOf:
$ref: /schemas/regulator/samsung,s2mps14.yaml
samsung,s2mps11-acokb-ground: false
samsung,s2mps11-wrstbi-ground: false
+ required:
+ - regulators
- if:
properties:
@@ -140,6 +166,8 @@ allOf:
$ref: /schemas/regulator/samsung,s2mps15.yaml
samsung,s2mps11-acokb-ground: false
samsung,s2mps11-wrstbi-ground: false
+ required:
+ - regulators
- if:
properties:
@@ -152,6 +180,8 @@ allOf:
$ref: /schemas/regulator/samsung,s2mpu02.yaml
samsung,s2mps11-acokb-ground: false
samsung,s2mps11-wrstbi-ground: false
+ required:
+ - regulators
- if:
properties:
@@ -164,6 +194,18 @@ allOf:
$ref: /schemas/regulator/samsung,s2mpu05.yaml
samsung,s2mps11-acokb-ground: false
samsung,s2mps11-wrstbi-ground: false
+ required:
+ - regulators
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: samsung,s2mu005-pmic
+ then:
+ properties:
+ samsung,s2mps11-acokb-ground: false
+ samsung,s2mps11-wrstbi-ground: false
examples:
- |
@@ -305,3 +347,62 @@ examples:
};
};
};
+
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/leds/common.h>
+
+ i2c {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pmic@3d {
+ compatible = "samsung,s2mu005-pmic";
+ reg = <0x3d>;
+ interrupt-parent = <&gpa2>;
+ interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
+
+ charger {
+ compatible = "samsung,s2mu005-charger";
+ monitored-battery = <&battery>;
+ };
+
+ extcon {
+ compatible = "samsung,s2mu005-muic";
+
+ port {
+ muic_to_usb: endpoint {
+ remote-endpoint = <&usb_to_muic>;
+ };
+ };
+ };
+
+ flash {
+ compatible = "samsung,s2mu005-flash";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ led@0 {
+ reg = <0>;
+ label = "back-cam:white:flash";
+ color = <LED_COLOR_ID_WHITE>;
+ function = LED_FUNCTION_FLASH;
+ };
+
+ led@1 {
+ reg = <1>;
+ label = "front-cam:white:flash";
+ color = <LED_COLOR_ID_WHITE>;
+ function = LED_FUNCTION_FLASH;
+ };
+ };
+
+ rgb {
+ compatible = "samsung,s2mu005-rgb";
+ label = "notification:rgb:indicator";
+ color = <LED_COLOR_ID_RGB>;
+ function = LED_FUNCTION_INDICATOR;
+ linux,default-trigger = "pattern";
+ };
+ };
+ };
--
2.51.2
^ permalink raw reply related
* [PATCH 04/13] dt-bindings: power: supply: document Samsung S2M series PMIC charger device
From: Kaustabh Chakraborty @ 2025-11-13 19:05 UTC (permalink / raw)
To: Lee Jones, Pavel Machek, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, MyungJoo Ham, Chanwoo Choi, Sebastian Reichel,
Krzysztof Kozlowski, André Draszik, Alexandre Belloni,
Jonathan Corbet
Cc: linux-leds, devicetree, linux-kernel, linux-pm, linux-samsung-soc,
linux-rtc, linux-doc, Kaustabh Chakraborty
In-Reply-To: <20251114-s2mu005-pmic-v1-0-9e3184d3a0c9@disroot.org>
Certain Samsung S2M series PMICs have a battery charger device which,
among other things, manages power interfacing of the USB port. It may
supply power, as done in USB OTG operation mode, or it may accept power
and redirect it to the battery fuelgauge for charging.
This driver depends on the MUIC device present in the same PMIC block.
The initial driver introduced has support for S2MU005, add its
compatible as well.
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
---
.../power/supply/samsung,s2mu005-charger.yaml | 35 ++++++++++++++++++++++
1 file changed, 35 insertions(+)
diff --git a/Documentation/devicetree/bindings/power/supply/samsung,s2mu005-charger.yaml b/Documentation/devicetree/bindings/power/supply/samsung,s2mu005-charger.yaml
new file mode 100644
index 000000000000..80292d6e2562
--- /dev/null
+++ b/Documentation/devicetree/bindings/power/supply/samsung,s2mu005-charger.yaml
@@ -0,0 +1,35 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/power/supply/samsung,s2mu005-charger.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Battery Charger Driver for Samsung S2M series PMICs
+
+maintainers:
+ - Kaustabh Chakraborty <kauschluss@disroot.org>
+
+description: |
+ The Samsung S2M series PMIC battery charger manages power interfacing
+ of the USB port. It may supply power, as done in USB OTG operation
+ mode, or it may accept power and redirect it to the battery fuelgauge
+ for charging.
+
+ This is a part of device tree bindings for S2M and S5M family of Power
+ Management IC (PMIC).
+
+ See also Documentation/devicetree/bindings/mfd/samsung,s2mps11.yaml for
+ additional information and example.
+
+allOf:
+ - $ref: power-supply.yaml#
+
+properties:
+ compatible:
+ enum:
+ - samsung,s2mu005-charger
+
+required:
+ - compatible
+
+unevaluatedProperties: false
--
2.51.2
^ permalink raw reply related
* [PATCH 03/13] dt-bindings: extcon: document Samsung S2M series PMIC extcon device
From: Kaustabh Chakraborty @ 2025-11-13 19:05 UTC (permalink / raw)
To: Lee Jones, Pavel Machek, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, MyungJoo Ham, Chanwoo Choi, Sebastian Reichel,
Krzysztof Kozlowski, André Draszik, Alexandre Belloni,
Jonathan Corbet
Cc: linux-leds, devicetree, linux-kernel, linux-pm, linux-samsung-soc,
linux-rtc, linux-doc, Kaustabh Chakraborty
In-Reply-To: <20251114-s2mu005-pmic-v1-0-9e3184d3a0c9@disroot.org>
Certain Samsung S2M series PMICs have a MUIC device which reports
various cable states by measuring the ID-GND resistance with an internal
ADC. Document the devicetree schema for this device.
The initial driver introduced has support for S2MU005, add its
compatible as well.
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
---
.../bindings/extcon/samsung,s2mu005-muic.yaml | 35 ++++++++++++++++++++++
1 file changed, 35 insertions(+)
diff --git a/Documentation/devicetree/bindings/extcon/samsung,s2mu005-muic.yaml b/Documentation/devicetree/bindings/extcon/samsung,s2mu005-muic.yaml
new file mode 100644
index 000000000000..8511bb96b47a
--- /dev/null
+++ b/Documentation/devicetree/bindings/extcon/samsung,s2mu005-muic.yaml
@@ -0,0 +1,35 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/extcon/samsung,s2mu005-muic.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Extcon Driver for Samsung S2M series PMICs
+
+maintainers:
+ - Kaustabh Chakraborty <kauschluss@disroot.org>
+
+description: |
+ The Samsung S2M series PMIC extcon device is a USB port accessory
+ detector. It reports multiple states depending on the ID-GND
+ resistance measured by an internal ADC.
+
+ This is a part of device tree bindings for S2M and S5M family of Power
+ Management IC (PMIC).
+
+ See also Documentation/devicetree/bindings/mfd/samsung,s2mps11.yaml for
+ additional information and example.
+
+properties:
+ compatible:
+ enum:
+ - samsung,s2mu005-muic
+
+ port:
+ $ref: /schemas/graph.yaml#/properties/port
+
+required:
+ - compatible
+ - port
+
+additionalProperties: false
--
2.51.2
^ permalink raw reply related
* [PATCH 02/13] dt-bindings: leds: document Samsung S2M series PMIC RGB LED device
From: Kaustabh Chakraborty @ 2025-11-13 19:05 UTC (permalink / raw)
To: Lee Jones, Pavel Machek, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, MyungJoo Ham, Chanwoo Choi, Sebastian Reichel,
Krzysztof Kozlowski, André Draszik, Alexandre Belloni,
Jonathan Corbet
Cc: linux-leds, devicetree, linux-kernel, linux-pm, linux-samsung-soc,
linux-rtc, linux-doc, Kaustabh Chakraborty
In-Reply-To: <20251114-s2mu005-pmic-v1-0-9e3184d3a0c9@disroot.org>
Certain Samsung S2M series PMICs have a three-channel LED device with
independent brightness control for each channel, typically used as
status indicators in mobile phones. Document the devicetree schema from
this driver.
The initial driver introduced has support for S2MU005, add its
compatible as well.
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
---
.../bindings/leds/samsung,s2mu005-rgb.yaml | 34 ++++++++++++++++++++++
1 file changed, 34 insertions(+)
diff --git a/Documentation/devicetree/bindings/leds/samsung,s2mu005-rgb.yaml b/Documentation/devicetree/bindings/leds/samsung,s2mu005-rgb.yaml
new file mode 100644
index 000000000000..bad7080ff8f5
--- /dev/null
+++ b/Documentation/devicetree/bindings/leds/samsung,s2mu005-rgb.yaml
@@ -0,0 +1,34 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/leds/samsung,s2mu005-rgb.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: RGB LED Driver for Samsung S2M series PMICs
+
+maintainers:
+ - Kaustabh Chakraborty <kauschluss@disroot.org>
+
+description: |
+ The Samsung S2M series PMIC RGB LED is a three-channel LED device with
+ 8-bit brightness control for each channel, typically used as status
+ indicators in mobile phones.
+
+ This is a part of device tree bindings for S2M and S5M family of Power
+ Management IC (PMIC).
+
+ See also Documentation/devicetree/bindings/mfd/samsung,s2mps11.yaml for
+ additional information and example.
+
+allOf:
+ - $ref: common.yaml#
+
+properties:
+ compatible:
+ enum:
+ - samsung,s2mu005-rgb
+
+required:
+ - compatible
+
+unevaluatedProperties: false
--
2.51.2
^ permalink raw reply related
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