* Re: [PATCH v5 02/11] dt-bindings: hwmon: Add Apple System Management Controller hwmon schema
From: Guenter Roeck @ 2026-05-25 13:33 UTC (permalink / raw)
To: James Calligeros
Cc: Sven Peter, Janne Grunau, Alyssa Rosenzweig, Neal Gompa,
Lee Jones, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Alexandre Belloni, Jean Delvare, Dmitry Torokhov, Jonathan Corbet,
asahi, linux-arm-kernel, devicetree, linux-kernel, linux-rtc,
linux-hwmon, linux-input, linux-doc
In-Reply-To: <20251112-macsmc-subdevs-v5-2-728e4b91fe81@gmail.com>
On Wed, Nov 12, 2025 at 09:16:48PM +1000, James Calligeros wrote:
> Apple Silicon devices integrate a vast array of sensors, monitoring
> current, power, temperature, and voltage across almost every part of
> the system. The sensors themselves are all connected to the System
> Management Controller (SMC). The SMC firmware exposes the data
> reported by these sensors via its standard FourCC-based key-value
> API. The SMC is also responsible for monitoring and controlling any
> fans connected to the system, exposing them in the same way.
>
> For reasons known only to Apple, each device exposes its sensors with
> an almost totally unique set of keys. This is true even for devices
> which share an SoC. An M1 Mac mini, for example, will report its core
> temperatures on different keys to an M1 MacBook Pro. Worse still, the
> SMC does not provide a way to enumerate the available keys at runtime,
> nor do the keys follow any sort of reasonable or consistent naming
> rules that could be used to deduce their purpose. We must therefore
> know which keys are present on any given device, and which function
> they serve, ahead of time.
>
> Add a schema so that we can describe the available sensors for a given
> Apple Silicon device in the Devicetree.
>
> Reviewed-by: Neal Gompa <neal@gompa.dev>
> Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
> Signed-off-by: James Calligeros <jcalligeros99@gmail.com>
> ---
> .../bindings/hwmon/apple,smc-hwmon.yaml | 86 +++++++++++++++++++++++++
> .../bindings/mfd/apple,smc.yaml | 36 +++++++++++
I see that the rest of this series is going to be applied. This patch
touches bindings in mfd, which I can not apply.
With the assumption that the patch will be applied through some other tree,
presumably mfd:
Acked-by: Guenter Roeck <linux@roeck-us.net>
Guenter
> MAINTAINERS | 1 +
> 3 files changed, 123 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/hwmon/apple,smc-hwmon.yaml b/Documentation/devicetree/bindings/hwmon/apple,smc-hwmon.yaml
> new file mode 100644
> index 000000000000..2eec317bc4b3
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/hwmon/apple,smc-hwmon.yaml
> @@ -0,0 +1,86 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/hwmon/apple,smc-hwmon.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Apple SMC Hardware Monitoring
> +
> +description:
> + Apple's System Management Controller (SMC) exposes a vast array of
> + hardware monitoring sensors, including temperature probes, current and
> + voltage sense, power meters, and fan speeds. It also provides endpoints
> + to manually control the speed of each fan individually. Each Apple
> + Silicon device exposes a different set of endpoints via SMC keys. This
> + is true even when two machines share an SoC. The CPU core temperature
> + sensor keys on an M1 Mac mini are different to those on an M1 MacBook
> + Pro, for example.
> +
> +maintainers:
> + - James Calligeros <jcalligeros99@gmail.com>
> +
> +$defs:
> + sensor:
> + type: object
> +
> + properties:
> + apple,key-id:
> + $ref: /schemas/types.yaml#/definitions/string
> + pattern: "^[A-Za-z0-9]{4}$"
> + description: The SMC FourCC key of the desired sensor.
> + Must match the node's suffix.
> +
> + label:
> + description: Human-readable name for the sensor
> +
> + required:
> + - apple,key-id
> +
> +properties:
> + compatible:
> + const: apple,smc-hwmon
> +
> +patternProperties:
> + "^current-[A-Za-z0-9]{4}$":
> + $ref: "#/$defs/sensor"
> + unevaluatedProperties: false
> +
> + "^fan-[A-Za-z0-9]{4}$":
> + $ref: "#/$defs/sensor"
> + unevaluatedProperties: false
> +
> + properties:
> + apple,fan-minimum:
> + $ref: /schemas/types.yaml#/definitions/string
> + pattern: "^[A-Za-z0-9]{4}$"
> + description: SMC key containing the fan's minimum speed
> +
> + apple,fan-maximum:
> + $ref: /schemas/types.yaml#/definitions/string
> + pattern: "^[A-Za-z0-9]{4}$"
> + description: SMC key containing the fan's maximum speed
> +
> + apple,fan-target:
> + $ref: /schemas/types.yaml#/definitions/string
> + pattern: "^[A-Za-z0-9]{4}$"
> + description: Writeable endpoint for setting desired fan speed
> +
> + apple,fan-mode:
> + $ref: /schemas/types.yaml#/definitions/string
> + pattern: "^[A-Za-z0-9]{4}$"
> + description: Writeable key to enable/disable manual fan control
> +
> +
> + "^power-[A-Za-z0-9]{4}$":
> + $ref: "#/$defs/sensor"
> + unevaluatedProperties: false
> +
> + "^temperature-[A-Za-z0-9]{4}$":
> + $ref: "#/$defs/sensor"
> + unevaluatedProperties: false
> +
> + "^voltage-[A-Za-z0-9]{4}$":
> + $ref: "#/$defs/sensor"
> + unevaluatedProperties: false
> +
> +additionalProperties: false
> diff --git a/Documentation/devicetree/bindings/mfd/apple,smc.yaml b/Documentation/devicetree/bindings/mfd/apple,smc.yaml
> index 0410e712c900..34ce048619f5 100644
> --- a/Documentation/devicetree/bindings/mfd/apple,smc.yaml
> +++ b/Documentation/devicetree/bindings/mfd/apple,smc.yaml
> @@ -49,6 +49,9 @@ properties:
> rtc:
> $ref: /schemas/rtc/apple,smc-rtc.yaml
>
> + hwmon:
> + $ref: /schemas/hwmon/apple,smc-hwmon.yaml
> +
> additionalProperties: false
>
> required:
> @@ -89,5 +92,38 @@ examples:
> nvmem-cells = <&rtc_offset>;
> nvmem-cell-names = "rtc_offset";
> };
> +
> + hwmon {
> + compatible = "apple,smc-hwmon";
> +
> + current-ID0R {
> + apple,key-id = "ID0R";
> + label = "AC Input Current";
> + };
> +
> + fan-F0Ac {
> + apple,key-id = "F0Ac";
> + apple,fan-minimum = "F0Mn";
> + apple,fan-maximum = "F0Mx";
> + apple,fan-target = "F0Tg";
> + apple,fan-mode = "F0Md";
> + label = "Fan 1";
> + };
> +
> + power-PSTR {
> + apple,key-id = "PSTR";
> + label = "Total System Power";
> + };
> +
> + temperature-TW0P {
> + apple,key-id = "TW0P";
> + label = "WiFi/BT Module Temperature";
> + };
> +
> + voltage-VD0R {
> + apple,key-id = "VD0R";
> + label = "AC Input Voltage";
> + };
> + };
> };
> };
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 51942a9a9b43..6e5e219c5fe6 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -2422,6 +2422,7 @@ F: Documentation/devicetree/bindings/cpufreq/apple,cluster-cpufreq.yaml
> F: Documentation/devicetree/bindings/dma/apple,admac.yaml
> F: Documentation/devicetree/bindings/gpio/apple,smc-gpio.yaml
> F: Documentation/devicetree/bindings/gpu/apple,agx.yaml
> +F: Documentation/devicetree/bindings/hwmon/apple,smc-hwmon.yaml
> F: Documentation/devicetree/bindings/i2c/apple,i2c.yaml
> F: Documentation/devicetree/bindings/input/touchscreen/apple,z2-multitouch.yaml
> F: Documentation/devicetree/bindings/interrupt-controller/apple,*
^ permalink raw reply
* [PATCH] rtc: interface: Add rtc time jump debug in rtc_timer_do_work()
From: Jinjie Ruan @ 2026-05-25 13:08 UTC (permalink / raw)
To: alexandre.belloni, linux-rtc, linux-kernel; +Cc: ruanjinjie
In virtualization environments like QEMU [1], or during hardware
clocksource anomalies, an extreme time-warp event can occur. When
the system time abruptly jumps forward, the rtc_timer_do_work() handler
falls into a prolonged processing loop to clear accumulated historical
timers via timerqueue_getnext(). Running this loop indefinitely under
the rtc->ops_lock mutex triggers a kernel softlockup, stalling
the system.
Introduce an adaptive telemetry and loop guard mechanism to enhance debug
visibility and prevent softlockups:
1. Record `start_jiffies` upon entry and leverage `time_after()` to
check if the loop has monopolized the CPU for more than 1s (HZ). If so,
the handler prints a telemetry warning, triggers a WARN stack dump, and
breaks the loop to safely yield the CPU.
2. Track the execution via a `loop_count` metric. Printing this counter
in the warning log provides vital diagnostics to distinguish
an aggressive time-warp storm (high count) from a bogged-down callback
bug (low count).
3. Utilize the kernel format specifier `%ptR` to convert the raw ktime
into a human-readable timestamp (YYYY-MM-DD HH:MM:SS), allowing
developers to instantly pinpoint the exact boundary of the time
jump in dmesg.
This non-destructive telemetry guard provides precise hardware/emulator
diagnostic visibility while ensuring core kernel availability.
[1]: https://lore.kernel.org/all/20260114013257.3500578-1-ruanjinjie@huawei.com/
Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
---
drivers/rtc/interface.c | 15 +++++++++++++--
1 file changed, 13 insertions(+), 2 deletions(-)
diff --git a/drivers/rtc/interface.c b/drivers/rtc/interface.c
index 1906f4884a83..f6c5fd16cc4e 100644
--- a/drivers/rtc/interface.c
+++ b/drivers/rtc/interface.c
@@ -927,10 +927,12 @@ static void rtc_timer_remove(struct rtc_device *rtc, struct rtc_timer *timer)
*/
void rtc_timer_do_work(struct work_struct *work)
{
- struct rtc_timer *timer;
+ unsigned long start_jiffies = jiffies;
struct timerqueue_node *next;
- ktime_t now;
+ struct rtc_timer *timer;
struct rtc_time tm;
+ int loop_count = 0;
+ ktime_t now;
int err;
struct rtc_device *rtc =
@@ -945,6 +947,15 @@ void rtc_timer_do_work(struct work_struct *work)
}
now = rtc_tm_to_ktime(tm);
while ((next = timerqueue_getnext(&rtc->timerqueue))) {
+ loop_count++;
+
+ if (unlikely(time_after(jiffies, start_jiffies + HZ))) {
+ dev_warn(&rtc->dev, "RTC time jump (loop: %d) to %ptR.\n",
+ loop_count, &tm);
+ WARN_ON_ONCE(1);
+ break;
+ }
+
if (next->expires > now)
break;
--
2.34.1
^ permalink raw reply related
* [PATCH v5 0/7] mfd: nct6694: Refactor transport layer and add HIF (eSPI) support
From: a0282524688 @ 2026-05-25 8:20 UTC (permalink / raw)
To: tmyu0, linusw, brgl, linux, andi.shyti, lee, mkl, mailhol,
alexandre.belloni, wim
Cc: linux-kernel, linux-gpio, linux-i2c, linux-can, netdev,
linux-watchdog, linux-hwmon, linux-rtc, linux-usb, Ming Yu
From: Ming Yu <a0282524688@gmail.com>
The Nuvoton NCT6694 is a peripheral expander that provides GPIO, I2C,
CAN-FD, Watchdog, HWMON, PWM, and RTC sub-devices. Currently, the
driver only supports USB as the host transport interface.
This series refactors the NCT6694 MFD core to support multiple transport
backends and adds a new Host Interface (HIF) transport driver that
communicates over eSPI using Super-I/O shared memory.
Changes since version 4:
- Split the monolithic refactoring and HIF support patch into a series of
smaller, logical commits to improve reviewability and adhere to the
single logical change principle.
- Decoupled USB-specific data into a dedicated 'nct6694_usb_data'
structure.
- Abstracted device I/O operations by introducing 'read_msg' and
'write_msg' function pointers in the core structure.
- Renamed the existing driver to 'nct6694-usb.c' to strictly identify its
transport boundary, alongside Kconfig/Makefile updates.
- Extracted transport-agnostic device management (IRQ domain setup, IDA
initialization, and MFD cell registration) into a standalone
'nct6694-core.c' module.
- Added the 'nct6694-hif' eSPI transport driver clean on top of the new
core abstraction.
Changes since version 3:
- Remove redundant module type macro definitions from sub-device drivers
that are now provided by the shared header <linux/mfd/nct6694.h>,
fixing -Wmacro-redefined warnings.
Changes since version 2:
- Restore per-device IDA and mfd_add_hotplug_devices()/PLATFORM_DEVID_AUTO
to avoid child device ID conflicts with multiple NCT6694 chips.
- Validate irq_find_mapping() return value before dispatching IRQs.
- Check superio_enter() return value in nct6694_irq_init().
Changes since version 1:
- Reworked the Super-I/O access helpers.
Ming Yu (7):
mfd: nct6694: Move module type macros to shared header
mfd: nct6694: Refactor USB-specific data into nct6694_usb_data
mfd: nct6694: Introduce transport abstraction with function pointers
mfd: nct6694: Rename static I/O functions with _usb_ prefix
mfd: nct6694: Rename driver to nct6694-usb and update Kconfig
mfd: nct6694: Extract core device management into a separate module
mfd: nct6694: Add Host Interface (HIF) eSPI transport driver
MAINTAINERS | 2 +-
drivers/gpio/gpio-nct6694.c | 7 -
drivers/hwmon/nct6694-hwmon.c | 21 -
drivers/i2c/busses/i2c-nct6694.c | 7 -
drivers/mfd/Kconfig | 38 +-
drivers/mfd/Makefile | 4 +-
drivers/mfd/nct6694-core.c | 136 ++++++
drivers/mfd/nct6694-hif.c | 529 +++++++++++++++++++++++
drivers/mfd/{nct6694.c => nct6694-usb.c} | 185 +++-----
drivers/net/can/usb/nct6694_canfd.c | 6 -
drivers/rtc/rtc-nct6694.c | 7 -
drivers/watchdog/nct6694_wdt.c | 7 -
include/linux/mfd/nct6694.h | 63 ++-
13 files changed, 821 insertions(+), 191 deletions(-)
create mode 100644 drivers/mfd/nct6694-core.c
create mode 100644 drivers/mfd/nct6694-hif.c
rename drivers/mfd/{nct6694.c => nct6694-usb.c} (62%)
--
2.34.1
^ permalink raw reply
* [PATCH v5 1/7] mfd: nct6694: Move module type macros to shared header
From: a0282524688 @ 2026-05-25 8:17 UTC (permalink / raw)
To: Ming Yu, Linus Walleij, Bartosz Golaszewski, Guenter Roeck,
Andi Shyti, Marc Kleine-Budde, Vincent Mailhol, Alexandre Belloni,
Wim Van Sebroeck, Lee Jones
Cc: Ming Yu, linux-gpio, linux-kernel, linux-hwmon, linux-i2c,
linux-can, linux-rtc, linux-watchdog
In-Reply-To: <20260525081736.2904310-1-a0282524688@gmail.com>
From: Ming Yu <a0282524688@gmail.com>
Move NCT6694_XXX_MOD macro definitions from individual sub-device
drivers into the shared header include/linux/mfd/nct6694.h.
This is a prerequisite for supporting multiple transport interfaces
(USB, HIF) without duplicating these definitions.
No functional change.
Signed-off-by: Ming Yu <a0282524688@gmail.com>
---
Changes in v5:
- Split from the monolithic v4 patch to follow the single logical change principle.
drivers/gpio/gpio-nct6694.c | 7 -------
drivers/hwmon/nct6694-hwmon.c | 21 ---------------------
drivers/i2c/busses/i2c-nct6694.c | 7 -------
drivers/net/can/usb/nct6694_canfd.c | 6 ------
drivers/rtc/rtc-nct6694.c | 7 -------
drivers/watchdog/nct6694_wdt.c | 7 -------
include/linux/mfd/nct6694.h | 9 +++++++++
7 files changed, 9 insertions(+), 55 deletions(-)
diff --git a/drivers/gpio/gpio-nct6694.c b/drivers/gpio/gpio-nct6694.c
index a8607f0d9915..53bfc5983648 100644
--- a/drivers/gpio/gpio-nct6694.c
+++ b/drivers/gpio/gpio-nct6694.c
@@ -13,13 +13,6 @@
#include <linux/module.h>
#include <linux/platform_device.h>
-/*
- * USB command module type for NCT6694 GPIO controller.
- * This defines the module type used for communication with the NCT6694
- * GPIO controller over the USB interface.
- */
-#define NCT6694_GPIO_MOD 0xFF
-
#define NCT6694_GPIO_VER 0x90
#define NCT6694_GPIO_VALID 0x110
#define NCT6694_GPI_DATA 0x120
diff --git a/drivers/hwmon/nct6694-hwmon.c b/drivers/hwmon/nct6694-hwmon.c
index 6dcf22ca5018..581451875f2c 100644
--- a/drivers/hwmon/nct6694-hwmon.c
+++ b/drivers/hwmon/nct6694-hwmon.c
@@ -15,13 +15,6 @@
#include <linux/platform_device.h>
#include <linux/slab.h>
-/*
- * USB command module type for NCT6694 report channel
- * This defines the module type used for communication with the NCT6694
- * report channel over the USB interface.
- */
-#define NCT6694_RPT_MOD 0xFF
-
/* Report channel */
/*
* The report channel is used to report the status of the hardware monitor
@@ -38,13 +31,6 @@
#define NCT6694_TIN_STS(x) (0x6A + (x))
#define NCT6694_FIN_STS(x) (0x6E + (x))
-/*
- * USB command module type for NCT6694 HWMON controller.
- * This defines the module type used for communication with the NCT6694
- * HWMON controller over the USB interface.
- */
-#define NCT6694_HWMON_MOD 0x00
-
/* Command 00h - Hardware Monitor Control */
#define NCT6694_HWMON_CONTROL 0x00
#define NCT6694_HWMON_CONTROL_SEL 0x00
@@ -53,13 +39,6 @@
#define NCT6694_HWMON_ALARM 0x02
#define NCT6694_HWMON_ALARM_SEL 0x00
-/*
- * USB command module type for NCT6694 PWM controller.
- * This defines the module type used for communication with the NCT6694
- * PWM controller over the USB interface.
- */
-#define NCT6694_PWM_MOD 0x01
-
/* PWM Command - Manual Control */
#define NCT6694_PWM_CONTROL 0x01
#define NCT6694_PWM_CONTROL_SEL 0x00
diff --git a/drivers/i2c/busses/i2c-nct6694.c b/drivers/i2c/busses/i2c-nct6694.c
index 1413ab6f9462..ef3329f34246 100644
--- a/drivers/i2c/busses/i2c-nct6694.c
+++ b/drivers/i2c/busses/i2c-nct6694.c
@@ -12,13 +12,6 @@
#include <linux/module.h>
#include <linux/platform_device.h>
-/*
- * USB command module type for NCT6694 I2C controller.
- * This defines the module type used for communication with the NCT6694
- * I2C controller over the USB interface.
- */
-#define NCT6694_I2C_MOD 0x03
-
/* Command 00h - I2C Deliver */
#define NCT6694_I2C_DELIVER 0x00
#define NCT6694_I2C_DELIVER_SEL 0x00
diff --git a/drivers/net/can/usb/nct6694_canfd.c b/drivers/net/can/usb/nct6694_canfd.c
index e5f7f8849a73..262b4c26c9d4 100644
--- a/drivers/net/can/usb/nct6694_canfd.c
+++ b/drivers/net/can/usb/nct6694_canfd.c
@@ -18,12 +18,6 @@
#define DEVICE_NAME "nct6694-canfd"
-/* USB command module type for NCT6694 CANfd controller.
- * This defines the module type used for communication with the NCT6694
- * CANfd controller over the USB interface.
- */
-#define NCT6694_CANFD_MOD 0x05
-
/* Command 00h - CAN Setting and Initialization */
#define NCT6694_CANFD_SETTING 0x00
#define NCT6694_CANFD_SETTING_ACTIVE_CTRL1 BIT(0)
diff --git a/drivers/rtc/rtc-nct6694.c b/drivers/rtc/rtc-nct6694.c
index 35401a0d9cf5..c06902f150c9 100644
--- a/drivers/rtc/rtc-nct6694.c
+++ b/drivers/rtc/rtc-nct6694.c
@@ -14,13 +14,6 @@
#include <linux/rtc.h>
#include <linux/slab.h>
-/*
- * USB command module type for NCT6694 RTC controller.
- * This defines the module type used for communication with the NCT6694
- * RTC controller over the USB interface.
- */
-#define NCT6694_RTC_MOD 0x08
-
/* Command 00h - RTC Time */
#define NCT6694_RTC_TIME 0x0000
#define NCT6694_RTC_TIME_SEL 0x00
diff --git a/drivers/watchdog/nct6694_wdt.c b/drivers/watchdog/nct6694_wdt.c
index bc3689bd4b6b..4c06ac105562 100644
--- a/drivers/watchdog/nct6694_wdt.c
+++ b/drivers/watchdog/nct6694_wdt.c
@@ -20,13 +20,6 @@
#define NCT6694_WDT_MAX_DEVS 2
-/*
- * USB command module type for NCT6694 WDT controller.
- * This defines the module type used for communication with the NCT6694
- * WDT controller over the USB interface.
- */
-#define NCT6694_WDT_MOD 0x07
-
/* Command 00h - WDT Setup */
#define NCT6694_WDT_SETUP 0x00
#define NCT6694_WDT_SETUP_SEL(idx) (idx ? 0x01 : 0x00)
diff --git a/include/linux/mfd/nct6694.h b/include/linux/mfd/nct6694.h
index 6eb9be2cd4a0..3c683e317aa3 100644
--- a/include/linux/mfd/nct6694.h
+++ b/include/linux/mfd/nct6694.h
@@ -8,6 +8,15 @@
#ifndef __MFD_NCT6694_H
#define __MFD_NCT6694_H
+#define NCT6694_HWMON_MOD 0x00
+#define NCT6694_PWM_MOD 0x01
+#define NCT6694_I2C_MOD 0x03
+#define NCT6694_CANFD_MOD 0x05
+#define NCT6694_WDT_MOD 0x07
+#define NCT6694_RTC_MOD 0x08
+#define NCT6694_RPT_MOD 0xFF
+#define NCT6694_GPIO_MOD NCT6694_RPT_MOD
+
#define NCT6694_VENDOR_ID 0x0416
#define NCT6694_PRODUCT_ID 0x200B
#define NCT6694_INT_IN_EP 0x81
--
2.34.1
^ permalink raw reply related
* [PATCH v4] dt-bindings: clock: via,vt8500: Convert to DT Schema
From: Udaya Kiran Challa @ 2026-05-24 15:10 UTC (permalink / raw)
To: mturquette, sboyd, robh, krzk+dt, conor+dt
Cc: skhan, me, linux-rtc, devicetree, linux-kernel,
Udaya Kiran Challa
Convert the VIA/Wondermedia VT8500 and Wondermedia WM8xxx series SoCs clock
controller binding from the legacy text format to DT schema.
Signed-off-by: Udaya Kiran Challa <challauday369@gmail.com>
---
Changelog:
Changes since v3
- Add schema select matching for via,vt8500-pmc
- Allow hyphen in node names under patternProperties
- Add dependentRequired validation for enable-reg/enable-bit
- Fix example validation against PMC schema
Link to v3:https://lore.kernel.org/all/20260524111813.39810-1-challauday369@gmail.com/
Changes since v2:
- Drop redundant description for clocks
- Disable reg property for device clocks
- Fix schema hierarchy to match actual DTS structure
Link to v2:https://lore.kernel.org/all/20260521170810.19702-1-challauday369@gmail.com/
Changes since v1:
- Add default value for divisor-mask
- Add required properties compatible and model
- Fix example node name
- Update example size cells and reg value
Link to v1:https://lore.kernel.org/all/20260520025131.17772-1-challauday369@gmail.com/
---
.../bindings/clock/via,vt8500-clock.yaml | 209 ++++++++++++++++++
.../devicetree/bindings/clock/vt8500.txt | 74 -------
2 files changed, 209 insertions(+), 74 deletions(-)
create mode 100644 Documentation/devicetree/bindings/clock/via,vt8500-clock.yaml
delete mode 100644 Documentation/devicetree/bindings/clock/vt8500.txt
diff --git a/Documentation/devicetree/bindings/clock/via,vt8500-clock.yaml b/Documentation/devicetree/bindings/clock/via,vt8500-clock.yaml
new file mode 100644
index 000000000000..51a68df6c2f3
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/via,vt8500-clock.yaml
@@ -0,0 +1,209 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/via,vt8500-clock.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: VIA/Wondermedia VT8500 Clock Controller
+
+maintainers:
+ - Michael Turquette <mturquette@baylibre.com>
+ - Stephen Boyd <sboyd@kernel.org>
+
+description:
+ Clock controller bindings for VIA/Wondermedia VT8500 and Wondermedia WM8xxx
+ series SoCs.
+
+select:
+ properties:
+ compatible:
+ const: via,vt8500-pmc
+
+ required:
+ - compatible
+
+properties:
+ compatible:
+ const: via,vt8500-pmc
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ type: object
+ additionalProperties: true
+
+ properties:
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 0
+
+ required:
+ - "#address-cells"
+ - "#size-cells"
+
+ patternProperties:
+ "^[a-z0-9-]+(@[0-9a-f]+)?$":
+ type: object
+
+ properties:
+ compatible:
+ enum:
+ - via,vt8500-pll-clock
+ - wm,wm8650-pll-clock
+ - wm,wm8750-pll-clock
+ - wm,wm8850-pll-clock
+ - via,vt8500-device-clock
+
+ reg:
+ maxItems: 1
+ description:
+ Offset of the PLL register within the PMC register space.
+
+ clocks:
+ maxItems: 1
+
+ "#clock-cells":
+ const: 0
+
+ enable-reg:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ Offset of the clock enable register within the PMC
+ register space.
+
+ enable-bit:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ maximum: 31
+ description:
+ Bit index controlling clock enable.
+
+ divisor-reg:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ Offset of the clock divisor register within the PMC
+ register space.
+
+ divisor-mask:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ default: 0x1f
+ description:
+ Bitmask describing the divisor field inside divisor-reg.
+
+ dependentRequired:
+ enable-reg:
+ - enable-bit
+
+ enable-bit:
+ - enable-reg
+
+ required:
+ - compatible
+ - "#clock-cells"
+
+ allOf:
+ - if:
+ properties:
+ compatible:
+ enum:
+ - via,vt8500-pll-clock
+ - wm,wm8650-pll-clock
+ - wm,wm8750-pll-clock
+ - wm,wm8850-pll-clock
+ then:
+ required:
+ - reg
+ - clocks
+
+ - if:
+ properties:
+ compatible:
+ const: via,vt8500-device-clock
+ then:
+ properties:
+ reg: false
+
+ required:
+ - clocks
+
+ anyOf:
+ - required:
+ - enable-reg
+ - enable-bit
+
+ - required:
+ - divisor-reg
+
+ additionalProperties: false
+
+required:
+ - compatible
+ - reg
+ - clocks
+
+additionalProperties: false
+
+examples:
+ - |
+ pmc@d8130000 {
+ compatible = "via,vt8500-pmc";
+ reg = <0xd8130000 0x1000>;
+
+ clocks {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ref24: ref24M {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <24000000>;
+ };
+
+ ref25: ref25M {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <25000000>;
+ };
+
+ plla: clock@200 {
+ compatible = "wm,wm8650-pll-clock";
+ #clock-cells = <0>;
+ clocks = <&ref25>;
+ reg = <0x200>;
+ };
+
+ pllb: clock@204 {
+ compatible = "wm,wm8650-pll-clock";
+ #clock-cells = <0>;
+ clocks = <&ref25>;
+ reg = <0x204>;
+ };
+
+ clkarm: arm {
+ compatible = "via,vt8500-device-clock";
+ #clock-cells = <0>;
+ clocks = <&plla>;
+ divisor-reg = <0x300>;
+ };
+
+ clkuart0: uart0 {
+ compatible = "via,vt8500-device-clock";
+ #clock-cells = <0>;
+ clocks = <&ref24>;
+ enable-reg = <0x250>;
+ enable-bit = <1>;
+ };
+
+ clksdhc: sdhc {
+ compatible = "via,vt8500-device-clock";
+ #clock-cells = <0>;
+ clocks = <&pllb>;
+ divisor-reg = <0x328>;
+ divisor-mask = <0x3f>;
+ enable-reg = <0x254>;
+ enable-bit = <18>;
+ };
+ };
+ };
diff --git a/Documentation/devicetree/bindings/clock/vt8500.txt b/Documentation/devicetree/bindings/clock/vt8500.txt
deleted file mode 100644
index 91d71cc0314a..000000000000
--- a/Documentation/devicetree/bindings/clock/vt8500.txt
+++ /dev/null
@@ -1,74 +0,0 @@
-Device Tree Clock bindings for arch-vt8500
-
-This binding uses the common clock binding[1].
-
-[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
-
-Required properties:
-- compatible : shall be one of the following:
- "via,vt8500-pll-clock" - for a VT8500/WM8505 PLL clock
- "wm,wm8650-pll-clock" - for a WM8650 PLL clock
- "wm,wm8750-pll-clock" - for a WM8750 PLL clock
- "wm,wm8850-pll-clock" - for a WM8850 PLL clock
- "via,vt8500-device-clock" - for a VT/WM device clock
-
-Required properties for PLL clocks:
-- reg : shall be the control register offset from PMC base for the pll clock.
-- clocks : shall be the input parent clock phandle for the clock. This should
- be the reference clock.
-- #clock-cells : from common clock binding; shall be set to 0.
-
-Required properties for device clocks:
-- clocks : shall be the input parent clock phandle for the clock. This should
- be a pll output.
-- #clock-cells : from common clock binding; shall be set to 0.
-
-
-Device Clocks
-
-Device clocks are required to have one or both of the following sets of
-properties:
-
-
-Gated device clocks:
-
-Required properties:
-- enable-reg : shall be the register offset from PMC base for the enable
- register.
-- enable-bit : shall be the bit within enable-reg to enable/disable the clock.
-
-
-Divisor device clocks:
-
-Required property:
-- divisor-reg : shall be the register offset from PMC base for the divisor
- register.
-Optional property:
-- divisor-mask : shall be the mask for the divisor register. Defaults to 0x1f
- if not specified.
-
-
-For example:
-
-ref25: ref25M {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <25000000>;
-};
-
-plla: plla {
- #clock-cells = <0>;
- compatible = "wm,wm8650-pll-clock";
- clocks = <&ref25>;
- reg = <0x200>;
-};
-
-sdhc: sdhc {
- #clock-cells = <0>;
- compatible = "via,vt8500-device-clock";
- clocks = <&pllb>;
- divisor-reg = <0x328>;
- divisor-mask = <0x3f>;
- enable-reg = <0x254>;
- enable-bit = <18>;
-};
--
2.43.0
^ permalink raw reply related
* Re: [PATCH v3] dt-bindings: clock: via,vt8500: Convert to DT Schema
From: Rob Herring (Arm) @ 2026-05-24 12:55 UTC (permalink / raw)
To: Udaya Kiran Challa
Cc: mturquette, conor+dt, krzk+dt, linux-kernel, skhan, devicetree,
sboyd, linux-rtc, me
In-Reply-To: <20260524111813.39810-1-challauday369@gmail.com>
On Sun, 24 May 2026 16:47:57 +0530, Udaya Kiran Challa wrote:
> Convert the VIA/Wondermedia VT8500 and Wondermedia WM8xxx series SoCs clock
> controller binding from the legacy text format to DT schema.
>
> Signed-off-by: Udaya Kiran Challa <challauday369@gmail.com>
> ---
> Changelog:
> Changes since v2:
> - Drop redundant description for clocks
> - Disable reg property for device clocks
> - Fix schema hierarchy to match actual DTS structure
>
> Link to v2:https://lore.kernel.org/all/20260521170810.19702-1-challauday369@gmail.com/
>
> Changes since v1:
> - Add default value for divisor-mask
> - Add required properties compatible and model
> - Fix example node name
> - Update example size cells and reg value
>
> Link to v1:https://lore.kernel.org/all/20260520025131.17772-1-challauday369@gmail.com/
> ---
> .../bindings/clock/via,vt8500-clock.yaml | 179 ++++++++++++++++++
> .../devicetree/bindings/clock/vt8500.txt | 74 --------
> 2 files changed, 179 insertions(+), 74 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/clock/via,vt8500-clock.yaml
> delete mode 100644 Documentation/devicetree/bindings/clock/vt8500.txt
>
My bot found errors running 'make dt_binding_check' on your patch:
yamllint warnings/errors:
dtschema/dtc warnings/errors:
Documentation/devicetree/bindings/clock/via,vt8500-clock.example.dtb: /example-0/pmc@d8130000: failed to match any schema with compatible: ['via,vt8500-pmc']
doc reference errors (make refcheckdocs):
See https://patchwork.kernel.org/project/devicetree/patch/20260524111813.39810-1-challauday369@gmail.com
The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.
^ permalink raw reply
* [PATCH v3] dt-bindings: clock: via,vt8500: Convert to DT Schema
From: Udaya Kiran Challa @ 2026-05-24 11:17 UTC (permalink / raw)
To: mturquette, sboyd, robh, krzk+dt, conor+dt
Cc: skhan, me, linux-rtc, devicetree, linux-kernel,
Udaya Kiran Challa
Convert the VIA/Wondermedia VT8500 and Wondermedia WM8xxx series SoCs clock
controller binding from the legacy text format to DT schema.
Signed-off-by: Udaya Kiran Challa <challauday369@gmail.com>
---
Changelog:
Changes since v2:
- Drop redundant description for clocks
- Disable reg property for device clocks
- Fix schema hierarchy to match actual DTS structure
Link to v2:https://lore.kernel.org/all/20260521170810.19702-1-challauday369@gmail.com/
Changes since v1:
- Add default value for divisor-mask
- Add required properties compatible and model
- Fix example node name
- Update example size cells and reg value
Link to v1:https://lore.kernel.org/all/20260520025131.17772-1-challauday369@gmail.com/
---
.../bindings/clock/via,vt8500-clock.yaml | 179 ++++++++++++++++++
.../devicetree/bindings/clock/vt8500.txt | 74 --------
2 files changed, 179 insertions(+), 74 deletions(-)
create mode 100644 Documentation/devicetree/bindings/clock/via,vt8500-clock.yaml
delete mode 100644 Documentation/devicetree/bindings/clock/vt8500.txt
diff --git a/Documentation/devicetree/bindings/clock/via,vt8500-clock.yaml b/Documentation/devicetree/bindings/clock/via,vt8500-clock.yaml
new file mode 100644
index 000000000000..035925969655
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/via,vt8500-clock.yaml
@@ -0,0 +1,179 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/via,vt8500-clock.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: VIA/Wondermedia VT8500 Clock Controller
+
+maintainers:
+ - Michael Turquette <mturquette@baylibre.com>
+ - Stephen Boyd <sboyd@kernel.org>
+
+description:
+ Clock controller bindings for VIA/Wondermedia VT8500 and Wondermedia WM8xxx
+ series SoCs.
+
+properties:
+ clocks:
+ type: object
+ additionalProperties: true
+
+ properties:
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 0
+
+ required:
+ - "#address-cells"
+ - "#size-cells"
+
+ patternProperties:
+ "^[a-z0-9]+(@[0-9a-f]+)?$":
+ type: object
+
+ properties:
+ compatible:
+ enum:
+ - via,vt8500-pll-clock
+ - wm,wm8650-pll-clock
+ - wm,wm8750-pll-clock
+ - wm,wm8850-pll-clock
+ - via,vt8500-device-clock
+
+ reg:
+ maxItems: 1
+ description:
+ Offset of the PLL register within the PMC register space.
+
+ clocks:
+ maxItems: 1
+
+ "#clock-cells":
+ const: 0
+
+ enable-reg:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ Offset of the clock enable register within the PMC
+ register space.
+
+ enable-bit:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ maximum: 31
+ description:
+ Bit index controlling clock enable.
+
+ divisor-reg:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ Offset of the clock divisor register within the PMC
+ register space.
+
+ divisor-mask:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ default: 0x1f
+ description:
+ Bitmask describing the divisor field inside divisor-reg.
+
+ required:
+ - compatible
+ - "#clock-cells"
+
+ allOf:
+ - if:
+ properties:
+ compatible:
+ enum:
+ - via,vt8500-pll-clock
+ - wm,wm8650-pll-clock
+ - wm,wm8750-pll-clock
+ - wm,wm8850-pll-clock
+ then:
+ required:
+ - reg
+ - clocks
+
+ - if:
+ properties:
+ compatible:
+ const: via,vt8500-device-clock
+ then:
+ properties:
+ reg: false
+
+ required:
+ - clocks
+
+ anyOf:
+ - required:
+ - enable-reg
+ - enable-bit
+
+ - required:
+ - divisor-reg
+
+ additionalProperties: false
+
+required:
+ - clocks
+
+additionalProperties: false
+
+examples:
+ - |
+ pmc@d8130000 {
+ compatible = "via,vt8500-pmc";
+ reg = <0xd8130000 0x1000>;
+
+ clocks {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ref24: clock-24000000 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <24000000>;
+ };
+
+ ref25: clock-25000000 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <25000000>;
+ };
+
+ plla: clock@200 {
+ compatible = "wm,wm8650-pll-clock";
+ #clock-cells = <0>;
+ clocks = <&ref25>;
+ reg = <0x200>;
+ };
+
+ clkarm: arm {
+ compatible = "via,vt8500-device-clock";
+ #clock-cells = <0>;
+ clocks = <&plla>;
+ divisor-reg = <0x300>;
+ };
+
+ clkuart0: uart0 {
+ compatible = "via,vt8500-device-clock";
+ #clock-cells = <0>;
+ clocks = <&ref24>;
+ enable-reg = <0x250>;
+ enable-bit = <1>;
+ };
+
+ clksdhc: sdhc {
+ compatible = "via,vt8500-device-clock";
+ #clock-cells = <0>;
+ clocks = <&plla>;
+ divisor-reg = <0x328>;
+ divisor-mask = <0x3f>;
+ enable-reg = <0x254>;
+ enable-bit = <18>;
+ };
+ };
+ };
diff --git a/Documentation/devicetree/bindings/clock/vt8500.txt b/Documentation/devicetree/bindings/clock/vt8500.txt
deleted file mode 100644
index 91d71cc0314a..000000000000
--- a/Documentation/devicetree/bindings/clock/vt8500.txt
+++ /dev/null
@@ -1,74 +0,0 @@
-Device Tree Clock bindings for arch-vt8500
-
-This binding uses the common clock binding[1].
-
-[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
-
-Required properties:
-- compatible : shall be one of the following:
- "via,vt8500-pll-clock" - for a VT8500/WM8505 PLL clock
- "wm,wm8650-pll-clock" - for a WM8650 PLL clock
- "wm,wm8750-pll-clock" - for a WM8750 PLL clock
- "wm,wm8850-pll-clock" - for a WM8850 PLL clock
- "via,vt8500-device-clock" - for a VT/WM device clock
-
-Required properties for PLL clocks:
-- reg : shall be the control register offset from PMC base for the pll clock.
-- clocks : shall be the input parent clock phandle for the clock. This should
- be the reference clock.
-- #clock-cells : from common clock binding; shall be set to 0.
-
-Required properties for device clocks:
-- clocks : shall be the input parent clock phandle for the clock. This should
- be a pll output.
-- #clock-cells : from common clock binding; shall be set to 0.
-
-
-Device Clocks
-
-Device clocks are required to have one or both of the following sets of
-properties:
-
-
-Gated device clocks:
-
-Required properties:
-- enable-reg : shall be the register offset from PMC base for the enable
- register.
-- enable-bit : shall be the bit within enable-reg to enable/disable the clock.
-
-
-Divisor device clocks:
-
-Required property:
-- divisor-reg : shall be the register offset from PMC base for the divisor
- register.
-Optional property:
-- divisor-mask : shall be the mask for the divisor register. Defaults to 0x1f
- if not specified.
-
-
-For example:
-
-ref25: ref25M {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <25000000>;
-};
-
-plla: plla {
- #clock-cells = <0>;
- compatible = "wm,wm8650-pll-clock";
- clocks = <&ref25>;
- reg = <0x200>;
-};
-
-sdhc: sdhc {
- #clock-cells = <0>;
- compatible = "via,vt8500-device-clock";
- clocks = <&pllb>;
- divisor-reg = <0x328>;
- divisor-mask = <0x3f>;
- enable-reg = <0x254>;
- enable-bit = <18>;
-};
--
2.43.0
^ permalink raw reply related
* [PATCH] dt-bindings: arm: vt8500: via,vt8500-pmc: Convert to DT Schema
From: Udaya Kiran Challa @ 2026-05-24 11:00 UTC (permalink / raw)
To: linux, robh, krzk+dt, conor+dt
Cc: skhan, me, linux-rtc, devicetree, linux-kernel,
Udaya Kiran Challa
Convert the VIA/Wondermedia VT8500 Power Management controller binding
from the legacy text format to DT schema.
Signed-off-by: Udaya Kiran Challa <challauday369@gmail.com>
---
.../bindings/arm/vt8500/via,vt8500-pmc.txt | 13 -------
.../bindings/arm/vt8500/via,vt8500-pmc.yaml | 38 +++++++++++++++++++
2 files changed, 38 insertions(+), 13 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/arm/vt8500/via,vt8500-pmc.txt
create mode 100644 Documentation/devicetree/bindings/arm/vt8500/via,vt8500-pmc.yaml
diff --git a/Documentation/devicetree/bindings/arm/vt8500/via,vt8500-pmc.txt b/Documentation/devicetree/bindings/arm/vt8500/via,vt8500-pmc.txt
deleted file mode 100644
index 521b9c7de933..000000000000
--- a/Documentation/devicetree/bindings/arm/vt8500/via,vt8500-pmc.txt
+++ /dev/null
@@ -1,13 +0,0 @@
-VIA/Wondermedia VT8500 Power Management Controller
------------------------------------------------------
-
-Required properties:
-- compatible : "via,vt8500-pmc"
-- reg : Should contain 1 register ranges(address and length)
-
-Example:
-
- pmc@d8130000 {
- compatible = "via,vt8500-pmc";
- reg = <0xd8130000 0x1000>;
- };
diff --git a/Documentation/devicetree/bindings/arm/vt8500/via,vt8500-pmc.yaml b/Documentation/devicetree/bindings/arm/vt8500/via,vt8500-pmc.yaml
new file mode 100644
index 000000000000..ac603fd4efec
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/vt8500/via,vt8500-pmc.yaml
@@ -0,0 +1,38 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/vt8500/via,vt8500-pmc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: VIA/Wondermedia VT8500 Power Management Controller
+
+maintainers:
+ - Tony Prisk <linux@prisktech.co.nz>
+
+description:
+ The VIA/Wondermedia Power Management Controller provides register access for
+ clock and power management functions on VT8500 and WM8xxx series SoCs.
+
+properties:
+ compatible:
+ const: via,vt8500-pmc
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ type: object
+ additionalProperties: true
+
+required:
+ - compatible
+ - reg
+
+additionalProperties: false
+
+examples:
+ - |
+ pmc@d8130000 {
+ compatible = "via,vt8500-pmc";
+ reg = <0xd8130000 0x1000>;
+ };
--
2.43.0
^ permalink raw reply related
* Re: [PATCH v2] dt-bindings: clock: via,vt8500: Convert to DT Schema
From: Uday Kiran @ 2026-05-23 17:45 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: mturquette, sboyd, robh, krzk+dt, conor+dt, skhan, me, linux-rtc,
devicetree, linux-kernel
In-Reply-To: <20260522-passionate-fair-jellyfish-73b2ee@quoll>
On Fri, May 22, 2026 at 12:12 PM Krzysztof Kozlowski <krzk@kernel.org> wrote:
> > +
> > + plla: clock@200 {
> > + compatible = "wm,wm8650-pll-clock";
> > + reg = <0x200 0x04>;
> > + clocks = <&ref25>;
> > + #clock-cells = <0>;
> > + };
> > +
> > + clksdhc: clock {
>
> Entire binding is for part of other device, so where is the rest? This
> should not be done separately from the parent. And then example goes
> only to one place.
Thanks for the review Krzysztof.
And sorry, I initially converted the legacy clock/vt8500.txt binding directly to
YAML and missed that the clock nodes are actually child nodes of the PMC
device, which already has a separate binding documented in:
Documentation/devicetree/bindings/arm/vt8500/via,vt8500-pmc.txt
I'll rework this by splitting the conversion into two schemas:
via,vt8500-pmc.yaml for the PMC device itself
via,vt8500-clock.yaml for the clocks child node and the PLL/device clock child
bindings
The clock binding example will retain the PMC hierarchy context, but the PMC
properties themselves will be described in the PMC schema instead of
duplicating them in the clock binding.
Regards,
Udaya Kiran Challa
^ permalink raw reply
* Re: [PATCH] rtc: pcf2127: clear the PWRMNG bits for pcf2131
From: Thomas Bonnefille @ 2026-05-22 14:16 UTC (permalink / raw)
To: alessandro.dichiara; +Cc: alexandre.belloni, linux-kernel, linux-rtc
In-Reply-To: <20251210-rtc-pcf2131-clear-pwrmng-bits-v1-1-407c1c573726@se.com>
Hello,
Has there been any update on this patch?
I'm currently interested in it and would be happy to continue the
upstreaming process if needed.
Best regards,
Thomas
^ permalink raw reply
* Re: [PATCH v2] dt-bindings: clock: via,vt8500: Convert to DT Schema
From: Krzysztof Kozlowski @ 2026-05-22 6:42 UTC (permalink / raw)
To: Udaya Kiran Challa
Cc: mturquette, sboyd, robh, krzk+dt, conor+dt, skhan, me, linux-rtc,
devicetree, linux-kernel
In-Reply-To: <20260521170810.19702-1-challauday369@gmail.com>
On Thu, May 21, 2026 at 10:37:28PM +0530, Udaya Kiran Challa wrote:
> Convert the VIA/Wondermedia VT8500 and Wondermedia WM8xxx series SoCs clock
> controller binding from the legacy text format to DT schema.
>
> Signed-off-by: Udaya Kiran Challa <challauday369@gmail.com>
> ---
> Changelog:
> Changes since v1:
> - Add default value for divisor-mask
> - Add required properties compatible and model
> - Fix example node name
> - Update example size cells and reg value
>
> Link to v1:https://lore.kernel.org/all/20260520025131.17772-1-challauday369@gmail.com/
> ---
> .../bindings/clock/via,vt8500-clock.yaml | 126 ++++++++++++++++++
> .../devicetree/bindings/clock/vt8500.txt | 74 ----------
> 2 files changed, 126 insertions(+), 74 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/clock/via,vt8500-clock.yaml
> delete mode 100644 Documentation/devicetree/bindings/clock/vt8500.txt
>
> diff --git a/Documentation/devicetree/bindings/clock/via,vt8500-clock.yaml b/Documentation/devicetree/bindings/clock/via,vt8500-clock.yaml
> new file mode 100644
> index 000000000000..9e19103866bc
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/via,vt8500-clock.yaml
> @@ -0,0 +1,126 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/via,vt8500-clock.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: VIA/Wondermedia VT8500 Clock Controller
> +
> +maintainers:
> + - Michael Turquette <mturquette@baylibre.com>
> + - Stephen Boyd <sboyd@kernel.org>
> +
> +description: |
Do not need '|' unless you need to preserve formatting.
> + Clock controller bindings for VIA/Wondermedia VT8500 and Wondermedia WM8xxx
> + series SoCs.
> +
> +properties:
> + compatible:
> + enum:
> + - via,vt8500-pll-clock
> + - wm,wm8650-pll-clock
> + - wm,wm8750-pll-clock
> + - wm,wm8850-pll-clock
> + - via,vt8500-device-clock
> +
> + reg:
> + maxItems: 1
> + description:
> + Offset of the PLL register within the PMC register space.
> +
> + clocks:
> + maxItems: 1
> + description:
> + Parent reference clock.
Drop description
> +
> + "#clock-cells":
> + const: 0
> +
> + enable-reg:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description:
> + Offset of the clock enable register within the PMC register space.
> +
> + enable-bit:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + maximum: 31
> + description:
> + Bit index controlling clock enable.
> +
> + divisor-reg:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description:
> + Offset of the clock divisor register within the PMC register space.
> +
> + divisor-mask:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + default: 0x1f
> + description:
> + Bitmask describing the divisor field inside divisor-reg.
> +
> +required:
> + - compatible
> + - "#clock-cells"
> +
> +allOf:
> + - if:
> + properties:
> + compatible:
> + enum:
> + - via,vt8500-pll-clock
> + - wm,wm8650-pll-clock
> + - wm,wm8750-pll-clock
> + - wm,wm8850-pll-clock
> + then:
> + required:
> + - reg
> + - clocks
> +
> + - if:
> + properties:
> + compatible:
> + const: via,vt8500-device-clock
> + then:
> + required:
> + - clocks
> + anyOf:
> + - required:
> + - enable-reg
> + - enable-bit
> + - required:
> + - divisor-reg
reg: false, no?
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + / {
> + compatible = "via,wm8650";
> + model = "Wondermedia WM8650";
> +
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + ref25: clock-25000000 {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <25000000>;
> + };
Drop everything above
> +
> + plla: clock@200 {
> + compatible = "wm,wm8650-pll-clock";
> + reg = <0x200 0x04>;
> + clocks = <&ref25>;
> + #clock-cells = <0>;
> + };
> +
> + clksdhc: clock {
Entire binding is for part of other device, so where is the rest? This
should not be done separately from the parent. And then example goes
only to one place.
Best regards,
Krzysztof
^ permalink raw reply
* Re: [PATCH v2] dt-bindings: clock: via,vt8500: Convert to DT Schema
From: Rob Herring (Arm) @ 2026-05-21 23:32 UTC (permalink / raw)
To: Udaya Kiran Challa
Cc: linux-rtc, conor+dt, krzk+dt, mturquette, skhan, me, linux-kernel,
sboyd, devicetree
In-Reply-To: <20260521170810.19702-1-challauday369@gmail.com>
On Thu, 21 May 2026 22:37:28 +0530, Udaya Kiran Challa wrote:
> Convert the VIA/Wondermedia VT8500 and Wondermedia WM8xxx series SoCs clock
> controller binding from the legacy text format to DT schema.
>
> Signed-off-by: Udaya Kiran Challa <challauday369@gmail.com>
> ---
> Changelog:
> Changes since v1:
> - Add default value for divisor-mask
> - Add required properties compatible and model
> - Fix example node name
> - Update example size cells and reg value
>
> Link to v1:https://lore.kernel.org/all/20260520025131.17772-1-challauday369@gmail.com/
> ---
> .../bindings/clock/via,vt8500-clock.yaml | 126 ++++++++++++++++++
> .../devicetree/bindings/clock/vt8500.txt | 74 ----------
> 2 files changed, 126 insertions(+), 74 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/clock/via,vt8500-clock.yaml
> delete mode 100644 Documentation/devicetree/bindings/clock/vt8500.txt
>
My bot found errors running 'make dt_binding_check' on your patch:
yamllint warnings/errors:
dtschema/dtc warnings/errors:
Documentation/devicetree/bindings/clock/via,vt8500-clock.example.dtb: /: failed to match any schema with compatible: ['via,wm8650']
doc reference errors (make refcheckdocs):
See https://patchwork.kernel.org/project/devicetree/patch/20260521170810.19702-1-challauday369@gmail.com
The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.
^ permalink raw reply
* [PATCH v2] dt-bindings: clock: via,vt8500: Convert to DT Schema
From: Udaya Kiran Challa @ 2026-05-21 17:07 UTC (permalink / raw)
To: mturquette, sboyd, robh, krzk+dt, conor+dt
Cc: skhan, me, linux-rtc, devicetree, linux-kernel,
Udaya Kiran Challa
Convert the VIA/Wondermedia VT8500 and Wondermedia WM8xxx series SoCs clock
controller binding from the legacy text format to DT schema.
Signed-off-by: Udaya Kiran Challa <challauday369@gmail.com>
---
Changelog:
Changes since v1:
- Add default value for divisor-mask
- Add required properties compatible and model
- Fix example node name
- Update example size cells and reg value
Link to v1:https://lore.kernel.org/all/20260520025131.17772-1-challauday369@gmail.com/
---
.../bindings/clock/via,vt8500-clock.yaml | 126 ++++++++++++++++++
.../devicetree/bindings/clock/vt8500.txt | 74 ----------
2 files changed, 126 insertions(+), 74 deletions(-)
create mode 100644 Documentation/devicetree/bindings/clock/via,vt8500-clock.yaml
delete mode 100644 Documentation/devicetree/bindings/clock/vt8500.txt
diff --git a/Documentation/devicetree/bindings/clock/via,vt8500-clock.yaml b/Documentation/devicetree/bindings/clock/via,vt8500-clock.yaml
new file mode 100644
index 000000000000..9e19103866bc
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/via,vt8500-clock.yaml
@@ -0,0 +1,126 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/via,vt8500-clock.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: VIA/Wondermedia VT8500 Clock Controller
+
+maintainers:
+ - Michael Turquette <mturquette@baylibre.com>
+ - Stephen Boyd <sboyd@kernel.org>
+
+description: |
+ Clock controller bindings for VIA/Wondermedia VT8500 and Wondermedia WM8xxx
+ series SoCs.
+
+properties:
+ compatible:
+ enum:
+ - via,vt8500-pll-clock
+ - wm,wm8650-pll-clock
+ - wm,wm8750-pll-clock
+ - wm,wm8850-pll-clock
+ - via,vt8500-device-clock
+
+ reg:
+ maxItems: 1
+ description:
+ Offset of the PLL register within the PMC register space.
+
+ clocks:
+ maxItems: 1
+ description:
+ Parent reference clock.
+
+ "#clock-cells":
+ const: 0
+
+ enable-reg:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ Offset of the clock enable register within the PMC register space.
+
+ enable-bit:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ maximum: 31
+ description:
+ Bit index controlling clock enable.
+
+ divisor-reg:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ Offset of the clock divisor register within the PMC register space.
+
+ divisor-mask:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ default: 0x1f
+ description:
+ Bitmask describing the divisor field inside divisor-reg.
+
+required:
+ - compatible
+ - "#clock-cells"
+
+allOf:
+ - if:
+ properties:
+ compatible:
+ enum:
+ - via,vt8500-pll-clock
+ - wm,wm8650-pll-clock
+ - wm,wm8750-pll-clock
+ - wm,wm8850-pll-clock
+ then:
+ required:
+ - reg
+ - clocks
+
+ - if:
+ properties:
+ compatible:
+ const: via,vt8500-device-clock
+ then:
+ required:
+ - clocks
+ anyOf:
+ - required:
+ - enable-reg
+ - enable-bit
+ - required:
+ - divisor-reg
+
+additionalProperties: false
+
+examples:
+ - |
+ / {
+ compatible = "via,wm8650";
+ model = "Wondermedia WM8650";
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ ref25: clock-25000000 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <25000000>;
+ };
+
+ plla: clock@200 {
+ compatible = "wm,wm8650-pll-clock";
+ reg = <0x200 0x04>;
+ clocks = <&ref25>;
+ #clock-cells = <0>;
+ };
+
+ clksdhc: clock {
+ compatible = "via,vt8500-device-clock";
+ clocks = <&plla>;
+ divisor-reg = <0x328>;
+ divisor-mask = <0x3f>;
+ enable-reg = <0x254>;
+ enable-bit = <18>;
+ #clock-cells = <0>;
+ };
+ };
diff --git a/Documentation/devicetree/bindings/clock/vt8500.txt b/Documentation/devicetree/bindings/clock/vt8500.txt
deleted file mode 100644
index 91d71cc0314a..000000000000
--- a/Documentation/devicetree/bindings/clock/vt8500.txt
+++ /dev/null
@@ -1,74 +0,0 @@
-Device Tree Clock bindings for arch-vt8500
-
-This binding uses the common clock binding[1].
-
-[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
-
-Required properties:
-- compatible : shall be one of the following:
- "via,vt8500-pll-clock" - for a VT8500/WM8505 PLL clock
- "wm,wm8650-pll-clock" - for a WM8650 PLL clock
- "wm,wm8750-pll-clock" - for a WM8750 PLL clock
- "wm,wm8850-pll-clock" - for a WM8850 PLL clock
- "via,vt8500-device-clock" - for a VT/WM device clock
-
-Required properties for PLL clocks:
-- reg : shall be the control register offset from PMC base for the pll clock.
-- clocks : shall be the input parent clock phandle for the clock. This should
- be the reference clock.
-- #clock-cells : from common clock binding; shall be set to 0.
-
-Required properties for device clocks:
-- clocks : shall be the input parent clock phandle for the clock. This should
- be a pll output.
-- #clock-cells : from common clock binding; shall be set to 0.
-
-
-Device Clocks
-
-Device clocks are required to have one or both of the following sets of
-properties:
-
-
-Gated device clocks:
-
-Required properties:
-- enable-reg : shall be the register offset from PMC base for the enable
- register.
-- enable-bit : shall be the bit within enable-reg to enable/disable the clock.
-
-
-Divisor device clocks:
-
-Required property:
-- divisor-reg : shall be the register offset from PMC base for the divisor
- register.
-Optional property:
-- divisor-mask : shall be the mask for the divisor register. Defaults to 0x1f
- if not specified.
-
-
-For example:
-
-ref25: ref25M {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <25000000>;
-};
-
-plla: plla {
- #clock-cells = <0>;
- compatible = "wm,wm8650-pll-clock";
- clocks = <&ref25>;
- reg = <0x200>;
-};
-
-sdhc: sdhc {
- #clock-cells = <0>;
- compatible = "via,vt8500-device-clock";
- clocks = <&pllb>;
- divisor-reg = <0x328>;
- divisor-mask = <0x3f>;
- enable-reg = <0x254>;
- enable-bit = <18>;
-};
--
2.43.0
^ permalink raw reply related
* Re: (subset) [PATCH v7 00/10] Support for Samsung S2MU005 PMIC and its sub-devices
From: Lee Jones @ 2026-05-21 16:05 UTC (permalink / raw)
To: Lee Jones, Pavel Machek, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, MyungJoo Ham, Chanwoo Choi, Sebastian Reichel,
Krzysztof Kozlowski, André Draszik, Alexandre Belloni,
Jonathan Corbet, Shuah Khan, Nam Tran,
Łukasz Lebiedziński, Yassine Oudjana,
Kaustabh Chakraborty
Cc: linux-leds, devicetree, linux-kernel, linux-pm, linux-samsung-soc,
linux-rtc, linux-doc, Conor Dooley, Krzysztof Kozlowski
In-Reply-To: <20260516-s2mu005-pmic-v7-0-73f9702fb461@disroot.org>
On Sat, 16 May 2026 03:08:32 +0530, Kaustabh Chakraborty wrote:
> S2MU005 is an MFD chip manufactured by Samsung Electronics. This is
> found in various devices manufactured by Samsung and others, including
> all Exynos 7870 devices. It is known to have the following features:
>
> 1. Two LED channels with adjustable brightness for use as a torch, or a
> flash strobe.
> 2. An RGB LED with 8-bit channels. Usually programmed as a notification
> indicator.
> 3. An MUIC, which works with USB micro-B (and USB-C?). For the micro-B
> variant though, it measures the ID-GND resistance using an internal
> ADC.
> 4. A charger device, which reports if charger is online, voltage,
> resistance, etc.
>
> [...]
Applied, thanks!
[01/10] dt-bindings: leds: document Samsung S2M series PMIC flash LED device
commit: a794673949f1aa1dd948ce3ea436af48ea83d7b2
[06/10] leds: flash: add support for Samsung S2M series PMIC flash LED device
commit: f0878c58430c378c47aaece1b29484e4ae8d7faf
[07/10] leds: rgb: add support for Samsung S2M series PMIC RGB LED device
commit: 366ed7a6d22e682e6dfd4d64d8f543bc70c6b58e
[08/10] Documentation: leds: document pattern behavior of Samsung S2M series PMIC RGB LEDs
commit: 1795fd2dbe84ef4d393b69a0b2a3b371f810bde5
--
Lee Jones [李琼斯]
^ permalink raw reply
* Re: (subset) [PATCH v7 00/10] Support for Samsung S2MU005 PMIC and its sub-devices
From: Lee Jones @ 2026-05-21 16:01 UTC (permalink / raw)
To: Lee Jones, Pavel Machek, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, MyungJoo Ham, Chanwoo Choi, Sebastian Reichel,
Krzysztof Kozlowski, André Draszik, Alexandre Belloni,
Jonathan Corbet, Shuah Khan, Nam Tran,
Łukasz Lebiedziński, Yassine Oudjana,
Kaustabh Chakraborty
Cc: linux-leds, devicetree, linux-kernel, linux-pm, linux-samsung-soc,
linux-rtc, linux-doc, Conor Dooley, Krzysztof Kozlowski
In-Reply-To: <20260516-s2mu005-pmic-v7-0-73f9702fb461@disroot.org>
On Sat, 16 May 2026 03:08:32 +0530, Kaustabh Chakraborty wrote:
> S2MU005 is an MFD chip manufactured by Samsung Electronics. This is
> found in various devices manufactured by Samsung and others, including
> all Exynos 7870 devices. It is known to have the following features:
>
> 1. Two LED channels with adjustable brightness for use as a torch, or a
> flash strobe.
> 2. An RGB LED with 8-bit channels. Usually programmed as a notification
> indicator.
> 3. An MUIC, which works with USB micro-B (and USB-C?). For the micro-B
> variant though, it measures the ID-GND resistance using an internal
> ADC.
> 4. A charger device, which reports if charger is online, voltage,
> resistance, etc.
>
> [...]
Applied, thanks!
[03/10] dt-bindings: mfd: add documentation for S2MU005 PMIC
commit: 12479cc3750c6b741b6d87392e393d959cf2f013
[04/10] mfd: sec: add support for S2MU005 PMIC
commit: aeff14ae7271cc3070312f894de9a4e075855d31
[05/10] mfd: sec: set DMA coherent mask
commit: ba1f536070abd595a141c683f617eed3c6e42297
--
Lee Jones [李琼斯]
^ permalink raw reply
* [PATCH v2 2/2] platform/x86: amd-pmc: Fix S0i3 wakeup with alarmtimer
From: Mario Limonciello @ 2026-05-21 4:37 UTC (permalink / raw)
To: Shyam Sundar S K, Alexandre Belloni
Cc: Hans de Goede, Ilpo Järvinen, platform-driver-x86,
linux-kernel, linux-rtc, Thomas Gleixner, Mario Limonciello
In-Reply-To: <20260521043714.1022930-1-mario.limonciello@amd.com>
It was reported that suspend-then-hibernate stopped working with modern
systemd versions on AMD Cezanne systems. The reason for this breakage
was because systemd switched to using alarmtimer instead of the wakealarm
sysfs file.
On AMD Cezanne systems, amd_pmc_verify_czn_rtc() programs a secondary
timer with the alarm time. This was introduced by
commit 59348401ebed ("platform/x86: amd-pmc: Add special handling for
timer based S0i3 wakeup"). However, this function uses rtc_read_alarm(),
which only reads the aie_timer, not the next expiring timer from the
timerqueue.
When both alarmtimer and wakealarm are active, the first expiring timer
might be the alarmtimer, but amd_pmc_verify_czn_rtc() would only see
the aie_timer, potentially missing the earlier alarm.
Switch to rtc_read_next_alarm() to read whichever timer will fire next.
Also handle -ENOENT (no alarm pending) explicitly as a non-error case.
Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3591
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
---
drivers/platform/x86/amd/pmc/pmc.c | 9 ++++++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/platform/x86/amd/pmc/pmc.c b/drivers/platform/x86/amd/pmc/pmc.c
index 50f5784f2aa2e..8cd2db0ccaacd 100644
--- a/drivers/platform/x86/amd/pmc/pmc.c
+++ b/drivers/platform/x86/amd/pmc/pmc.c
@@ -595,9 +595,12 @@ static int amd_pmc_verify_czn_rtc(struct amd_pmc_dev *pdev, u32 *arg)
rtc_device = rtc_class_open("rtc0");
if (!rtc_device)
return 0;
- rc = rtc_read_alarm(rtc_device, &alarm);
- if (rc)
- return rc;
+ rc = rtc_read_next_alarm(rtc_device, &alarm);
+ if (rc) {
+ if (rc == -ENOENT)
+ dev_dbg(pdev->dev, "no alarm pending\n");
+ return rc == -ENOENT ? 0 : rc;
+ }
if (!alarm.enabled) {
dev_dbg(pdev->dev, "alarm not enabled\n");
return 0;
--
2.43.0
^ permalink raw reply related
* [PATCH v2 0/2] Fix S0i3 wakeup with alarmtimer
From: Mario Limonciello @ 2026-05-21 4:37 UTC (permalink / raw)
To: Shyam Sundar S K, Alexandre Belloni
Cc: Hans de Goede, Ilpo Järvinen, platform-driver-x86,
linux-kernel, linux-rtc, Thomas Gleixner, Mario Limonciello
It was reported that suspend-then-hibernate stopped working with modern
systemd versions on AMD Cezanne systems. The reason for this breakage
was because systemd switched to using alarmtimer instead of the wakealarm
sysfs file.
But really it uncovered deeper problems with how these timers work. Adjust
the code accordingly.
Mario Limonciello (2):
rtc: Add rtc_read_next_alarm() to read next expiring timer
platform/x86: amd-pmc: Fix S0i3 wakeup with alarmtimer
drivers/platform/x86/amd/pmc/pmc.c | 9 ++++---
drivers/rtc/interface.c | 40 ++++++++++++++++++++++++++++++
include/linux/rtc.h | 2 ++
3 files changed, 48 insertions(+), 3 deletions(-)
--
2.43.0
^ permalink raw reply
* [PATCH v2 1/2] rtc: Add rtc_read_next_alarm() to read next expiring timer
From: Mario Limonciello @ 2026-05-21 4:37 UTC (permalink / raw)
To: Shyam Sundar S K, Alexandre Belloni
Cc: Hans de Goede, Ilpo Järvinen, platform-driver-x86,
linux-kernel, linux-rtc, Thomas Gleixner, Mario Limonciello
In-Reply-To: <20260521043714.1022930-1-mario.limonciello@amd.com>
Add a new function rtc_read_next_alarm() that reads the next expiring
alarm from the RTC timerqueue. This is different from rtc_read_alarm(),
which only reads the aie_timer.
The wakealarm sysfs file programs the rtc->aie_timer, whereas the
alarmtimer suspend routine programs its own timer into the RTC timerqueue.
Both timers end up in the RTC's timerqueue, and the first expiring timer
is what gets armed in the hardware.
This new function allows code to query which alarm will actually fire
next, regardless of which subsystem programmed it. This is needed by
platform code that needs to program secondary timers based on the
actual next wakeup time.
Link: https://lore.kernel.org/all/87ed50z0le.ffs@tglx
Suggested-by: Thomas Gleixner <tglx@linutronix.de>
Assisted-by: Claude:claude-opus-4-6
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
---
v2:
* Drop pointless variable assignments
* Add missing ":" in kdoc for returns
---
drivers/rtc/interface.c | 40 ++++++++++++++++++++++++++++++++++++++++
include/linux/rtc.h | 2 ++
2 files changed, 42 insertions(+)
diff --git a/drivers/rtc/interface.c b/drivers/rtc/interface.c
index 1906f4884a834..7859be8f2a923 100644
--- a/drivers/rtc/interface.c
+++ b/drivers/rtc/interface.c
@@ -384,6 +384,46 @@ int __rtc_read_alarm(struct rtc_device *rtc, struct rtc_wkalrm *alarm)
return err;
}
+/**
+ * rtc_read_next_alarm - read the next expiring alarm
+ * @rtc: RTC device
+ * @alarm: storage for the alarm information
+ *
+ * Read the next expiring alarm from the RTC timerqueue. This returns
+ * the alarm that will actually fire next, which may be different from
+ * rtc_read_alarm() if multiple timers are queued (e.g., alarmtimer
+ * and wakealarm sysfs both active).
+ *
+ * Returns: 0 on success, -ENOENT if no alarm is pending, or other error.
+ */
+int rtc_read_next_alarm(struct rtc_device *rtc, struct rtc_wkalrm *alarm)
+{
+ struct timerqueue_node *next;
+ int err;
+
+ if (!rtc || !alarm)
+ return -EINVAL;
+
+ err = mutex_lock_interruptible(&rtc->ops_lock);
+ if (err)
+ return err;
+
+ next = timerqueue_getnext(&rtc->timerqueue);
+ if (!next) {
+ err = -ENOENT;
+ goto unlock;
+ }
+
+ memset(alarm, 0, sizeof(struct rtc_wkalrm));
+ alarm->time = rtc_ktime_to_tm(next->expires);
+ alarm->enabled = 1;
+
+unlock:
+ mutex_unlock(&rtc->ops_lock);
+ return err;
+}
+EXPORT_SYMBOL_GPL(rtc_read_next_alarm);
+
int rtc_read_alarm(struct rtc_device *rtc, struct rtc_wkalrm *alarm)
{
int err;
diff --git a/include/linux/rtc.h b/include/linux/rtc.h
index 95da051fb155d..c09fc22819d0c 100644
--- a/include/linux/rtc.h
+++ b/include/linux/rtc.h
@@ -190,6 +190,8 @@ extern int rtc_set_time(struct rtc_device *rtc, struct rtc_time *tm);
int __rtc_read_alarm(struct rtc_device *rtc, struct rtc_wkalrm *alarm);
extern int rtc_read_alarm(struct rtc_device *rtc,
struct rtc_wkalrm *alrm);
+extern int rtc_read_next_alarm(struct rtc_device *rtc,
+ struct rtc_wkalrm *alrm);
extern int rtc_set_alarm(struct rtc_device *rtc,
struct rtc_wkalrm *alrm);
extern int rtc_initialize_alarm(struct rtc_device *rtc,
--
2.43.0
^ permalink raw reply related
* [PATCH v2 3/3] rtc: ds1307: Add driver for Epson RX8901CE
From: Fredrik M Olsson @ 2026-05-20 14:48 UTC (permalink / raw)
To: Alexandre Belloni, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Nobuhiro Iwamatsu
Cc: linux-rtc, devicetree, linux-kernel, Fredrik M Olsson, kernel
In-Reply-To: <20260520-ds1307-rx8901-add-v2-0-e069ea32e1db@axis.com>
Adds support for:
- Reading and writing time to/from the RTC.
- Changing Backup Switch Mode (BSM) to DISABLED/DIRECT/LEVEL using the
RTC_PARAM_SET ioctl.
- Optionally enabling battery charging.
- Reading the battery voltage low status using the RTC_VL_READ ioctl
(only supported in LEVEL BSM), which also reports invalid time
information if the VLF flag is set.
Signed-off-by: Fredrik M Olsson <fredrik.m.olsson@axis.com>
---
drivers/rtc/rtc-ds1307.c | 216 +++++++++++++++++++++++++++++++++++++++++++++--
1 file changed, 207 insertions(+), 9 deletions(-)
diff --git a/drivers/rtc/rtc-ds1307.c b/drivers/rtc/rtc-ds1307.c
index bf42c250ea7d..23dd104aa2be 100644
--- a/drivers/rtc/rtc-ds1307.c
+++ b/drivers/rtc/rtc-ds1307.c
@@ -9,6 +9,7 @@
*/
#include <linux/bcd.h>
+#include <linux/bitfield.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/kstrtox.h>
@@ -48,6 +49,7 @@ enum ds_type {
mcp794xx,
rx_8025,
rx_8130,
+ rx_8901,
last_ds_type /* always last */
/* rs5c372 too? different address... */
};
@@ -129,6 +131,18 @@ enum ds_type {
#define RX8130_REG_CONTROL1_INIEN BIT(4)
#define RX8130_REG_CONTROL1_CHGEN BIT(5)
+#define RX8901_REG_INTF 0x0e
+#define RX8901_REG_INTF_VLF BIT(1)
+#define RX8901_REG_PWSW_CFG 0x37
+#define RX8901_REG_PWSW_CFG_SWSEL GENMASK(3, 2)
+#define RX8901_REG_PWSW_CFG_VBATLDETEN BIT(4)
+#define RX8901_REG_PWSW_CFG_INIEN BIT(6)
+#define RX8901_REG_PWSW_CFG_CHGEN BIT(7)
+#define RX8901_REG_BUF_INTF 0x46
+#define RX8901_REG_BUF_INTF_VBATLF BIT(3)
+#define RX8901_SWSEL_PRIMARY_BACKUP 0x1
+#define RX8901_SWSEL_PRIMARY 0x2
+
#define MCP794XX_REG_CONTROL 0x07
# define MCP794XX_BIT_ALM0_EN 0x10
# define MCP794XX_BIT_ALM1_EN 0x20
@@ -192,8 +206,8 @@ struct chip_desc {
irq_handler_t irq_handler;
const struct rtc_class_ops *rtc_ops;
u16 trickle_charger_reg;
- u8 (*do_trickle_setup)(struct ds1307 *, u32,
- bool);
+ int (*do_trickle_setup)(struct ds1307 *ds1307, u32 ohms,
+ bool diode);
/* Does the RTC require trickle-resistor-ohms to select the value of
* the resistor between Vcc and Vbackup?
*/
@@ -216,6 +230,7 @@ static int ds1307_get_time(struct device *dev, struct rtc_time *t)
if (ds1307->type == rx_8130) {
unsigned int regflag;
+
ret = regmap_read(ds1307->regmap, RX8130_REG_FLAG, ®flag);
if (ret) {
dev_err(dev, "%s error %d\n", "read", ret);
@@ -226,6 +241,19 @@ static int ds1307_get_time(struct device *dev, struct rtc_time *t)
dev_warn_once(dev, "oscillator failed, set time!\n");
return -EINVAL;
}
+ } else if (ds1307->type == rx_8901) {
+ unsigned int regflag;
+
+ ret = regmap_read(ds1307->regmap, RX8901_REG_INTF, ®flag);
+ if (ret) {
+ dev_dbg(dev, "%s error %d\n", "read", ret);
+ return ret;
+ }
+
+ if (regflag & RX8901_REG_INTF_VLF) {
+ dev_warn_once(dev, "oscillator failed, set time!\n");
+ return -EINVAL;
+ }
}
/* read the RTC date and time registers all at once */
@@ -307,7 +335,7 @@ static int ds1307_get_time(struct device *dev, struct rtc_time *t)
tmp = regs[DS1307_REG_HOUR] & 0x3f;
t->tm_hour = bcd2bin(tmp);
/* rx8130 is bit position, not BCD */
- if (ds1307->type == rx_8130)
+ if (ds1307->type == rx_8130 || ds1307->type == rx_8901)
t->tm_wday = fls(regs[DS1307_REG_WDAY] & 0x7f) - 1;
else
t->tm_wday = bcd2bin(regs[DS1307_REG_WDAY] & 0x07) - 1;
@@ -358,7 +386,7 @@ static int ds1307_set_time(struct device *dev, struct rtc_time *t)
regs[DS1307_REG_MIN] = bin2bcd(t->tm_min);
regs[DS1307_REG_HOUR] = bin2bcd(t->tm_hour);
/* rx8130 is bit position, not BCD */
- if (ds1307->type == rx_8130)
+ if (ds1307->type == rx_8130 || ds1307->type == rx_8901)
regs[DS1307_REG_WDAY] = 1 << t->tm_wday;
else
regs[DS1307_REG_WDAY] = bin2bcd(t->tm_wday + 1);
@@ -422,11 +450,132 @@ static int ds1307_set_time(struct device *dev, struct rtc_time *t)
dev_err(dev, "%s error %d\n", "write", result);
return result;
}
+ } else if (ds1307->type == rx_8901) {
+ /*
+ * clear Voltage Loss Flag as data is available now (writing 1
+ * to the other bits in the INTF register has no effect)
+ */
+ result = regmap_write(ds1307->regmap, RX8901_REG_INTF,
+ 0xff ^ RX8901_REG_INTF_VLF);
+ if (result) {
+ dev_dbg(dev, "%s error %d\n", "write", result);
+ return result;
+ }
}
return 0;
}
+#ifdef CONFIG_RTC_INTF_DEV
+static int rx8901_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
+{
+ struct ds1307 *ds1307 = dev_get_drvdata(dev);
+ unsigned int regflag, tmp = 0;
+ int ret = 0;
+
+ switch (cmd) {
+ case RTC_VL_READ:
+ ret = regmap_read(ds1307->regmap, RX8901_REG_INTF, ®flag);
+ if (ret)
+ return ret;
+
+ if (regflag & RX8901_REG_INTF_VLF)
+ tmp |= RTC_VL_DATA_INVALID;
+
+ ret = regmap_read(ds1307->regmap, RX8901_REG_BUF_INTF, ®flag);
+ if (ret)
+ return ret;
+
+ if (regflag & RX8901_REG_BUF_INTF_VBATLF)
+ tmp |= RTC_VL_BACKUP_LOW;
+
+ return put_user(tmp, (unsigned int __user *)arg);
+ default:
+ return -ENOIOCTLCMD;
+ }
+ return ret;
+}
+
+static int rx8901_param_get(struct device *dev, struct rtc_param *param)
+{
+ struct ds1307 *ds1307 = dev_get_drvdata(dev);
+ unsigned int regflag;
+ int ret;
+
+ switch (param->param) {
+ case RTC_PARAM_BACKUP_SWITCH_MODE:
+ ret = regmap_read(ds1307->regmap, RX8901_REG_PWSW_CFG, ®flag);
+ if (ret)
+ return ret;
+
+ if (regflag & RX8901_REG_PWSW_CFG_INIEN) {
+ param->uvalue = RTC_BSM_LEVEL;
+ } else {
+ unsigned int swsel = FIELD_GET(RX8901_REG_PWSW_CFG_SWSEL, regflag);
+
+ if (swsel == RX8901_SWSEL_PRIMARY_BACKUP)
+ param->uvalue = RTC_BSM_DIRECT;
+ else
+ param->uvalue = RTC_BSM_DISABLED;
+ }
+
+ break;
+
+ default:
+ return -EINVAL;
+ }
+ return ret;
+}
+
+static int rx8901_param_set(struct device *dev, struct rtc_param *param)
+{
+ struct ds1307 *ds1307 = dev_get_drvdata(dev);
+ unsigned int regmask;
+ unsigned int regval;
+ int ret;
+
+ switch (param->param) {
+ case RTC_PARAM_BACKUP_SWITCH_MODE:
+
+ switch (param->uvalue) {
+ case RTC_BSM_DISABLED:
+ /* Only main power supply is used */
+ regmask = RX8901_REG_PWSW_CFG_INIEN |
+ RX8901_REG_PWSW_CFG_SWSEL;
+ regval = FIELD_PREP(RX8901_REG_PWSW_CFG_SWSEL,
+ RX8901_SWSEL_PRIMARY) |
+ FIELD_PREP(RX8901_REG_PWSW_CFG_INIEN, 0);
+ break;
+ case RTC_BSM_DIRECT:
+ /* Main and battery power supply is put in parallel (default) */
+ regmask = RX8901_REG_PWSW_CFG_INIEN |
+ RX8901_REG_PWSW_CFG_SWSEL;
+ regval = FIELD_PREP(RX8901_REG_PWSW_CFG_SWSEL,
+ RX8901_SWSEL_PRIMARY_BACKUP) |
+ FIELD_PREP(RX8901_REG_PWSW_CFG_INIEN, 0);
+ break;
+ case RTC_BSM_LEVEL:
+ /* Enable auto power switching between main and backup power supply */
+ regmask = RX8901_REG_PWSW_CFG_INIEN;
+ regval = FIELD_PREP(RX8901_REG_PWSW_CFG_INIEN, 1);
+ break;
+ default:
+ return -EINVAL;
+ }
+ ret = regmap_update_bits(ds1307->regmap, RX8901_REG_PWSW_CFG, regmask, regval);
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ return ret;
+}
+#else
+#define rx8901_ioctl NULL
+#define rx8901_param_get NULL
+#define rx8901_param_set NULL
+#endif
+
static int ds1337_read_alarm(struct device *dev, struct rtc_wkalrm *t)
{
struct ds1307 *ds1307 = dev_get_drvdata(dev);
@@ -533,7 +682,7 @@ static int ds1307_alarm_irq_enable(struct device *dev, unsigned int enabled)
enabled ? DS1337_BIT_A1IE : 0);
}
-static u8 do_trickle_setup_ds1339(struct ds1307 *ds1307, u32 ohms, bool diode)
+static int do_trickle_setup_ds1339(struct ds1307 *ds1307, u32 ohms, bool diode)
{
u8 setup = (diode) ? DS1307_TRICKLE_CHARGER_DIODE :
DS1307_TRICKLE_CHARGER_NO_DIODE;
@@ -558,7 +707,7 @@ static u8 do_trickle_setup_ds1339(struct ds1307 *ds1307, u32 ohms, bool diode)
return setup;
}
-static u8 do_trickle_setup_rx8130(struct ds1307 *ds1307, u32 ohms, bool diode)
+static int do_trickle_setup_rx8130(struct ds1307 *ds1307, u32 ohms, bool diode)
{
/* make sure that the backup battery is enabled */
u8 setup = RX8130_REG_CONTROL1_INIEN;
@@ -568,6 +717,26 @@ static u8 do_trickle_setup_rx8130(struct ds1307 *ds1307, u32 ohms, bool diode)
return setup;
}
+static int do_trickle_setup_rx8901(struct ds1307 *ds1307, u32 ohms __always_unused, bool diode)
+{
+ int ret;
+ unsigned int setup;
+
+ ret = regmap_read(ds1307->regmap, RX8901_REG_PWSW_CFG, &setup);
+ if (ret) {
+ dev_err(ds1307->dev, "Failed to read PWSW_CFG register\n");
+ return ret;
+ }
+
+ /* Enable low battery voltage detection */
+ setup |= RX8901_REG_PWSW_CFG_VBATLDETEN;
+
+ if (diode)
+ setup |= RX8901_REG_PWSW_CFG_CHGEN;
+
+ return setup;
+}
+
static irqreturn_t rx8130_irq(int irq, void *dev_id)
{
struct ds1307 *ds1307 = dev_id;
@@ -960,6 +1129,14 @@ static const struct rtc_class_ops rx8130_rtc_ops = {
.alarm_irq_enable = rx8130_alarm_irq_enable,
};
+static const struct rtc_class_ops rx8901_rtc_ops = {
+ .read_time = ds1307_get_time,
+ .set_time = ds1307_set_time,
+ .ioctl = rx8901_ioctl,
+ .param_get = rx8901_param_get,
+ .param_set = rx8901_param_set,
+};
+
static const struct rtc_class_ops mcp794xx_rtc_ops = {
.read_time = ds1307_get_time,
.set_time = ds1307_set_time,
@@ -1040,6 +1217,12 @@ static const struct chip_desc chips[last_ds_type] = {
.trickle_charger_reg = RX8130_REG_CONTROL1,
.do_trickle_setup = &do_trickle_setup_rx8130,
},
+ [rx_8901] = {
+ .offset = 0x0,
+ .rtc_ops = &rx8901_rtc_ops,
+ .trickle_charger_reg = RX8901_REG_PWSW_CFG,
+ .do_trickle_setup = &do_trickle_setup_rx8901,
+ },
[m41t0] = {
.rtc_ops = &m41txx_rtc_ops,
},
@@ -1081,6 +1264,7 @@ static const struct i2c_device_id ds1307_id[] = {
{ "rx8025", rx_8025 },
{ "isl12057", ds_1337 },
{ "rx8130", rx_8130 },
+ { "rx8901", rx_8901 },
{ }
};
MODULE_DEVICE_TABLE(i2c, ds1307_id);
@@ -1158,6 +1342,10 @@ static const struct of_device_id ds1307_of_match[] = {
.compatible = "epson,rx8130",
.data = (void *)rx_8130
},
+ {
+ .compatible = "epson,rx8901",
+ .data = (void *)rx_8901
+ },
{ }
};
MODULE_DEVICE_TABLE(of, ds1307_of_match);
@@ -1292,7 +1480,7 @@ static int ds1307_nvram_write(void *priv, unsigned int offset, void *val,
/*----------------------------------------------------------------------*/
-static u8 ds1307_trickle_init(struct ds1307 *ds1307,
+static int ds1307_trickle_init(struct ds1307 *ds1307,
const struct chip_desc *chip)
{
u32 ohms, chargeable;
@@ -1745,7 +1933,7 @@ static int ds1307_probe(struct i2c_client *client)
bool ds1307_can_wakeup_device = false;
unsigned char regs[8];
struct ds1307_platform_data *pdata = dev_get_platdata(&client->dev);
- u8 trickle_charger_setup = 0;
+ int trickle_charger_setup = 0;
ds1307 = devm_kzalloc(&client->dev, sizeof(struct ds1307), GFP_KERNEL);
if (!ds1307)
@@ -1781,12 +1969,15 @@ static int ds1307_probe(struct i2c_client *client)
else if (pdata->trickle_charger_setup)
trickle_charger_setup = pdata->trickle_charger_setup;
+ if (trickle_charger_setup < 0)
+ return trickle_charger_setup;
+
if (trickle_charger_setup && chip->trickle_charger_reg) {
dev_dbg(ds1307->dev,
"writing trickle charger info 0x%x to 0x%x\n",
trickle_charger_setup, chip->trickle_charger_reg);
regmap_write(ds1307->regmap, chip->trickle_charger_reg,
- trickle_charger_setup);
+ (u8)trickle_charger_setup);
}
/*
@@ -1990,6 +2181,13 @@ static int ds1307_probe(struct i2c_client *client)
}
}
+ switch (ds1307->type) {
+ case rx_8901:
+ set_bit(RTC_FEATURE_BACKUP_SWITCH_MODE, ds1307->rtc->features);
+ break;
+ default:
+ }
+
ds1307->rtc->ops = chip->rtc_ops ?: &ds13xx_rtc_ops;
err = ds1307_add_frequency_test(ds1307);
if (err)
--
2.43.0
^ permalink raw reply related
* [PATCH v2 1/3] dt-bindings: rtc: ds1307: Add epson,rx8901
From: Fredrik M Olsson @ 2026-05-20 14:48 UTC (permalink / raw)
To: Alexandre Belloni, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Nobuhiro Iwamatsu
Cc: linux-rtc, devicetree, linux-kernel, Fredrik M Olsson, kernel,
Krzysztof Kozlowski, Nobuhiro Iwamatsu
In-Reply-To: <20260520-ds1307-rx8901-add-v2-0-e069ea32e1db@axis.com>
Add compatible string epson,rx8901 for the Epson RX8901CE RTC.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Reviewed-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@mail.toshiba>
Signed-off-by: Fredrik M Olsson <fredrik.m.olsson@axis.com>
---
Documentation/devicetree/bindings/rtc/rtc-ds1307.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/rtc/rtc-ds1307.yaml b/Documentation/devicetree/bindings/rtc/rtc-ds1307.yaml
index 98d10e680144..9b2796804f07 100644
--- a/Documentation/devicetree/bindings/rtc/rtc-ds1307.yaml
+++ b/Documentation/devicetree/bindings/rtc/rtc-ds1307.yaml
@@ -31,6 +31,7 @@ properties:
- epson,rx8025
- isil,isl12057
- epson,rx8130
+ - epson,rx8901
- items:
- enum:
--
2.43.0
^ permalink raw reply related
* [PATCH v2 0/3] rtc: ds1307: Add support for Epson RX8901CE
From: Fredrik M Olsson @ 2026-05-20 14:48 UTC (permalink / raw)
To: Alexandre Belloni, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Nobuhiro Iwamatsu
Cc: linux-rtc, devicetree, linux-kernel, Fredrik M Olsson, kernel,
Krzysztof Kozlowski, Nobuhiro Iwamatsu
Add basic support for the Epson RX8901CE RTC.
Datasheet: https://download.epsondevice.com/td/pdf/app/RX8901CE_en.pdf
Also includes a bug fix for an issue with reading the weekday from the
RTC which affects both the existing rx8130 and this rx8901 driver.
Signed-off-by: Fredrik M Olsson <fredrik.m.olsson@axis.com>
---
Changes in v2:
- Squashed the Voltage Low status patch into the driver patch
- Switch from dev_err to dev_dbg
- Implement Backup Switch Mode (BSM) ioctl instead of hard coding
switching mode.
- Change the prototype for the do_trickle_setup function pointer in
order to make it possible to propagate error codes from the added
PWSW_CFG register read operation. This read operation is added so not
to override previously set register fields.
- Link to v1: https://lore.kernel.org/r/20251219-ds1307-rx8901-add-v1-0-b13f346ebe93@axis.com
---
Fredrik M Olsson (3):
dt-bindings: rtc: ds1307: Add epson,rx8901
rtc: ds1307: Fix off-by-one issue with wday for rx8130
rtc: ds1307: Add driver for Epson RX8901CE
.../devicetree/bindings/rtc/rtc-ds1307.yaml | 1 +
drivers/rtc/rtc-ds1307.c | 218 ++++++++++++++++++++-
2 files changed, 209 insertions(+), 10 deletions(-)
---
base-commit: 27fa82620cbaa89a7fc11ac3057701d598813e87
change-id: 20251126-ds1307-rx8901-add-a0fe173093e3
Best regards,
--
Fredrik M Olsson <fredrik.m.olsson@axis.com>
^ permalink raw reply
* [PATCH v2 2/3] rtc: ds1307: Fix off-by-one issue with wday for rx8130
From: Fredrik M Olsson @ 2026-05-20 14:48 UTC (permalink / raw)
To: Alexandre Belloni, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Nobuhiro Iwamatsu
Cc: linux-rtc, devicetree, linux-kernel, Fredrik M Olsson, kernel
In-Reply-To: <20260520-ds1307-rx8901-add-v2-0-e069ea32e1db@axis.com>
The RTC represent each weekday with a individual bit set in the WDAY
register, where the 0th bit represent the first day of the week and the
6th bit represents the last day of the week. For each passed day the
chip performs a rotary-left-shift by one to advance the weekday by one.
The tm_wday field represent weekdays by a value in the range of 0-6.
The fls() function return the bit index of the last bit set. To handle
when there are no bits set it will return 0, and if the 0th bit is set
it will return 1, and if the 1st bit is set it will return 2, and so on.
In order to make the result of the fls() function fall into the expected
range of 0-6 (instead of 1-7) this patch subtracts one from the result
(which matches how the value is written in ds1307_set_time()).
Fixes: 204756f016726 ("rtc: ds1307: Fix wday settings for rx8130")
Reviewed-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.x90@mail.toshiba>
Signed-off-by: Fredrik M Olsson <fredrik.m.olsson@axis.com>
---
drivers/rtc/rtc-ds1307.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/rtc/rtc-ds1307.c b/drivers/rtc/rtc-ds1307.c
index 7205c59ff729..bf42c250ea7d 100644
--- a/drivers/rtc/rtc-ds1307.c
+++ b/drivers/rtc/rtc-ds1307.c
@@ -308,7 +308,7 @@ static int ds1307_get_time(struct device *dev, struct rtc_time *t)
t->tm_hour = bcd2bin(tmp);
/* rx8130 is bit position, not BCD */
if (ds1307->type == rx_8130)
- t->tm_wday = fls(regs[DS1307_REG_WDAY] & 0x7f);
+ t->tm_wday = fls(regs[DS1307_REG_WDAY] & 0x7f) - 1;
else
t->tm_wday = bcd2bin(regs[DS1307_REG_WDAY] & 0x07) - 1;
t->tm_mday = bcd2bin(regs[DS1307_REG_MDAY] & 0x3f);
--
2.43.0
^ permalink raw reply related
* Re: [PATCH] dt-bindings: clock: via,vt8500: Convert to DT Schema
From: Rob Herring (Arm) @ 2026-05-20 3:41 UTC (permalink / raw)
To: Udaya Kiran Challa
Cc: devicetree, sboyd, linux-kernel, linux-rtc, me, krzk+dt, skhan,
mturquette, conor+dt
In-Reply-To: <20260520025131.17772-1-challauday369@gmail.com>
On Wed, 20 May 2026 08:18:53 +0530, Udaya Kiran Challa wrote:
> Convert the VIA/Wondermedia VT8500 and Wondermedia WM8xxx series SoCs clock
> controller binding from the legacy text format to DT schema.
>
> Signed-off-by: Udaya Kiran Challa <challauday369@gmail.com>
> ---
> .../bindings/clock/via,vt8500-clock.yaml | 122 ++++++++++++++++++
> .../devicetree/bindings/clock/vt8500.txt | 74 -----------
> 2 files changed, 122 insertions(+), 74 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/clock/via,vt8500-clock.yaml
> delete mode 100644 Documentation/devicetree/bindings/clock/vt8500.txt
>
My bot found errors running 'make dt_binding_check' on your patch:
yamllint warnings/errors:
dtschema/dtc warnings/errors:
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/clock/via,vt8500-clock.example.dtb: /: clock@200:reg:0: [512] is too short
from schema $id: http://devicetree.org/schemas/root-node.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/clock/via,vt8500-clock.example.dtb: /: #size-cells: 0 is not one of [1, 2]
from schema $id: http://devicetree.org/schemas/root-node.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/clock/via,vt8500-clock.example.dtb: /: 'compatible' is a required property
from schema $id: http://devicetree.org/schemas/root-node.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/clock/via,vt8500-clock.example.dtb: /: 'model' is a required property
from schema $id: http://devicetree.org/schemas/root-node.yaml
doc reference errors (make refcheckdocs):
See https://patchwork.kernel.org/project/devicetree/patch/20260520025131.17772-1-challauday369@gmail.com
The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.
^ permalink raw reply
* [PATCH] dt-bindings: clock: via,vt8500: Convert to DT Schema
From: Udaya Kiran Challa @ 2026-05-20 2:48 UTC (permalink / raw)
To: mturquette, sboyd, robh, krzk+dt, conor+dt
Cc: skhan, me, linux-rtc, devicetree, linux-kernel,
Udaya Kiran Challa
Convert the VIA/Wondermedia VT8500 and Wondermedia WM8xxx series SoCs clock
controller binding from the legacy text format to DT schema.
Signed-off-by: Udaya Kiran Challa <challauday369@gmail.com>
---
.../bindings/clock/via,vt8500-clock.yaml | 122 ++++++++++++++++++
.../devicetree/bindings/clock/vt8500.txt | 74 -----------
2 files changed, 122 insertions(+), 74 deletions(-)
create mode 100644 Documentation/devicetree/bindings/clock/via,vt8500-clock.yaml
delete mode 100644 Documentation/devicetree/bindings/clock/vt8500.txt
diff --git a/Documentation/devicetree/bindings/clock/via,vt8500-clock.yaml b/Documentation/devicetree/bindings/clock/via,vt8500-clock.yaml
new file mode 100644
index 000000000000..9c312d11a6a7
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/via,vt8500-clock.yaml
@@ -0,0 +1,122 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/via,vt8500-clock.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: VIA/Wondermedia VT8500 Clock Controller
+
+maintainers:
+ - Michael Turquette <mturquette@baylibre.com>
+ - Stephen Boyd <sboyd@kernel.org>
+
+description: |
+ Clock controller bindings for VIA/Wondermedia VT8500 and Wondermedia WM8xxx
+ series SoCs.
+
+properties:
+ compatible:
+ enum:
+ - via,vt8500-pll-clock
+ - wm,wm8650-pll-clock
+ - wm,wm8750-pll-clock
+ - wm,wm8850-pll-clock
+ - via,vt8500-device-clock
+
+ reg:
+ maxItems: 1
+ description:
+ Offset of the PLL register within the PMC register space.
+
+ clocks:
+ maxItems: 1
+ description:
+ Parent reference clock.
+
+ "#clock-cells":
+ const: 0
+
+ enable-reg:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ Offset of the clock enable register within the PMC register space.
+
+ enable-bit:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ maximum: 31
+ description:
+ Bit index controlling clock enable.
+
+ divisor-reg:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ Offset of the clock divisor register within the PMC register space.
+
+ divisor-mask:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ Bitmask describing the divisor field inside divisor-reg.
+
+required:
+ - compatible
+ - "#clock-cells"
+
+allOf:
+ - if:
+ properties:
+ compatible:
+ enum:
+ - via,vt8500-pll-clock
+ - wm,wm8650-pll-clock
+ - wm,wm8750-pll-clock
+ - wm,wm8850-pll-clock
+ then:
+ required:
+ - reg
+ - clocks
+
+ - if:
+ properties:
+ compatible:
+ const: via,vt8500-device-clock
+ then:
+ required:
+ - clocks
+ anyOf:
+ - required:
+ - enable-reg
+ - enable-bit
+ - required:
+ - divisor-reg
+
+additionalProperties: false
+
+examples:
+ - |
+ / {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ref25: ref25M {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <25000000>;
+ };
+
+ plla: clock@200 {
+ compatible = "wm,wm8650-pll-clock";
+ reg = <0x200>;
+ clocks = <&ref25>;
+ #clock-cells = <0>;
+ };
+
+ clksdhc: clock {
+ compatible = "via,vt8500-device-clock";
+ clocks = <&plla>;
+ divisor-reg = <0x328>;
+ divisor-mask = <0x3f>;
+ enable-reg = <0x254>;
+ enable-bit = <18>;
+ #clock-cells = <0>;
+ };
+ };
diff --git a/Documentation/devicetree/bindings/clock/vt8500.txt b/Documentation/devicetree/bindings/clock/vt8500.txt
deleted file mode 100644
index 91d71cc0314a..000000000000
--- a/Documentation/devicetree/bindings/clock/vt8500.txt
+++ /dev/null
@@ -1,74 +0,0 @@
-Device Tree Clock bindings for arch-vt8500
-
-This binding uses the common clock binding[1].
-
-[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
-
-Required properties:
-- compatible : shall be one of the following:
- "via,vt8500-pll-clock" - for a VT8500/WM8505 PLL clock
- "wm,wm8650-pll-clock" - for a WM8650 PLL clock
- "wm,wm8750-pll-clock" - for a WM8750 PLL clock
- "wm,wm8850-pll-clock" - for a WM8850 PLL clock
- "via,vt8500-device-clock" - for a VT/WM device clock
-
-Required properties for PLL clocks:
-- reg : shall be the control register offset from PMC base for the pll clock.
-- clocks : shall be the input parent clock phandle for the clock. This should
- be the reference clock.
-- #clock-cells : from common clock binding; shall be set to 0.
-
-Required properties for device clocks:
-- clocks : shall be the input parent clock phandle for the clock. This should
- be a pll output.
-- #clock-cells : from common clock binding; shall be set to 0.
-
-
-Device Clocks
-
-Device clocks are required to have one or both of the following sets of
-properties:
-
-
-Gated device clocks:
-
-Required properties:
-- enable-reg : shall be the register offset from PMC base for the enable
- register.
-- enable-bit : shall be the bit within enable-reg to enable/disable the clock.
-
-
-Divisor device clocks:
-
-Required property:
-- divisor-reg : shall be the register offset from PMC base for the divisor
- register.
-Optional property:
-- divisor-mask : shall be the mask for the divisor register. Defaults to 0x1f
- if not specified.
-
-
-For example:
-
-ref25: ref25M {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <25000000>;
-};
-
-plla: plla {
- #clock-cells = <0>;
- compatible = "wm,wm8650-pll-clock";
- clocks = <&ref25>;
- reg = <0x200>;
-};
-
-sdhc: sdhc {
- #clock-cells = <0>;
- compatible = "via,vt8500-device-clock";
- clocks = <&pllb>;
- divisor-reg = <0x328>;
- divisor-mask = <0x3f>;
- enable-reg = <0x254>;
- enable-bit = <18>;
-};
--
2.43.0
^ permalink raw reply related
* Re: [PATCH] dt-bindings: rtc: Convert rtc-cmos binding to YAML
From: Conor Dooley @ 2026-05-19 16:37 UTC (permalink / raw)
To: Teja Sai Charan B
Cc: Alexandre Belloni, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
linux-rtc, devicetree, linux-kernel
In-Reply-To: <20260519095929.76011-1-tejaasaye@gmail.com>
[-- Attachment #1: Type: text/plain, Size: 3761 bytes --]
On Tue, May 19, 2026 at 03:29:29PM +0530, Teja Sai Charan B wrote:
> From: Teja Sai Charan Bellamkonda <tejaasaye@gmail.com>
>
> Convert the rtc-cmos devicetree bindings to dt schema.
>
> Signed-off-by: Teja Sai Charan Bellamkonda <tejaasaye@gmail.com>
> ---
> .../devicetree/bindings/rtc/rtc-cmos.txt | 27 ---------
> .../devicetree/bindings/rtc/rtc-cmos.yaml | 55 +++++++++++++++++++
> 2 files changed, 55 insertions(+), 27 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/rtc/rtc-cmos.txt
> create mode 100644 Documentation/devicetree/bindings/rtc/rtc-cmos.yaml
>
> diff --git a/Documentation/devicetree/bindings/rtc/rtc-cmos.txt b/Documentation/devicetree/bindings/rtc/rtc-cmos.txt
> deleted file mode 100644
> index 7d7b5f6bda65..000000000000
> --- a/Documentation/devicetree/bindings/rtc/rtc-cmos.txt
> +++ /dev/null
> @@ -1,27 +0,0 @@
> - Motorola mc146818 compatible RTC
> -~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> -
> -Required properties:
> - - compatible : "motorola,mc146818"
> - - reg : should contain registers location and length.
> -
> -Optional properties:
> - - interrupts : should contain interrupt.
> - - ctrl-reg : Contains the initial value of the control register also
> - called "Register B".
> - - freq-reg : Contains the initial value of the frequency register also
> - called "Register A".
> -
> -"Register A" and "B" are usually initialized by the firmware (BIOS for
> -instance). If this is not done, it can be performed by the driver.
> -
> -ISA Example:
> -
> - rtc@70 {
> - compatible = "motorola,mc146818";
> - interrupts = <8 3>;
> - interrupt-parent = <&ioapic1>;
> - ctrl-reg = <2>;
> - freq-reg = <0x26>;
> - reg = <1 0x70 2>;
> - };
> diff --git a/Documentation/devicetree/bindings/rtc/rtc-cmos.yaml b/Documentation/devicetree/bindings/rtc/rtc-cmos.yaml
> new file mode 100644
> index 000000000000..e368264ac483
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/rtc/rtc-cmos.yaml
> @@ -0,0 +1,55 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/rtc/rtc-cmos.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Motorola mc146818 compatible RTC
> +
> +maintainers:
> + - Alexandre Belloni <alexandre.belloni@bootlin.com>
> +
> +properties:
> + compatible:
> + const: motorola,mc146818
It's not a problem with the conversion per se, but as sashiko pointed out,
there's an intel device with a soc-specific compatible.
Could you document that here, with a fallback to this motorola one
please?
pw-bot: changes-requested
Thanks,
Conor.
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + ctrl-reg:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description:
> + Initial value of the control register
> + (also known as Register B).
> +
> + freq-reg:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description:
> + Initial value of the frequency register
> + (also known as Register A).
> +
> +required:
> + - compatible
> + - reg
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + bus {
> + #address-cells = <2>;
> + #size-cells = <1>;
> +
> + rtc@70 {
> + compatible = "motorola,mc146818";
> + reg = <1 0x70 2>;
Please be consistent here about using only hex, even if the text file
didn't do that.
> +
> + interrupts = <8 3>;
> +
> + ctrl-reg = <2>;
> + freq-reg = <0x26>;
> + };
> + };
> --
> 2.43.0
>
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