* [PATCH v2 06/10] rtc: rzn1: Dynamically calculate synchronization delay based on clock rate
From: Prabhakar @ 2026-07-01 14:29 UTC (permalink / raw)
To: Miquel Raynal, Alexandre Belloni, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Geert Uytterhoeven,
Magnus Damm, Wolfram Sang
Cc: linux-rtc, linux-renesas-soc, devicetree, linux-kernel, Prabhakar,
Biju Das, Fabrizio Castro, Lad Prabhakar
In-Reply-To: <20260701142953.2014895-1-prabhakar.mahadev-lad.rj@bp.renesas.com>
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Replace the hardcoded hardware synchronization delays with a calculated
time window derived from the operating sub-clock frequency.
The driver currently hardcodes microsecond ranges assuming a fixed
sub-clock frequency of 32.768 kHz. Newer SoC variants, such as the
RZ/T2H, drive this hardware block using a much faster clock rate
(~195.3 kHz). Hardcoding these wait windows forces faster blocks to
over-sleep, introducing unnecessary delays during clock initialization
and register configuration.
Calculate the duration of the required clock cycles in microseconds based
on the runtime clock rate, and store this value in the driver private
structure to adjust the usleep_range() and readl_poll_timeout() boundaries
dynamically.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
v1->v2:
- Initialized rate variable to 32768 to avoid timeout_us of 0.
---
drivers/rtc/rtc-rzn1.c | 19 ++++++++++++++-----
1 file changed, 14 insertions(+), 5 deletions(-)
diff --git a/drivers/rtc/rtc-rzn1.c b/drivers/rtc/rtc-rzn1.c
index a82f2d7f7a2f..1a45a3d895cf 100644
--- a/drivers/rtc/rtc-rzn1.c
+++ b/drivers/rtc/rtc-rzn1.c
@@ -70,6 +70,7 @@ struct rzn1_rtc {
*/
spinlock_t ctl1_access_lock;
struct rtc_time tm_alarm;
+ unsigned long sync_time;
};
static void rzn1_rtc_get_time_snapshot(struct rzn1_rtc *rtc, struct rtc_time *tm)
@@ -120,8 +121,8 @@ static int rzn1_rtc_set_time(struct device *dev, struct rtc_time *tm)
/* Hold the counter if it was counting up */
writel(RZN1_RTC_CTL2_WAIT, rtc->base + RZN1_RTC_CTL2);
- /* Wait for the counter to stop: two 32k clock cycles */
- usleep_range(61, 100);
+ /* Wait for the counter to stop: two RTC_PCLK clock cycles */
+ usleep_range(rtc->sync_time, rtc->sync_time + 100);
ret = readl_poll_timeout(rtc->base + RZN1_RTC_CTL2, val,
val & RZN1_RTC_CTL2_WST, 0, 100);
if (ret)
@@ -379,10 +380,10 @@ static const struct rtc_class_ops rzn1_rtc_ops_scmp = {
static int rzn1_rtc_probe(struct platform_device *pdev)
{
+ unsigned long rate = 32768;
struct rzn1_rtc *rtc;
u32 val, scmp_val = 0;
struct clk *xtal;
- unsigned long rate;
int irq, ret;
rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
@@ -431,12 +432,20 @@ static int rzn1_rtc_probe(struct platform_device *pdev)
scmp_val = RZN1_RTC_CTL0_SLSB_SCMP;
}
+ /*
+ * The internal clock counter operates in synchronization with the
+ * RTC_PCLK clock. Calculate the duration of two RTC_PCLK clock
+ * cycles in microseconds required for operations to complete.
+ */
+ rtc->sync_time = DIV_ROUND_UP(2 * NSEC_PER_MSEC, rate);
+
/* Disable controller during SUBU/SCMP setup */
val = readl(rtc->base + RZN1_RTC_CTL0) & ~RZN1_RTC_CTL0_CE;
writel(val, rtc->base + RZN1_RTC_CTL0);
- /* Wait 2-4 32k clock cycles for the disabled controller */
+ /* Wait 2-4 RTC_PCLK clock cycles for the disabled controller to stop */
ret = readl_poll_timeout(rtc->base + RZN1_RTC_CTL0, val,
- !(val & RZN1_RTC_CTL0_CEST), 62, 123);
+ !(val & RZN1_RTC_CTL0_CEST), rtc->sync_time,
+ rtc->sync_time * 2);
if (ret)
goto dis_runtime_pm;
--
2.54.0
^ permalink raw reply related
* [PATCH v2 07/10] rtc: rzn1: Use temporary variable for struct device
From: Prabhakar @ 2026-07-01 14:29 UTC (permalink / raw)
To: Miquel Raynal, Alexandre Belloni, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Geert Uytterhoeven,
Magnus Damm, Wolfram Sang
Cc: linux-rtc, linux-renesas-soc, devicetree, linux-kernel, Prabhakar,
Biju Das, Fabrizio Castro, Lad Prabhakar
In-Reply-To: <20260701142953.2014895-1-prabhakar.mahadev-lad.rj@bp.renesas.com>
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Use a temporary variable for the struct device pointers to avoid
dereferencing.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---
v1->v2:
- Added Reviewed-by tag.
---
drivers/rtc/rtc-rzn1.c | 23 ++++++++++++-----------
1 file changed, 12 insertions(+), 11 deletions(-)
diff --git a/drivers/rtc/rtc-rzn1.c b/drivers/rtc/rtc-rzn1.c
index 1a45a3d895cf..4540d764edfb 100644
--- a/drivers/rtc/rtc-rzn1.c
+++ b/drivers/rtc/rtc-rzn1.c
@@ -380,13 +380,14 @@ static const struct rtc_class_ops rzn1_rtc_ops_scmp = {
static int rzn1_rtc_probe(struct platform_device *pdev)
{
+ struct device *dev = &pdev->dev;
unsigned long rate = 32768;
struct rzn1_rtc *rtc;
u32 val, scmp_val = 0;
struct clk *xtal;
int irq, ret;
- rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
+ rtc = devm_kzalloc(dev, sizeof(*rtc), GFP_KERNEL);
if (!rtc)
return -ENOMEM;
@@ -394,13 +395,13 @@ static int rzn1_rtc_probe(struct platform_device *pdev)
rtc->base = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(rtc->base))
- return dev_err_probe(&pdev->dev, PTR_ERR(rtc->base), "Missing reg\n");
+ return dev_err_probe(dev, PTR_ERR(rtc->base), "Missing reg\n");
irq = platform_get_irq_byname(pdev, "alarm");
if (irq < 0)
return irq;
- rtc->rtcdev = devm_rtc_allocate_device(&pdev->dev);
+ rtc->rtcdev = devm_rtc_allocate_device(dev);
if (IS_ERR(rtc->rtcdev))
return PTR_ERR(rtc->rtcdev);
@@ -408,15 +409,15 @@ static int rzn1_rtc_probe(struct platform_device *pdev)
rtc->rtcdev->range_max = RTC_TIMESTAMP_END_2099;
rtc->rtcdev->alarm_offset_max = 7 * 86400;
- ret = devm_pm_runtime_enable(&pdev->dev);
+ ret = devm_pm_runtime_enable(dev);
if (ret < 0)
return ret;
- ret = pm_runtime_resume_and_get(&pdev->dev);
+ ret = pm_runtime_resume_and_get(dev);
if (ret < 0)
return ret;
/* Only switch to scmp if we have an xtal clock with a valid rate and != 32768 */
- xtal = devm_clk_get_optional(&pdev->dev, "xtal");
+ xtal = devm_clk_get_optional(dev, "xtal");
if (IS_ERR(xtal)) {
ret = PTR_ERR(xtal);
goto dis_runtime_pm;
@@ -467,9 +468,9 @@ static int rzn1_rtc_probe(struct platform_device *pdev)
spin_lock_init(&rtc->ctl1_access_lock);
- ret = devm_request_irq(&pdev->dev, irq, rzn1_rtc_alarm_irq, 0, "RZN1 RTC Alarm", rtc);
+ ret = devm_request_irq(dev, irq, rzn1_rtc_alarm_irq, 0, "RZN1 RTC Alarm", rtc);
if (ret) {
- dev_err(&pdev->dev, "RTC alarm interrupt not available\n");
+ dev_err(dev, "RTC alarm interrupt not available\n");
goto dis_runtime_pm;
}
@@ -479,12 +480,12 @@ static int rzn1_rtc_probe(struct platform_device *pdev)
goto dis_runtime_pm;
}
if (irq >= 0)
- ret = devm_request_irq(&pdev->dev, irq, rzn1_rtc_1s_irq, 0, "RZN1 RTC 1s", rtc);
+ ret = devm_request_irq(dev, irq, rzn1_rtc_1s_irq, 0, "RZN1 RTC 1s", rtc);
if (irq < 0 || ret) {
set_bit(RTC_FEATURE_ALARM_RES_MINUTE, rtc->rtcdev->features);
clear_bit(RTC_FEATURE_UPDATE_INTERRUPT, rtc->rtcdev->features);
- dev_warn(&pdev->dev, "RTC pps interrupt not available. Alarm has only minute accuracy\n");
+ dev_warn(dev, "RTC pps interrupt not available. Alarm has only minute accuracy\n");
}
ret = devm_rtc_register_device(rtc->rtcdev);
@@ -494,7 +495,7 @@ static int rzn1_rtc_probe(struct platform_device *pdev)
return 0;
dis_runtime_pm:
- pm_runtime_put(&pdev->dev);
+ pm_runtime_put(dev);
return ret;
}
--
2.54.0
^ permalink raw reply related
* [PATCH v2 08/10] rtc: rzn1: Consistently use dev_err_probe()
From: Prabhakar @ 2026-07-01 14:29 UTC (permalink / raw)
To: Miquel Raynal, Alexandre Belloni, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Geert Uytterhoeven,
Magnus Damm, Wolfram Sang
Cc: linux-rtc, linux-renesas-soc, devicetree, linux-kernel, Prabhakar,
Biju Das, Fabrizio Castro, Lad Prabhakar
In-Reply-To: <20260701142953.2014895-1-prabhakar.mahadev-lad.rj@bp.renesas.com>
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Use dev_err_probe() in the IRQ request error path to make error handling
consistent with the rest of rzn1_rtc_probe().
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---
v1->v2:
- Added Reviewed-by tags.
---
drivers/rtc/rtc-rzn1.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/rtc/rtc-rzn1.c b/drivers/rtc/rtc-rzn1.c
index 4540d764edfb..f236b08e3ca9 100644
--- a/drivers/rtc/rtc-rzn1.c
+++ b/drivers/rtc/rtc-rzn1.c
@@ -470,7 +470,7 @@ static int rzn1_rtc_probe(struct platform_device *pdev)
ret = devm_request_irq(dev, irq, rzn1_rtc_alarm_irq, 0, "RZN1 RTC Alarm", rtc);
if (ret) {
- dev_err(dev, "RTC alarm interrupt not available\n");
+ dev_err_probe(dev, ret, "RTC alarm interrupt not available\n");
goto dis_runtime_pm;
}
--
2.54.0
^ permalink raw reply related
* [PATCH v2 09/10] rtc: rzn1: use FIELD_PREP/FIELD_GET and GENMASK for register access
From: Prabhakar @ 2026-07-01 14:29 UTC (permalink / raw)
To: Miquel Raynal, Alexandre Belloni, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Geert Uytterhoeven,
Magnus Damm, Wolfram Sang
Cc: linux-rtc, linux-renesas-soc, devicetree, linux-kernel, Prabhakar,
Biju Das, Fabrizio Castro, Lad Prabhakar
In-Reply-To: <20260701142953.2014895-1-prabhakar.mahadev-lad.rj@bp.renesas.com>
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Replace open-coded shift and mask operations with the bitfield API.
Note that the weekday field is changed from an explicit 0x0f mask to
an 8-bit field definition, matching the hardware manual. This does not
change behaviour, as valid weekday values cannot exceed 7.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
v1->v2:
- Made use of RZN1_RTC_SUBU_RTCA0FX mask for SUBU register access instead of 0x3F.
---
drivers/rtc/rtc-rzn1.c | 50 +++++++++++++++++++++++-------------------
1 file changed, 28 insertions(+), 22 deletions(-)
diff --git a/drivers/rtc/rtc-rzn1.c b/drivers/rtc/rtc-rzn1.c
index f236b08e3ca9..2afd8251c868 100644
--- a/drivers/rtc/rtc-rzn1.c
+++ b/drivers/rtc/rtc-rzn1.c
@@ -12,6 +12,8 @@
*/
#include <linux/bcd.h>
+#include <linux/bitfield.h>
+#include <linux/bits.h>
#include <linux/clk.h>
#include <linux/init.h>
#include <linux/iopoll.h>
@@ -39,14 +41,18 @@
#define RZN1_RTC_CTL2_STOPPED (RZN1_RTC_CTL2_WAIT | RZN1_RTC_CTL2_WST)
#define RZN1_RTC_TIME 0x30
-#define RZN1_RTC_TIME_MIN_SHIFT 8
-#define RZN1_RTC_TIME_HOUR_SHIFT 16
+#define RZN1_RTC_TIME_SEC GENMASK(7, 0)
+#define RZN1_RTC_TIME_MIN GENMASK(15, 8)
+#define RZN1_RTC_TIME_HOUR GENMASK(23, 16)
+
#define RZN1_RTC_CAL 0x34
-#define RZN1_RTC_CAL_DAY_SHIFT 8
-#define RZN1_RTC_CAL_MON_SHIFT 16
-#define RZN1_RTC_CAL_YEAR_SHIFT 24
+#define RZN1_RTC_CAL_WDAY GENMASK(7, 0)
+#define RZN1_RTC_CAL_DAY GENMASK(15, 8)
+#define RZN1_RTC_CAL_MON GENMASK(23, 16)
+#define RZN1_RTC_CAL_YEAR GENMASK(31, 24)
#define RZN1_RTC_SUBU 0x38
+#define RZN1_RTC_SUBU_RTCA0FX GENMASK(5, 0)
#define RZN1_RTC_SUBU_DEV BIT(7)
#define RZN1_RTC_SUBU_DECR BIT(6)
@@ -78,15 +84,15 @@ static void rzn1_rtc_get_time_snapshot(struct rzn1_rtc *rtc, struct rtc_time *tm
u32 val;
val = readl(rtc->base + RZN1_RTC_TIMEC);
- tm->tm_sec = bcd2bin(val);
- tm->tm_min = bcd2bin(val >> RZN1_RTC_TIME_MIN_SHIFT);
- tm->tm_hour = bcd2bin(val >> RZN1_RTC_TIME_HOUR_SHIFT);
+ tm->tm_sec = bcd2bin(FIELD_GET(RZN1_RTC_TIME_SEC, val));
+ tm->tm_min = bcd2bin(FIELD_GET(RZN1_RTC_TIME_MIN, val));
+ tm->tm_hour = bcd2bin(FIELD_GET(RZN1_RTC_TIME_HOUR, val));
val = readl(rtc->base + RZN1_RTC_CALC);
- tm->tm_wday = val & 0x0f;
- tm->tm_mday = bcd2bin(val >> RZN1_RTC_CAL_DAY_SHIFT);
- tm->tm_mon = bcd2bin(val >> RZN1_RTC_CAL_MON_SHIFT) - 1;
- tm->tm_year = bcd2bin(val >> RZN1_RTC_CAL_YEAR_SHIFT) + 100;
+ tm->tm_wday = FIELD_GET(RZN1_RTC_CAL_WDAY, val);
+ tm->tm_mday = bcd2bin(FIELD_GET(RZN1_RTC_CAL_DAY, val));
+ tm->tm_mon = bcd2bin(FIELD_GET(RZN1_RTC_CAL_MON, val)) - 1;
+ tm->tm_year = bcd2bin(FIELD_GET(RZN1_RTC_CAL_YEAR, val)) + 100;
}
static int rzn1_rtc_read_time(struct device *dev, struct rtc_time *tm)
@@ -129,15 +135,15 @@ static int rzn1_rtc_set_time(struct device *dev, struct rtc_time *tm)
return ret;
}
- val = bin2bcd(tm->tm_sec);
- val |= bin2bcd(tm->tm_min) << RZN1_RTC_TIME_MIN_SHIFT;
- val |= bin2bcd(tm->tm_hour) << RZN1_RTC_TIME_HOUR_SHIFT;
+ val = FIELD_PREP(RZN1_RTC_TIME_SEC, bin2bcd(tm->tm_sec)) |
+ FIELD_PREP(RZN1_RTC_TIME_MIN, bin2bcd(tm->tm_min)) |
+ FIELD_PREP(RZN1_RTC_TIME_HOUR, bin2bcd(tm->tm_hour));
writel(val, rtc->base + RZN1_RTC_TIME);
- val = tm->tm_wday;
- val |= bin2bcd(tm->tm_mday) << RZN1_RTC_CAL_DAY_SHIFT;
- val |= bin2bcd(tm->tm_mon + 1) << RZN1_RTC_CAL_MON_SHIFT;
- val |= bin2bcd(tm->tm_year - 100) << RZN1_RTC_CAL_YEAR_SHIFT;
+ val = FIELD_PREP(RZN1_RTC_CAL_WDAY, tm->tm_wday) |
+ FIELD_PREP(RZN1_RTC_CAL_DAY, bin2bcd(tm->tm_mday)) |
+ FIELD_PREP(RZN1_RTC_CAL_MON, bin2bcd(tm->tm_mon + 1)) |
+ FIELD_PREP(RZN1_RTC_CAL_YEAR, bin2bcd(tm->tm_year - 100));
writel(val, rtc->base + RZN1_RTC_CAL);
writel(0, rtc->base + RZN1_RTC_CTL2);
@@ -300,12 +306,12 @@ static int rzn1_rtc_read_offset(struct device *dev, long *offset)
val = readl(rtc->base + RZN1_RTC_SUBU);
ppb_per_step = val & RZN1_RTC_SUBU_DEV ? 1017 : 3051;
subtract = val & RZN1_RTC_SUBU_DECR;
- val &= 0x3F;
+ val = FIELD_GET(RZN1_RTC_SUBU_RTCA0FX, val);
if (!val)
*offset = 0;
else if (subtract)
- *offset = -(((~val) & 0x3F) + 1) * ppb_per_step;
+ *offset = -(((~val) & RZN1_RTC_SUBU_RTCA0FX) + 1) * ppb_per_step;
else
*offset = (val - 1) * ppb_per_step;
@@ -347,7 +353,7 @@ static int rzn1_rtc_set_offset(struct device *dev, long offset)
subu |= steps + 1;
} else {
subu |= RZN1_RTC_SUBU_DECR;
- subu |= (~(-steps - 1)) & 0x3F;
+ subu |= (~(-steps - 1)) & RZN1_RTC_SUBU_RTCA0FX;
}
ret = readl_poll_timeout(rtc->base + RZN1_RTC_CTL2, ctl2,
--
2.54.0
^ permalink raw reply related
* [PATCH v2 10/10] rtc: rzn1: Add support for Renesas RZ/T2H and RZ/N2H SoCs
From: Prabhakar @ 2026-07-01 14:29 UTC (permalink / raw)
To: Miquel Raynal, Alexandre Belloni, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Geert Uytterhoeven,
Magnus Damm, Wolfram Sang
Cc: linux-rtc, linux-renesas-soc, devicetree, linux-kernel, Prabhakar,
Biju Das, Fabrizio Castro, Lad Prabhakar
In-Reply-To: <20260701142953.2014895-1-prabhakar.mahadev-lad.rj@bp.renesas.com>
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Add support for the RTC block found on the Renesas RZ/T2H (R9A09G077)
and RZ/N2H (R9A09G087) SoCs by matching the new
"renesas,r9a09g077-rtc" compatible string.
These SoCs integrate a closely related variant of the RZ/N1 RTC IP.
Unlike the RZ/N1 implementation, the RZ/T2H and RZ/N2H variants lack
the RTCA0SUBU register. However, this register is not accessed when
operating in SCMP mode using the existing rzn1_rtc_ops_scmp
configuration, allowing the current driver infrastructure to be reused
without modification.
The RZ/T2H RTC variant also supports a 1 Hz output signal on the
RTCAT1HZ pin, controlled by the RTCA0CTL1[RTCA01HZE] bit. This bit is
marked as reserved in the RZ/N1 hardware manual, making RZ/T2H a
distinct RTC variant despite its overall compatibility with the RZ/N1
implementation.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---
v1->v2:
- Updated commit message to drop reference about RTCA0TCR register.
- Added Reviewed-by tag.
---
drivers/rtc/rtc-rzn1.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/rtc/rtc-rzn1.c b/drivers/rtc/rtc-rzn1.c
index 2afd8251c868..9469160129df 100644
--- a/drivers/rtc/rtc-rzn1.c
+++ b/drivers/rtc/rtc-rzn1.c
@@ -517,6 +517,7 @@ static void rzn1_rtc_remove(struct platform_device *pdev)
}
static const struct of_device_id rzn1_rtc_of_match[] = {
+ { .compatible = "renesas,r9a09g077-rtc" },
{ .compatible = "renesas,rzn1-rtc" },
{},
};
--
2.54.0
^ permalink raw reply related
* Re: [PATCH v2 03/10] rtc: rzn1: Fix malformed MODULE_AUTHOR string
From: sashiko-bot @ 2026-07-01 14:32 UTC (permalink / raw)
To: Prabhakar
Cc: wsa+renesas, Alexandre Belloni, linux-rtc, conor+dt, robh,
devicetree
In-Reply-To: <20260701142953.2014895-4-prabhakar.mahadev-lad.rj@bp.renesas.com>
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Fix a malformed MODULE_AUTHOR macro in the rtc-rzn1 driver where a missing
> closing angle bracket on the second author entry creates an invalid format.
> Correct it to the standard "Name <email>" format.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Sashiko has reviewed this patch and found no issues. It looks great!
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260701142953.2014895-1-prabhakar.mahadev-lad.rj@bp.renesas.com?part=3
^ permalink raw reply
* Re: [PATCH v2 01/10] dt-bindings: rtc: renesas,rzn1-rtc: Add RZ/T2H and RZ/N2H support
From: sashiko-bot @ 2026-07-01 14:35 UTC (permalink / raw)
To: Prabhakar
Cc: devicetree, wsa+renesas, linux-rtc, conor+dt, robh,
Alexandre Belloni
In-Reply-To: <20260701142953.2014895-2-prabhakar.mahadev-lad.rj@bp.renesas.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] The new RZ/T2H compatible variant introduces a clock provider capability (1Hz output) without defining or requiring the `#clock-cells` property in the binding.
--
commit ab03f97b4f3eb2134c97b3b0fa5f6b60ca7a85aa
Author: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
dt-bindings: rtc: renesas,rzn1-rtc: Add RZ/T2H and RZ/N2H support
This commit adds compatible strings and updates the schema for the RTC block
found on the Renesas RZ/T2H and RZ/N2H SoCs. It also notes that the RZ/T2H
variant supports a 1Hz output signal and updates the schema to require the
additional clock inputs used by these SoCs.
> diff --git a/Documentation/devicetree/bindings/rtc/renesas,rzn1-rtc.yaml b/Documentation/devicetree/bindings/rtc/renesas,rzn1-rtc.yaml
> index 1860f0e4c31a2..ea7b039a91e77 100644
> --- a/Documentation/devicetree/bindings/rtc/renesas,rzn1-rtc.yaml
> +++ b/Documentation/devicetree/bindings/rtc/renesas,rzn1-rtc.yaml
[ ... ]
> @@ -54,6 +58,23 @@ required:
> - clock-names
> - power-domains
>
> +allOf:
> + - $ref: rtc.yaml#
> +
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - renesas,r9a09g077-rtc
> + - renesas,r9a09g087-rtc
> + then:
> + properties:
> + clocks:
> + minItems: 2
> + clock-names:
> + minItems: 2
[Severity: Medium]
The commit message states that the RZ/T2H RTC variant supports a 1Hz
output signal, which makes it a clock provider.
Does this mean the #clock-cells property should be defined and added to the
required properties for the renesas,r9a09g077-rtc compatible string in a
conditional block?
Without it, device trees attempting to configure this RTC as a clock provider
might fail validation, and incomplete nodes might incorrectly pass schema
checks.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260701142953.2014895-1-prabhakar.mahadev-lad.rj@bp.renesas.com?part=1
^ permalink raw reply
* Re: [PATCH v2 02/10] rtc: rzn1: Handle EPROBE_DEFER for optional pps interrupt
From: sashiko-bot @ 2026-07-01 14:39 UTC (permalink / raw)
To: Prabhakar
Cc: devicetree, wsa+renesas, conor+dt, Alexandre Belloni, robh,
linux-rtc
In-Reply-To: <20260701142953.2014895-3-prabhakar.mahadev-lad.rj@bp.renesas.com>
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Check for -EPROBE_DEFER from platform_get_irq_byname_optional() and handle
> the deferred probe request properly.
>
> Although the "pps" interrupt is optional, an error code of -EPROBE_DEFER
> indicates that the interrupt subsystem is not yet ready. Intercept this
> specific error condition, assign it to the return value, and jump to the
> dis_runtime_pm label to avoid ignoring a valid probe deferral.
>
> Fixes: eea7791e00f33 ("rtc: rzn1: implement one-second accuracy for alarms")
> Cc: stable@vger.kernel.org
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Sashiko has reviewed this patch and found no issues. It looks great!
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260701142953.2014895-1-prabhakar.mahadev-lad.rj@bp.renesas.com?part=2
^ permalink raw reply
* Re: [PATCH v2 04/10] rtc: Kconfig: Broaden RTC_DRV_RZN1 dependency to ARCH_RENESAS
From: sashiko-bot @ 2026-07-01 14:39 UTC (permalink / raw)
To: Prabhakar
Cc: devicetree, wsa+renesas, conor+dt, Alexandre Belloni, linux-rtc,
robh
In-Reply-To: <20260701142953.2014895-5-prabhakar.mahadev-lad.rj@bp.renesas.com>
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Replace the ARCH_RZN1 dependency with ARCH_RENESAS for the RTC_DRV_RZN1
> config option to make the driver available across both ARM32 and ARM64
> Renesas architectures.
>
> The newer RZ/T2H and RZ/N2H ARM64 SoCs integrate a closely related variant
> of the RTC IP block found on the RZ/N1 SoCs. Update the build dependency
> and expand the Kconfig help text to allow this driver to be selected for
> these additional platforms.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Sashiko has reviewed this patch and found no issues. It looks great!
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260701142953.2014895-1-prabhakar.mahadev-lad.rj@bp.renesas.com?part=4
^ permalink raw reply
* Re: [PATCH v2 07/10] rtc: rzn1: Use temporary variable for struct device
From: sashiko-bot @ 2026-07-01 14:43 UTC (permalink / raw)
To: Prabhakar
Cc: robh, conor+dt, devicetree, wsa+renesas, linux-rtc,
Alexandre Belloni
In-Reply-To: <20260701142953.2014895-8-prabhakar.mahadev-lad.rj@bp.renesas.com>
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Use a temporary variable for the struct device pointers to avoid
> dereferencing.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Sashiko has reviewed this patch and found no issues. It looks great!
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260701142953.2014895-1-prabhakar.mahadev-lad.rj@bp.renesas.com?part=7
^ permalink raw reply
* Re: [PATCH v2 05/10] rtc: rzn1: Fix alarm range check truncation on 32-bit systems
From: sashiko-bot @ 2026-07-01 14:45 UTC (permalink / raw)
To: Prabhakar
Cc: Alexandre Belloni, conor+dt, wsa+renesas, devicetree, robh,
linux-rtc
In-Reply-To: <20260701142953.2014895-6-prabhakar.mahadev-lad.rj@bp.renesas.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
Pre-existing issues:
- [High] Alarm weekday calculation fails when crossing month boundaries, causing the alarm to be scheduled on the wrong day.
--
commit 461f51253cf0a8326dc4e0cd7278977b7ecc0fbd
Author: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
rtc: rzn1: Fix alarm range check truncation on 32-bit systems
This commit resolves the truncation of the alarm and farest timestamps on
32-bit systems. It achieves this by declaring these variables as time64_t
and replacing time_after() with a direct signed comparison.
> diff --git a/drivers/rtc/rtc-rzn1.c b/drivers/rtc/rtc-rzn1.c
> index 866ff595188d8..9969bcefede72 100644
> --- a/drivers/rtc/rtc-rzn1.c
> +++ b/drivers/rtc/rtc-rzn1.c
[ ... ]
> @@ -260,8 +261,8 @@ static int rzn1_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
> {
> struct rzn1_rtc *rtc = dev_get_drvdata(dev);
> struct rtc_time *tm = &alrm->time, tm_now;
> - unsigned long alarm, farest;
> unsigned int days_ahead, wday;
> + time64_t alarm, farest;
> int ret;
>
> ret = rzn1_rtc_read_time(dev, &tm_now);
> @@ -271,7 +272,7 @@ static int rzn1_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
> /* We cannot set alarms more than one week ahead */
> farest = rtc_tm_to_time64(&tm_now) + rtc->rtcdev->alarm_offset_max;
> alarm = rtc_tm_to_time64(tm);
> - if (time_after(alarm, farest))
> + if (alarm > farest)
> return -ERANGE;
>
> /* Convert alarm day into week day */
[Severity: High]
This isn't a bug introduced by this patch, but I noticed a pre-existing
issue in how the weekday is calculated just below this in
rzn1_rtc_set_alarm().
When an alarm is set for the following month (for instance, setting an
alarm for the 1st of next month while today is the 31st), this calculation
is used:
days_ahead = tm->tm_mday - tm_now.tm_mday;
wday = (tm_now.tm_wday + days_ahead) % 7;
Since this only subtracts the day-of-month, wouldn't crossing a month
boundary result in a negative value (e.g., 1 - 31 = -30), which then
underflows the unsigned int days_ahead?
This would then result in an incorrect weekday offset being added to the
current weekday, programming the wrong weekday into the RZN1_RTC_ALW
register.
Should this logic be updated to safely handle month boundaries?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260701142953.2014895-1-prabhakar.mahadev-lad.rj@bp.renesas.com?part=5
^ permalink raw reply
* Re: [PATCH v2 09/10] rtc: rzn1: use FIELD_PREP/FIELD_GET and GENMASK for register access
From: sashiko-bot @ 2026-07-01 14:48 UTC (permalink / raw)
To: Prabhakar
Cc: linux-rtc, conor+dt, robh, wsa+renesas, devicetree,
Alexandre Belloni
In-Reply-To: <20260701142953.2014895-10-prabhakar.mahadev-lad.rj@bp.renesas.com>
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Replace open-coded shift and mask operations with the bitfield API.
>
> Note that the weekday field is changed from an explicit 0x0f mask to
> an 8-bit field definition, matching the hardware manual. This does not
> change behaviour, as valid weekday values cannot exceed 7.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Sashiko has reviewed this patch and found no issues. It looks great!
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260701142953.2014895-1-prabhakar.mahadev-lad.rj@bp.renesas.com?part=9
^ permalink raw reply
* Re: [PATCH v2 06/10] rtc: rzn1: Dynamically calculate synchronization delay based on clock rate
From: sashiko-bot @ 2026-07-01 14:49 UTC (permalink / raw)
To: Prabhakar
Cc: linux-rtc, conor+dt, Alexandre Belloni, robh, devicetree,
wsa+renesas
In-Reply-To: <20260701142953.2014895-7-prabhakar.mahadev-lad.rj@bp.renesas.com>
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
New issues:
- [Low] Incorrect time conversion macro NSEC_PER_MSEC used instead of USEC_PER_SEC for microsecond calculation.
Pre-existing issues:
- [High] Race condition between PM runtime teardown and devres device unregistration can lead to accessing powered-down hardware.
--
commit f3a6e4b28e451318639b10e7927bf136a7d225d3
Author: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
rtc: rzn1: Dynamically calculate synchronization delay based on clock rate
This patch replaces hardcoded hardware synchronization delays with a
calculated time window derived from the runtime clock rate. It stores this
synchronization time in the driver private structure to dynamically adjust
wait boundaries.
> diff --git a/drivers/rtc/rtc-rzn1.c b/drivers/rtc/rtc-rzn1.c
> index 9969bcefede72..583d174954043 100644
> --- a/drivers/rtc/rtc-rzn1.c
> +++ b/drivers/rtc/rtc-rzn1.c
[ ... ]
> @@ -432,12 +433,20 @@ static int rzn1_rtc_probe(struct platform_device *pdev)
> scmp_val = RZN1_RTC_CTL0_SLSB_SCMP;
> }
>
> + /*
> + * The internal clock counter operates in synchronization with the
> + * RTC_PCLK clock. Calculate the duration of two RTC_PCLK clock
> + * cycles in microseconds required for operations to complete.
> + */
> + rtc->sync_time = DIV_ROUND_UP(2 * NSEC_PER_MSEC, rate);
[Severity: Low]
This isn't a bug, but should this macro be USEC_PER_SEC instead?
The comment mentions calculating the duration in microseconds. While
NSEC_PER_MSEC evaluates to 1,000,000 which produces the correct runtime
result for converting cycles per second into microseconds, using
USEC_PER_SEC would more accurately reflect the intended units and improve
readability.
[Severity: High]
This is a pre-existing issue, but is there a race condition between the
PM runtime teardown and devres cleanup?
In drivers/rtc/rtc-rzn1.c, the RTC device is registered via devres
during rzn1_rtc_probe():
ret = devm_rtc_register_device(rtc->rtcdev);
Devres runs its cleanup (which calls rtc_unregister_device()) strictly
after the driver's remove callback returns. However, in rzn1_rtc_remove(),
the driver manually drops the PM runtime reference:
pm_runtime_put(&pdev->dev);
This powers down the hardware while the RTC character device is still
registered and exposed to userspace. If a userspace process calls an ioctl,
such as RTC_RD_TIME, during this window, the driver's rzn1_rtc_read_time()
callback executes and attempts to access unclocked registers, which could
lead to a synchronous external abort or bus fault.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260701142953.2014895-1-prabhakar.mahadev-lad.rj@bp.renesas.com?part=6
^ permalink raw reply
* Re: [PATCH v2 08/10] rtc: rzn1: Consistently use dev_err_probe()
From: sashiko-bot @ 2026-07-01 14:50 UTC (permalink / raw)
To: Prabhakar
Cc: wsa+renesas, linux-rtc, devicetree, conor+dt, robh,
Alexandre Belloni
In-Reply-To: <20260701142953.2014895-9-prabhakar.mahadev-lad.rj@bp.renesas.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
Pre-existing issues:
- [High] Premature pm_runtime_put() in remove callback leads to a potential bus fault or kernel panic due to devres teardown ordering.
--
commit 20388d9c3bb9eb8111711742d828f2997e736384
Author: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
rtc: rzn1: Consistently use dev_err_probe()
This patch updates rzn1_rtc_probe() to use dev_err_probe() when the alarm
interrupt request fails. This brings the error handling into alignment with
the rest of the probe function.
> diff --git a/drivers/rtc/rtc-rzn1.c b/drivers/rtc/rtc-rzn1.c
> index 244d0fc70fdad..d990075839c13 100644
> --- a/drivers/rtc/rtc-rzn1.c
> +++ b/drivers/rtc/rtc-rzn1.c
> @@ -471,7 +471,7 @@ static int rzn1_rtc_probe(struct platform_device *pdev)
>
> ret = devm_request_irq(dev, irq, rzn1_rtc_alarm_irq, 0, "RZN1 RTC Alarm", rtc);
> if (ret) {
> - dev_err(dev, "RTC alarm interrupt not available\n");
> + dev_err_probe(dev, ret, "RTC alarm interrupt not available\n");
> goto dis_runtime_pm;
> }
[Severity: High]
This isn't a bug introduced by this patch, but since we are looking at driver
error handling and teardown paths, is there a potential use-after-suspend
issue during device removal?
Since the RTC is registered using devm_rtc_register_device() in
rzn1_rtc_probe(), it remains registered and accessible to user space until
the devres teardown runs, which happens after rzn1_rtc_remove() returns.
However, rzn1_rtc_remove() manually drops the runtime PM reference:
drivers/rtc/rtc-rzn1.c:rzn1_rtc_remove() {
...
/* Disable all interrupts */
writel(0, rtc->base + RZN1_RTC_CTL1);
pm_runtime_put(&pdev->dev);
}
If a user-space process accesses the RTC device (like reading the time via
ioctl) precisely during driver unbinding after pm_runtime_put() is called,
would this access hardware registers while the clock is gated and trigger
a kernel panic?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260701142953.2014895-1-prabhakar.mahadev-lad.rj@bp.renesas.com?part=8
^ permalink raw reply
* Re: [PATCH v2 10/10] rtc: rzn1: Add support for Renesas RZ/T2H and RZ/N2H SoCs
From: sashiko-bot @ 2026-07-01 14:54 UTC (permalink / raw)
To: Prabhakar
Cc: robh, wsa+renesas, linux-rtc, conor+dt, devicetree,
Alexandre Belloni
In-Reply-To: <20260701142953.2014895-11-prabhakar.mahadev-lad.rj@bp.renesas.com>
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] The driver does not enforce SCMP mode for the new RZ/T2H compatible, allowing an unsafe fallback to SUBU mode that accesses the unimplemented RTCA0SUBU register.
- [Medium] The driver clears the entire `RZN1_RTC_CTL1` register to disable interrupts, which inadvertently destroys the state of the RZ/T2H-specific 1 Hz output control bit.
--
commit a19c5bdab6f846898749c84cf9743ad18017cdd8
Author: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
rtc: rzn1: Add support for Renesas RZ/T2H and RZ/N2H SoCs
Add support for the RTC block found on the Renesas RZ/T2H (R9A09G077)
and RZ/N2H (R9A09G087) SoCs by matching the new
renesas,r9a09g077-rtc compatible string.
> These SoCs integrate a closely related variant of the RZ/N1 RTC IP.
> Unlike the RZ/N1 implementation, the RZ/T2H and RZ/N2H variants lack
> the RTCA0SUBU register. However, this register is not accessed when
> operating in SCMP mode using the existing rzn1_rtc_ops_scmp
> configuration, allowing the current driver infrastructure to be reused
> without modification.
[Severity: High]
Does the current driver infrastructure guarantee SCMP mode is always used?
If the xtal clock is missing (since devm_clk_get_optional() is used) or
if its rate is exactly 32768 Hz, scmp_val remains 0:
drivers/rtc/rtc-rzn1.c:rzn1_rtc_probe() {
...
xtal = devm_clk_get_optional(dev, "xtal");
if (IS_ERR(xtal)) {
...
} else if (xtal) {
rate = clk_get_rate(xtal);
...
if (rate != 32768)
scmp_val = RZN1_RTC_CTL0_SLSB_SCMP;
}
...
This causes the driver to fall back to the SUBU ops:
if (scmp_val) {
writel(rate - 1, rtc->base + RZN1_RTC_SCMP);
rtc->rtcdev->ops = &rzn1_rtc_ops_scmp;
} else {
rtc->rtcdev->ops = &rzn1_rtc_ops_subu;
}
If this happens, the SUBU ops will access the missing RTCA0SUBU register,
which can trigger a synchronous external abort. Should the driver use OF match
data to identify variants lacking the SUBU register and explicitly prevent
assigning rzn1_rtc_ops_subu?
> The RZ/T2H RTC variant also supports a 1 Hz output signal on the
> RTCAT1HZ pin, controlled by the RTCA0CTL1[RTCA01HZE] bit. This bit is
> marked as reserved in the RZ/N1 hardware manual, making RZ/T2H a
> distinct RTC variant despite its overall compatibility with the RZ/N1
> implementation.
[Severity: Medium]
Will this 1 Hz output signal be inadvertently disabled during probe and removal?
During probe and removal, the driver unconditionally clears the entire
RZN1_RTC_CTL1 register to disable interrupts:
drivers/rtc/rtc-rzn1.c:rzn1_rtc_probe() {
...
/* Disable all interrupts */
writel(0, rtc->base + RZN1_RTC_CTL1);
...
If the bootloader or firmware previously configured the 1 Hz output signal,
won't this unconditional write to 0 destroy that state? Could the driver
perform a read-modify-write operation to clear only the interrupt enable bits
instead?
> diff --git a/drivers/rtc/rtc-rzn1.c b/drivers/rtc/rtc-rzn1.c
> index e77b7e7bcd5bd..26a5cde41c6b2 100644
> --- a/drivers/rtc/rtc-rzn1.c
> +++ b/drivers/rtc/rtc-rzn1.c
> @@ -518,6 +518,7 @@ static void rzn1_rtc_remove(struct platform_device *pdev)
> }
>
> static const struct of_device_id rzn1_rtc_of_match[] = {
> + { .compatible = "renesas,r9a09g077-rtc" },
> { .compatible = "renesas,rzn1-rtc" },
> {},
> };
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260701142953.2014895-1-prabhakar.mahadev-lad.rj@bp.renesas.com?part=10
^ permalink raw reply
* Re: [PATCH 1/3] dt-bindings: rtc: Add sii,wakealarm-output-pin property for S35390A
From: Alexandre Belloni @ 2026-07-01 15:06 UTC (permalink / raw)
To: Markus Probst
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Uwe Kleine-König, Andrew Lunn, Gregory Clement,
Sebastian Hesselbarth, linux-arm-kernel, linux-rtc, devicetree,
linux-kernel
In-Reply-To: <20260630-rtc_s35390a_int1-v1-1-1b2239e16be2@posteo.de>
On 30/06/2026 19:22:21+0000, Markus Probst wrote:
> Synology NAS devices use the output pin for interrupt signal 1 to wake up
> the system.
>
> Move devicetree bindings for sii,s35390a into its own file.
> Add sii,wakealarm-output-pin property to enable the use of the output
> pin for interrupt signal 1 for the wake alarm, which makes it possible to
> set an wake alarm on Synology NAS devices.
>
> Signed-off-by: Markus Probst <markus.probst@posteo.de>
> ---
> .../devicetree/bindings/rtc/sii,s35390a.yaml | 54 ++++++++++++++++++++++
> .../devicetree/bindings/rtc/trivial-rtc.yaml | 3 --
> MAINTAINERS | 1 +
> include/dt-bindings/rtc/s35390a.h | 9 ++++
> 4 files changed, 64 insertions(+), 3 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/rtc/sii,s35390a.yaml b/Documentation/devicetree/bindings/rtc/sii,s35390a.yaml
> new file mode 100644
> index 000000000000..31a578673870
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/rtc/sii,s35390a.yaml
> @@ -0,0 +1,54 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/rtc/sii,s35390a.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: S-35390A 2-WIRE REAL-TIME CLOCK
> +
> +maintainers:
> + - Alexandre Belloni <alexandre.belloni@bootlin.com>
> +
> +description:
> + The S-35390A is a CMOS 2-wire real-time clock IC which operates with the
> + very low current consumption in the wide range of operation voltage.
> +
> +allOf:
> + - $ref: rtc.yaml#
> +
> +properties:
> + compatible:
> + const: sii,s35390a
> +
> + reg:
> + maxItems: 1
> +
> + sii,wakealarm-output-pin:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + enum: [1, 2]
> + description: |
> + The output pin to wake up the system.
> + Default will use the output pin for interrupt signal 2.
> + <S35390A_OUTPUT_PIN_INT1> : Output pin for interrupt signal 1
> + <S35390A_OUTPUT_PIN_INT2> : Output pin for interrupt signal 2
> +
Ideally, we'd get a proper pinctrl driver part for this because what
happens if you want interrupts on both pin or clock output on both pins
or any combination of interrupts and clocks?
--
Alexandre Belloni, co-owner and COO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply
* Re: [PATCH 1/3] dt-bindings: rtc: Add sii,wakealarm-output-pin property for S35390A
From: Alexandre Belloni @ 2026-07-01 15:11 UTC (permalink / raw)
To: Markus Probst
Cc: Krzysztof Kozlowski, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Uwe Kleine-König, Andrew Lunn, Gregory Clement,
Sebastian Hesselbarth, linux-arm-kernel, linux-rtc, devicetree,
linux-kernel
In-Reply-To: <45e8157be53c3d8827fcccece7f706968bc056d3.camel@posteo.de>
On 01/07/2026 13:25:41+0000, Markus Probst wrote:
> On Wed, 2026-07-01 at 09:35 +0200, Krzysztof Kozlowski wrote:
> > On Tue, Jun 30, 2026 at 07:22:21PM +0000, Markus Probst wrote:
> > > Synology NAS devices use the output pin for interrupt signal 1 to wake up
> > > the system.
> > >
> > > Move devicetree bindings for sii,s35390a into its own file.
> > > Add sii,wakealarm-output-pin property to enable the use of the output
> > > pin for interrupt signal 1 for the wake alarm, which makes it possible to
> > > set an wake alarm on Synology NAS devices.
> > >
> > > Signed-off-by: Markus Probst <markus.probst@posteo.de>
> > > ---
> > > .../devicetree/bindings/rtc/sii,s35390a.yaml | 54 ++++++++++++++++++++++
> > > .../devicetree/bindings/rtc/trivial-rtc.yaml | 3 --
> > > MAINTAINERS | 1 +
> > > include/dt-bindings/rtc/s35390a.h | 9 ++++
> > > 4 files changed, 64 insertions(+), 3 deletions(-)
> > >
> > > diff --git a/Documentation/devicetree/bindings/rtc/sii,s35390a.yaml b/Documentation/devicetree/bindings/rtc/sii,s35390a.yaml
> > > new file mode 100644
> > > index 000000000000..31a578673870
> > > --- /dev/null
> > > +++ b/Documentation/devicetree/bindings/rtc/sii,s35390a.yaml
> > > @@ -0,0 +1,54 @@
> > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > > +%YAML 1.2
> > > +---
> > > +$id: http://devicetree.org/schemas/rtc/sii,s35390a.yaml#
> > > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > > +
> > > +title: S-35390A 2-WIRE REAL-TIME CLOCK
> > > +
> > > +maintainers:
> > > + - Alexandre Belloni <alexandre.belloni@bootlin.com>
> >
> > This should be someone caring about this hardware.
> He does have the majority of commits on this driver (excluding merge
> commits and commits not exclusive to this driver), although most of
> them are pretty tiny.
>
> Who would you suggest instead?
I can take it but the point of Krzysztof is mainly that the ones working
on the driver don't necessarily have to be the DT bindings maintainers
as both are well separated.
I mostly did clean ups in the driver, Lorenz Brun submitted something
way more interesting.
> >
> > > +
> > > +description:
> > > + The S-35390A is a CMOS 2-wire real-time clock IC which operates with the
> > > + very low current consumption in the wide range of operation voltage.
> > > +
> > > +allOf:
> > > + - $ref: rtc.yaml#
> > > +
> > > +properties:
> > > + compatible:
> > > + const: sii,s35390a
> > > +
> > > + reg:
> > > + maxItems: 1
> > > +
> > > + sii,wakealarm-output-pin:
> > > + $ref: /schemas/types.yaml#/definitions/uint32
> > > + enum: [1, 2]
> > > + description: |
> > > + The output pin to wake up the system.
> > > + Default will use the output pin for interrupt signal 2.
> > > + <S35390A_OUTPUT_PIN_INT1> : Output pin for interrupt signal 1
> > > + <S35390A_OUTPUT_PIN_INT2> : Output pin for interrupt signal 2
> >
> > Does that mean device generates the interrupts?
> Yes.
>
> Thanks
> - Markus Probst
>
> >
> > Best regards,
> > Krzysztof
--
Alexandre Belloni, co-owner and COO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply
* Re: [PATCH 1/3] dt-bindings: rtc: Add sii,wakealarm-output-pin property for S35390A
From: Krzysztof Kozlowski @ 2026-07-01 15:14 UTC (permalink / raw)
To: Markus Probst
Cc: Alexandre Belloni, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Uwe Kleine-König, Andrew Lunn, Gregory Clement,
Sebastian Hesselbarth, linux-arm-kernel, linux-rtc, devicetree,
linux-kernel
In-Reply-To: <45e8157be53c3d8827fcccece7f706968bc056d3.camel@posteo.de>
On 01/07/2026 15:25, Markus Probst wrote:
>>> +
>>> +maintainers:
>>> + - Alexandre Belloni <alexandre.belloni@bootlin.com>
>>
>> This should be someone caring about this hardware.
> He does have the majority of commits on this driver (excluding merge
> commits and commits not exclusive to this driver), although most of
> them are pretty tiny.
>
> Who would you suggest instead?
Someone adding features for this driver, maybe driver maintainers. But
if Alexandre is fine, you can leave him.
>>
>>> +
>>> +description:
>>> + The S-35390A is a CMOS 2-wire real-time clock IC which operates with the
>>> + very low current consumption in the wide range of operation voltage.
>>> +
>>> +allOf:
>>> + - $ref: rtc.yaml#
>>> +
>>> +properties:
>>> + compatible:
>>> + const: sii,s35390a
>>> +
>>> + reg:
>>> + maxItems: 1
>>> +
>>> + sii,wakealarm-output-pin:
>>> + $ref: /schemas/types.yaml#/definitions/uint32
>>> + enum: [1, 2]
>>> + description: |
>>> + The output pin to wake up the system.
>>> + Default will use the output pin for interrupt signal 2.
>>> + <S35390A_OUTPUT_PIN_INT1> : Output pin for interrupt signal 1
>>> + <S35390A_OUTPUT_PIN_INT2> : Output pin for interrupt signal 2
>>
>> Does that mean device generates the interrupts?
> Yes.
>
Then I think you miss interrupts property.
Best regards,
Krzysztof
^ permalink raw reply
* Re: [PATCH 1/8] dt-bindings: regulator: ROHM BD73800 regulators
From: Rob Herring (Arm) @ 2026-07-01 15:39 UTC (permalink / raw)
To: Matti Vaittinen
Cc: devicetree, linux-kernel, Mark Brown, Brian Masney,
Michael Turquette, linux-clk, Stephen Boyd, Bartosz Golaszewski,
Conor Dooley, Linus Walleij, linux-rtc, Krzysztof Kozlowski,
Alexandre Belloni, Matti Vaittinen, linux-gpio, Matti Vaittinen,
Lee Jones, Liam Girdwood
In-Reply-To: <67b42b5363533f11c22a6421417c3345f9872aec.1782909323.git.mazziesaccount@gmail.com>
On Wed, 01 Jul 2026 15:41:11 +0300, Matti Vaittinen wrote:
> From: Matti Vaittinen <mazziesaccount@gmail.com>
>
> Add bindings for the BUCKs and LDOs on ROHM BD73800. The PMIC state
> specific voltages can be set in same fashion as with a few other ROHM
> PMICs (for example with BD718[15,28,37,47,50,79]). Same properties are
> recycled :)
>
> The LDOs 1 and 4 can use different voltage ranges depending on the OTP
> configuration.
>
> Signed-off-by: Matti Vaittinen <mazziesaccount@gmail.com>
> ---
> .../regulator/rohm,bd73800-regulator.yaml | 119 ++++++++++++++++++
> 1 file changed, 119 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/regulator/rohm,bd73800-regulator.yaml
>
My bot found errors running 'make dt_binding_check' on your patch:
yamllint warnings/errors:
dtschema/dtc warnings/errors:
doc reference errors (make refcheckdocs):
Warning: Documentation/devicetree/bindings/regulator/rohm,bd73800-regulator.yaml references a file that doesn't exist: Documentation/devicetree/bindings/mfd/rohm,bd73800-pmic.yaml
Documentation/devicetree/bindings/regulator/rohm,bd73800-regulator.yaml: Documentation/devicetree/bindings/mfd/rohm,bd73800-pmic.yaml
See https://patchwork.kernel.org/project/devicetree/patch/67b42b5363533f11c22a6421417c3345f9872aec.1782909323.git.mazziesaccount@gmail.com
The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.
^ permalink raw reply
* Re: [PATCH 1/3] dt-bindings: rtc: Add sii,wakealarm-output-pin property for S35390A
From: Markus Probst @ 2026-07-01 16:43 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Alexandre Belloni, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Uwe Kleine-König, Andrew Lunn, Gregory Clement,
Sebastian Hesselbarth, linux-arm-kernel, linux-rtc, devicetree,
linux-kernel
In-Reply-To: <7de66163-369e-4118-af51-6913b565fa4b@kernel.org>
[-- Attachment #1: Type: text/plain, Size: 1865 bytes --]
On Wed, 2026-07-01 at 17:14 +0200, Krzysztof Kozlowski wrote:
> On 01/07/2026 15:25, Markus Probst wrote:
> > > > +
> > > > +maintainers:
> > > > + - Alexandre Belloni <alexandre.belloni@bootlin.com>
> > >
> > > This should be someone caring about this hardware.
> > He does have the majority of commits on this driver (excluding merge
> > commits and commits not exclusive to this driver), although most of
> > them are pretty tiny.
> >
> > Who would you suggest instead?
>
> Someone adding features for this driver, maybe driver maintainers. But
> if Alexandre is fine, you can leave him.
>
> > >
> > > > +
> > > > +description:
> > > > + The S-35390A is a CMOS 2-wire real-time clock IC which operates with the
> > > > + very low current consumption in the wide range of operation voltage.
> > > > +
> > > > +allOf:
> > > > + - $ref: rtc.yaml#
> > > > +
> > > > +properties:
> > > > + compatible:
> > > > + const: sii,s35390a
> > > > +
> > > > + reg:
> > > > + maxItems: 1
> > > > +
> > > > + sii,wakealarm-output-pin:
> > > > + $ref: /schemas/types.yaml#/definitions/uint32
> > > > + enum: [1, 2]
> > > > + description: |
> > > > + The output pin to wake up the system.
> > > > + Default will use the output pin for interrupt signal 2.
> > > > + <S35390A_OUTPUT_PIN_INT1> : Output pin for interrupt signal 1
> > > > + <S35390A_OUTPUT_PIN_INT2> : Output pin for interrupt signal 2
> > >
> > > Does that mean device generates the interrupts?
> > Yes.
> >
>
>
> Then I think you miss interrupts property.
From what I can tell the line is used to generate a system wakeup
event.
There would be no obvious benefit of connecting it to an interrupt
controller, so this property would be obsolete?
Thanks
- Markus Probst
>
> Best regards,
> Krzysztof
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^ permalink raw reply
* Re: [PATCH 1/3] dt-bindings: rtc: Add sii,wakealarm-output-pin property for S35390A
From: Alexandre Belloni @ 2026-07-01 16:48 UTC (permalink / raw)
To: Markus Probst
Cc: Krzysztof Kozlowski, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Uwe Kleine-König, Andrew Lunn, Gregory Clement,
Sebastian Hesselbarth, linux-arm-kernel, linux-rtc, devicetree,
linux-kernel
In-Reply-To: <d06dd0726aa3795ae99df5fa8a9c05d6e2001efd.camel@posteo.de>
On 01/07/2026 16:43:07+0000, Markus Probst wrote:
> On Wed, 2026-07-01 at 17:14 +0200, Krzysztof Kozlowski wrote:
> > On 01/07/2026 15:25, Markus Probst wrote:
> > > > > +
> > > > > +maintainers:
> > > > > + - Alexandre Belloni <alexandre.belloni@bootlin.com>
> > > >
> > > > This should be someone caring about this hardware.
> > > He does have the majority of commits on this driver (excluding merge
> > > commits and commits not exclusive to this driver), although most of
> > > them are pretty tiny.
> > >
> > > Who would you suggest instead?
> >
> > Someone adding features for this driver, maybe driver maintainers. But
> > if Alexandre is fine, you can leave him.
> >
> > > >
> > > > > +
> > > > > +description:
> > > > > + The S-35390A is a CMOS 2-wire real-time clock IC which operates with the
> > > > > + very low current consumption in the wide range of operation voltage.
> > > > > +
> > > > > +allOf:
> > > > > + - $ref: rtc.yaml#
> > > > > +
> > > > > +properties:
> > > > > + compatible:
> > > > > + const: sii,s35390a
> > > > > +
> > > > > + reg:
> > > > > + maxItems: 1
> > > > > +
> > > > > + sii,wakealarm-output-pin:
> > > > > + $ref: /schemas/types.yaml#/definitions/uint32
> > > > > + enum: [1, 2]
> > > > > + description: |
> > > > > + The output pin to wake up the system.
> > > > > + Default will use the output pin for interrupt signal 2.
> > > > > + <S35390A_OUTPUT_PIN_INT1> : Output pin for interrupt signal 1
> > > > > + <S35390A_OUTPUT_PIN_INT2> : Output pin for interrupt signal 2
> > > >
> > > > Does that mean device generates the interrupts?
> > > Yes.
> > >
> >
> >
> > Then I think you miss interrupts property.
> From what I can tell the line is used to generate a system wakeup
> event.
>
> There would be no obvious benefit of connecting it to an interrupt
> controller, so this property would be obsolete?
>
Then you need proper wakeup-source support
--
Alexandre Belloni, co-owner and COO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply
* Re: [PATCH 1/3] dt-bindings: rtc: Add sii,wakealarm-output-pin property for S35390A
From: Markus Probst @ 2026-07-01 17:08 UTC (permalink / raw)
To: Alexandre Belloni
Cc: Krzysztof Kozlowski, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Uwe Kleine-König, Andrew Lunn, Gregory Clement,
Sebastian Hesselbarth, linux-arm-kernel, linux-rtc, devicetree,
linux-kernel
In-Reply-To: <20260701164821b7492eac@mail.local>
[-- Attachment #1: Type: text/plain, Size: 2417 bytes --]
On Wed, 2026-07-01 at 18:48 +0200, Alexandre Belloni wrote:
> On 01/07/2026 16:43:07+0000, Markus Probst wrote:
> > On Wed, 2026-07-01 at 17:14 +0200, Krzysztof Kozlowski wrote:
> > > On 01/07/2026 15:25, Markus Probst wrote:
> > > > > > +
> > > > > > +maintainers:
> > > > > > + - Alexandre Belloni <alexandre.belloni@bootlin.com>
> > > > >
> > > > > This should be someone caring about this hardware.
> > > > He does have the majority of commits on this driver (excluding merge
> > > > commits and commits not exclusive to this driver), although most of
> > > > them are pretty tiny.
> > > >
> > > > Who would you suggest instead?
> > >
> > > Someone adding features for this driver, maybe driver maintainers. But
> > > if Alexandre is fine, you can leave him.
> > >
> > > > >
> > > > > > +
> > > > > > +description:
> > > > > > + The S-35390A is a CMOS 2-wire real-time clock IC which operates with the
> > > > > > + very low current consumption in the wide range of operation voltage.
> > > > > > +
> > > > > > +allOf:
> > > > > > + - $ref: rtc.yaml#
> > > > > > +
> > > > > > +properties:
> > > > > > + compatible:
> > > > > > + const: sii,s35390a
> > > > > > +
> > > > > > + reg:
> > > > > > + maxItems: 1
> > > > > > +
> > > > > > + sii,wakealarm-output-pin:
> > > > > > + $ref: /schemas/types.yaml#/definitions/uint32
> > > > > > + enum: [1, 2]
> > > > > > + description: |
> > > > > > + The output pin to wake up the system.
> > > > > > + Default will use the output pin for interrupt signal 2.
> > > > > > + <S35390A_OUTPUT_PIN_INT1> : Output pin for interrupt signal 1
> > > > > > + <S35390A_OUTPUT_PIN_INT2> : Output pin for interrupt signal 2
> > > > >
> > > > > Does that mean device generates the interrupts?
> > > > Yes.
> > > >
> > >
> > >
> > > Then I think you miss interrupts property.
> > From what I can tell the line is used to generate a system wakeup
> > event.
> >
> > There would be no obvious benefit of connecting it to an interrupt
> > controller, so this property would be obsolete?
> >
>
> Then you need proper wakeup-source support
Wouldn't that break existing devicetrees?
The current driver allows to wake up the system, even without
having wakeup-source set.
As an example: arch/arm/boot/dts/marvell/kirkwood-ts219.dtsi
Thanks
- Markus Probst
>
>
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^ permalink raw reply
* Re: [PATCH 1/3] dt-bindings: rtc: Add sii,wakealarm-output-pin property for S35390A
From: Markus Probst @ 2026-07-01 17:34 UTC (permalink / raw)
To: Alexandre Belloni
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Uwe Kleine-König, Andrew Lunn, Gregory Clement,
Sebastian Hesselbarth, linux-arm-kernel, linux-rtc, devicetree,
linux-kernel
In-Reply-To: <202607011506045358209c@mail.local>
[-- Attachment #1: Type: text/plain, Size: 2564 bytes --]
On Wed, 2026-07-01 at 17:06 +0200, Alexandre Belloni wrote:
> On 30/06/2026 19:22:21+0000, Markus Probst wrote:
> > Synology NAS devices use the output pin for interrupt signal 1 to wake up
> > the system.
> >
> > Move devicetree bindings for sii,s35390a into its own file.
> > Add sii,wakealarm-output-pin property to enable the use of the output
> > pin for interrupt signal 1 for the wake alarm, which makes it possible to
> > set an wake alarm on Synology NAS devices.
> >
> > Signed-off-by: Markus Probst <markus.probst@posteo.de>
> > ---
> > .../devicetree/bindings/rtc/sii,s35390a.yaml | 54 ++++++++++++++++++++++
> > .../devicetree/bindings/rtc/trivial-rtc.yaml | 3 --
> > MAINTAINERS | 1 +
> > include/dt-bindings/rtc/s35390a.h | 9 ++++
> > 4 files changed, 64 insertions(+), 3 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/rtc/sii,s35390a.yaml b/Documentation/devicetree/bindings/rtc/sii,s35390a.yaml
> > new file mode 100644
> > index 000000000000..31a578673870
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/rtc/sii,s35390a.yaml
> > @@ -0,0 +1,54 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/rtc/sii,s35390a.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: S-35390A 2-WIRE REAL-TIME CLOCK
> > +
> > +maintainers:
> > + - Alexandre Belloni <alexandre.belloni@bootlin.com>
> > +
> > +description:
> > + The S-35390A is a CMOS 2-wire real-time clock IC which operates with the
> > + very low current consumption in the wide range of operation voltage.
> > +
> > +allOf:
> > + - $ref: rtc.yaml#
> > +
> > +properties:
> > + compatible:
> > + const: sii,s35390a
> > +
> > + reg:
> > + maxItems: 1
> > +
> > + sii,wakealarm-output-pin:
> > + $ref: /schemas/types.yaml#/definitions/uint32
> > + enum: [1, 2]
> > + description: |
> > + The output pin to wake up the system.
> > + Default will use the output pin for interrupt signal 2.
> > + <S35390A_OUTPUT_PIN_INT1> : Output pin for interrupt signal 1
> > + <S35390A_OUTPUT_PIN_INT2> : Output pin for interrupt signal 2
> > +
>
> Ideally, we'd get a proper pinctrl driver part for this because what
> happens if you want interrupts on both pin or clock output on both pins
> or any combination of interrupts and clocks?
>
Yes.
Thanks
- Markus Probst
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^ permalink raw reply
* Re: [PATCH 1/8] dt-bindings: regulator: ROHM BD73800 regulators
From: Rob Herring @ 2026-07-01 19:25 UTC (permalink / raw)
To: Matti Vaittinen
Cc: Matti Vaittinen, Matti Vaittinen, Lee Jones, Krzysztof Kozlowski,
Conor Dooley, Liam Girdwood, Mark Brown, Michael Turquette,
Stephen Boyd, Brian Masney, Linus Walleij, Bartosz Golaszewski,
Alexandre Belloni, devicetree, linux-kernel, linux-clk,
linux-gpio, linux-rtc
In-Reply-To: <67b42b5363533f11c22a6421417c3345f9872aec.1782909323.git.mazziesaccount@gmail.com>
On Wed, Jul 01, 2026 at 03:41:11PM +0300, Matti Vaittinen wrote:
> From: Matti Vaittinen <mazziesaccount@gmail.com>
>
> Add bindings for the BUCKs and LDOs on ROHM BD73800. The PMIC state
> specific voltages can be set in same fashion as with a few other ROHM
> PMICs (for example with BD718[15,28,37,47,50,79]). Same properties are
> recycled :)
>
> The LDOs 1 and 4 can use different voltage ranges depending on the OTP
> configuration.
>
> Signed-off-by: Matti Vaittinen <mazziesaccount@gmail.com>
> ---
> .../regulator/rohm,bd73800-regulator.yaml | 119 ++++++++++++++++++
> 1 file changed, 119 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/regulator/rohm,bd73800-regulator.yaml
>
> diff --git a/Documentation/devicetree/bindings/regulator/rohm,bd73800-regulator.yaml b/Documentation/devicetree/bindings/regulator/rohm,bd73800-regulator.yaml
> new file mode 100644
> index 000000000000..c427a04098ec
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/regulator/rohm,bd73800-regulator.yaml
> + rohm,dvs-run-voltage:
> + description:
> + PMIC default "RUN" state voltage in uV. 0 means disabled. See the
> + explanation below for regulator specific details.
> + $ref: /schemas/types.yaml#/definitions/uint32
> + minimum: 0
> + maximum: 3500000
[...]
> + rohm,dvs-run-voltage:
> + description:
> + Set the default output state at PMIC's "RUN" state.
> + 0 is disabled, 1 is enabled.
> + $ref: /schemas/types.yaml#/definitions/uint32
> + minimum: 0
> + maximum: 1
Same property name with 2 different meanings. Not a good design pattern.
Also, if these properties are copied from other schemas, don't duplicate
them. Put them in a common schema and reference it here.
Rob
^ permalink raw reply
* Re: [PATCH 4/4] rtc: s35390a: convert to dev_err_probe()
From: Balakrishnan.S @ 2026-07-02 4:01 UTC (permalink / raw)
To: alexandre.belloni
Cc: amergnat, baolin.wang, zhang.lyra, orsonzhai, linux-kernel,
linux-rtc
In-Reply-To: <202607010857395be38657@mail.local>
Hi Alexandre Belloni,
On 01/07/26 2:27 pm, Alexandre Belloni wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> Hello,
>
> On 01/07/2026 07:26:29+0000, Balakrishnan.S@microchip.com wrote:
>> Hi Alexandre,
>>
>> Thanks for the review/feedback.
>>
>> On 30/06/26 10:40 pm, Alexandre Mergnat wrote:
>>> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>>>
>>> On Thu, 28 May 2026 09:16:47 +0530, Balakrishnan Sambath <balakrishnan.s@microchip.com> wrote:
>>>> diff --git a/drivers/rtc/rtc-s35390a.c b/drivers/rtc/rtc-s35390a.c
>>>> index a4678d7c6cf6..342fd2b568a3 100644
>>>> --- a/drivers/rtc/rtc-s35390a.c
>>>> +++ b/drivers/rtc/rtc-s35390a.c
>>>> @@ -479,10 +479,8 @@ static int s35390a_probe(struct i2c_client *client)
>>>> return PTR_ERR(rtc);
>>>>
>>>> err_read = s35390a_read_status(s35390a, &status1);
>>>> - if (err_read < 0) {
>>>> - dev_err(dev, "error resetting chip\n");
>>>> - return err_read;
>>>> - }
>>>> + if (err_read < 0)
>>>> + return dev_err_probe(dev, err_read, "error resetting chip\n");
>>>
>>> The devm_i2c_new_dummy_device() loop above this hunk still uses
>>> dev_err()+return PTR_ERR("Address %02x unavailable"). dev_err_probe() takes
>>> format args, so it converts cleanly:
>>>
>>> return dev_err_probe(dev, PTR_ERR(s35390a->client[i]),
>>> "Address %02x unavailable\n", client->addr + i);
>>>
>>> Worth converting for consistency with the rest of the probe.
>> Sure, I'll fix this too in next revision.
>>>
>>>> @@ -493,16 +491,12 @@ static int s35390a_probe(struct i2c_client *client)
>>>> /* disable alarm (and maybe test mode) */
>>>> buf = 0;
>>>> err = s35390a_set_reg(s35390a, S35390A_CMD_STATUS2, &buf, 1);
>>>> - if (err < 0) {
>>>> - dev_err(dev, "error disabling alarm");
>>>> - return err;
>>>> - }
>>>> + if (err < 0)
>>>> + return dev_err_probe(dev, err, "error disabling alarm");
>>>
>>> This message is missing its trailing newline (pre-existing). dev_err_probe()
>>> formats as "error %pe: %pV" and does not append "\n" itself, so the line
>>> runs into the next log message. Since you are touching this line, adding
>>> "\n" is a cheap fix even if the issue was here before your patch.
>>> I recommand to fix it ;)
>> Okay noted. Will fix it too.
>
> Honestly, my plan was to not apply those patches because once I do
> that, I'll get hundreds of those. There is no benefit to the change and
> I'll cite the dev_err_probe doc:
>
> * This helper implements common pattern present in probe functions for error
> * checking: print debug or error message depending if the error value is
> * -EPROBE_DEFER and propagate error upwards.
> * In case of -EPROBE_DEFER it sets also defer probe reason, which can be
> * checked later by reading devices_deferred debugfs attribute.
> * It replaces the following code sequence::
> *
> * if (err != -EPROBE_DEFER)
> * dev_err(dev, ...);
> * else
> * dev_dbg(dev, ...);
> * return err;
>
>
> We are not checking for EPROBE_DEFER in any of the drivers so there is
> no point in doing the change.
Okay thanks for the feedback. Lets drop this.
>
>
> --
> Alexandre Belloni, co-owner and COO, Bootlin
> Embedded Linux and Kernel engineering
> https://bootlin.com
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