* Re: [PATCH v3 6/8] clk: sunxi-ng: div: add read-only operation support
From: Jerome Brunet @ 2026-07-06 9:16 UTC (permalink / raw)
To: Chen-Yu Tsai
Cc: Junhui Liu, Alexandre Belloni, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jernej Skrabec, Samuel Holland, Michael Turquette,
Stephen Boyd, Maxime Ripard, linux-rtc, devicetree,
linux-arm-kernel, linux-sunxi, linux-kernel, linux-clk
In-Reply-To: <CAGb2v64C4Xn=V5NQcqZQa=v0KsemsVh+_6g7ed0kHz6C_bzmww@mail.gmail.com>
On sam. 04 juil. 2026 at 16:25, Chen-Yu Tsai <wens@kernel.org> wrote:
>>
>> extern const struct clk_ops ccu_div_ops;
>> +extern const struct clk_ops ccu_rodiv_ops;
>>
>> #endif /* _CCU_DIV_H_ */
>> diff --git a/drivers/clk/sunxi-ng/ccu_mux.c b/drivers/clk/sunxi-ng/ccu_mux.c
>> index 766f27cff748..e2d6833a6d33 100644
>> --- a/drivers/clk/sunxi-ng/ccu_mux.c
>> +++ b/drivers/clk/sunxi-ng/ccu_mux.c
>> @@ -68,13 +68,14 @@ unsigned long ccu_mux_helper_apply_prediv(struct ccu_common *common,
>> }
>> EXPORT_SYMBOL_NS_GPL(ccu_mux_helper_apply_prediv, "SUNXI_CCU");
>>
>> -static unsigned long ccu_mux_helper_unapply_prediv(struct ccu_common *common,
>> +unsigned long ccu_mux_helper_unapply_prediv(struct ccu_common *common,
>> struct ccu_mux_internal *cm,
>> int parent_index,
>> unsigned long parent_rate)
>> {
>> return parent_rate * ccu_mux_get_prediv(common, cm, parent_index);
>> }
>> +EXPORT_SYMBOL_NS_GPL(ccu_mux_helper_unapply_prediv, "SUNXI_CCU");
>
> This does not need to be exported since all the base clocks build into
> one module. And maybe it shouldn't as we probably don't want individual
> clock drivers implementing ops.
Indeed, I'll add a patch to remove the export of
ccu_mux_helper_apply_prediv() as well, for consistency. It does not
appear to used out of that module either.
>
>
> Otherwise,
>
> Reviewed-by: Chen-Yu Tsai <wens@kernel.org>
>
--
Jerome
^ permalink raw reply
* Re: [PATCH v3 2/8] dt-bindings: rtc: sun6i: add sun60i-a733 support
From: Alexandre Belloni @ 2026-07-05 21:38 UTC (permalink / raw)
To: Jerome Brunet
Cc: Junhui Liu, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Chen-Yu Tsai, Jernej Skrabec, Samuel Holland, Michael Turquette,
Stephen Boyd, Maxime Ripard, linux-rtc, devicetree,
linux-arm-kernel, linux-sunxi, linux-kernel, linux-clk
In-Reply-To: <20260702-a733-rtc-v3-2-eb2580374de6@baylibre.com>
On 02/07/2026 10:10:01+0200, Jerome Brunet wrote:
> Add a new rtc compatible for the sun60i-a733 SoC and new IDs for the
> peripheral oscillator clock gates of this SoC.
>
> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
> ---
> Documentation/devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.yaml | 1 +
> include/dt-bindings/clock/sun6i-rtc.h | 4 ++++
> 2 files changed, 5 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.yaml b/Documentation/devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.yaml
> index 959a012c626f..f2b91186ed37 100644
> --- a/Documentation/devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.yaml
> +++ b/Documentation/devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.yaml
> @@ -33,6 +33,7 @@ properties:
> - enum:
> - allwinner,sun20i-d1-rtc
> - allwinner,sun55i-a523-rtc
> + - allwinner,sun60i-a733-rtc
> - const: allwinner,sun50i-r329-rtc
>
> reg:
> diff --git a/include/dt-bindings/clock/sun6i-rtc.h b/include/dt-bindings/clock/sun6i-rtc.h
> index 3bd3aa3d57ce..5132a393ca4b 100644
> --- a/include/dt-bindings/clock/sun6i-rtc.h
> +++ b/include/dt-bindings/clock/sun6i-rtc.h
> @@ -6,5 +6,9 @@
> #define CLK_OSC32K 0
> #define CLK_OSC32K_FANOUT 1
> #define CLK_IOSC 2
> +#define CLK_HOSC_UFS 8
> +#define CLK_HOSC_HDMI 9
> +#define CLK_HOSC_SERDES0 10
> +#define CLK_HOSC_SERDES1 11
>
> #endif /* _DT_BINDINGS_CLK_SUN6I_RTC_H_ */
>
> --
> 2.47.3
>
--
Alexandre Belloni, co-owner and COO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply
* Re: [PATCH v3 1/8] dt-bindings: rtc: sun6i: no clock-output-names on h616/r329
From: Alexandre Belloni @ 2026-07-05 21:38 UTC (permalink / raw)
To: Jerome Brunet
Cc: Junhui Liu, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Chen-Yu Tsai, Jernej Skrabec, Samuel Holland, Michael Turquette,
Stephen Boyd, Maxime Ripard, linux-rtc, devicetree,
linux-arm-kernel, linux-sunxi, linux-kernel, linux-clk, Sashiko
In-Reply-To: <20260702-a733-rtc-v3-1-eb2580374de6@baylibre.com>
On 02/07/2026 10:10:00+0200, Jerome Brunet wrote:
> On h616 and r329 chips, clock output names are never defined through DT and
> are not meant to be. Just disallow the property for those chips.
>
> Reported-by: Sashiko <sashiko-bot@kernel.org>
> Closes: http://lore.kernel.org/r/20260629125305.0DF981F000E9@smtp.kernel.org
> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
> ---
> .../devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.yaml | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.yaml b/Documentation/devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.yaml
> index 9df5cdb6f63f..959a012c626f 100644
> --- a/Documentation/devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.yaml
> +++ b/Documentation/devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.yaml
> @@ -175,6 +175,18 @@ allOf:
> interrupts:
> minItems: 2
>
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - allwinner,sun50i-h616-rtc
> + - allwinner,sun50i-r329-rtc
> +
> + then:
> + properties:
> + clock-output-names: false
> +
> required:
> - "#clock-cells"
> - compatible
>
> --
> 2.47.3
>
--
Alexandre Belloni, co-owner and COO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply
* Re: [PATCH] rtc: armada38x: do not advertise update interrupt (UIE) support
From: Alexandre Belloni @ 2026-07-04 22:13 UTC (permalink / raw)
To: Ioannis Fountzoulas
Cc: Andrew Lunn, Gregory Clement, Sebastian Hesselbarth,
linux-arm-kernel, linux-rtc, linux-kernel
In-Reply-To: <20260704210710.658574-1-ioannis.fountzoulas@nokia.com>
On 04/07/2026 17:07:10-0400, Ioannis Fountzoulas wrote:
> Problem:
> chrony enables RTC update interrupts via the RTC_UIE_ON ioctl to track
> RTC drift. On the armada38x driver this request is served by the RTC
> core's native path, which arms a 1 second periodic timer that is
> re-programmed on the alarm and serviced by rtc_timer_do_work().
> If the RTC time is then stepped forward by a large amount while this
> timer is active, its scheduled expiry ends up far in the past compared
> to the freshly read time.
>
> Why the CPU hangs:
> When rtc_timer_do_work() runs, it expires every timer whose expiry is
> not in the future, advancing periodic timers by one period each pass:
> while ((next = timerqueue_getnext(&rtc->timerqueue))) {
> if (next->expires > now)
> break;
> ...
> timer->node.expires += timer->period; /* += 1s */
> timerqueue_add(&rtc->timerqueue, &timer->node);
> }
> With a large forward step (seen when the RTC starts far in the past and
> chrony corrects it after the first NTP sync), the periodic UIE timer is
> overdue by the size of the jump, so this loop must run one iteration per
> elapsed second before it can exit.
This is not correct because the core ensures that UIE is disable before
changing the RTC time and enables it afterwards so the jump doesn't have
any impact on UIE. So what you need to explain is why UIE is not synced
with the RTC time after it has been set. My guess is RES-3124064 is the
culprit.
> It never yields in that time, so the workqueue worker pins the CPU and
> the watchdog reports a soft lockup / RCU stall, after which the
> board reboots:
> watchdog: BUG: soft lockup - CPU#1 stuck for 48s! [kworker/1:3:432]
> Kernel panic - not syncing: softlockup: hung tasks
> Workqueue: events rtc_timer_do_work
> rtc_handle_legacy_irq from rtc_timer_do_work
> rtc_timer_do_work from process_one_work
> process_one_work from worker_thread
>
> Fix:
> Clear RTC_FEATURE_UPDATE_INTERRUPT at probe time so the driver stops
> advertising native UIE. RTC_UIE_ON is then served by the poll-based UIE
> emulation in rtc-dev (CONFIG_RTC_INTF_DEV_UIE_EMUL), which delivers the
> 1 Hz update notifications chrony needs without ever queuing the runaway
> periodic timer.
>
> Testing:
> Tested on a Marvell Armada 38x board (ARM Cortex-A9). Before the change,
> stepping the clock forward while UIE was enabled reproduced the soft
> lockup (about 1 in 4 boots). After the change, rtc_timer_do_work() runs
> zero loop iterations and returns immediately, chrony still receives
> update interrupts via emulation, and no lockups occur over repeated
> reboot cycles.
>
> Signed-off-by: Ioannis Fountzoulas <ioannis.fountzoulas@nokia.com>
> ---
> drivers/rtc/rtc-armada38x.c | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/drivers/rtc/rtc-armada38x.c b/drivers/rtc/rtc-armada38x.c
> index 245290ae1a8d..da036d819649 100644
> --- a/drivers/rtc/rtc-armada38x.c
> +++ b/drivers/rtc/rtc-armada38x.c
> @@ -526,6 +526,14 @@ static __init int armada38x_rtc_probe(struct platform_device *pdev)
> else
> clear_bit(RTC_FEATURE_ALARM, rtc->rtc_dev->features);
>
> + /*
> + * A large forward step of the RTC time makes
> + * rtc_timer_do_work() replay one period per elapsed second and can
> + * loop long enough to trigger a soft lockup. Do not advertise
> + * native UIE; RTC_UIE_ON then uses the poll-based emulation.
> + */
> + clear_bit(RTC_FEATURE_UPDATE_INTERRUPT, rtc->rtc_dev->features);
> +
> /* Update RTC-MBUS bridge timing parameters */
> rtc->data->update_mbus_timing(rtc);
>
> --
> 2.34.1
>
--
Alexandre Belloni, co-owner and COO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply
* Re: [PATCH] rtc: armada38x: do not advertise update interrupt (UIE) support
From: sashiko-bot @ 2026-07-04 21:23 UTC (permalink / raw)
To: Ioannis Fountzoulas; +Cc: Alexandre Belloni, linux-rtc
In-Reply-To: <20260704210710.658574-1-ioannis.fountzoulas@nokia.com>
Thank you for your contribution! Sashiko AI review found 3 potential issue(s) to consider:
New issues:
- [Medium] Clearing RTC_FEATURE_UPDATE_INTERRUPT degrades UIE performance to software polling and introduces a silent dependency on CONFIG_RTC_INTF_DEV_UIE_EMUL, risking ABI breakage.
Pre-existing issues:
- [High] The patch implements a driver-specific workaround for a core RTC subsystem vulnerability, masking the issue in armada38x while leaving all other native UIE-capable RTC drivers vulnerable to a DoS (soft lockup).
- [High] Unprotected hardware register writes in armada38x_rtc_set_offset and armada38x_rtc_reset break hardware write protocol when preempted by an alarm interrupt, potentially causing silent RTC write failures.
--
commit e4e1f958746b053e26726c0a8b1203537d9bd06e
Author: Ioannis Fountzoulas <ioannis.fountzoulas@nokia.com>
rtc: armada38x: do not advertise update interrupt (UIE) support
chrony enables RTC update interrupts via the RTC_UIE_ON ioctl to track
RTC drift. On the armada38x driver this request is served by the RTC
core's native path, which arms a 1 second periodic timer that is
re-programmed on the alarm and serviced by rtc_timer_do_work().
> diff --git a/drivers/rtc/rtc-armada38x.c b/drivers/rtc/rtc-armada38x.c
> index 245290ae1a8de..da036d819649c 100644
> --- a/drivers/rtc/rtc-armada38x.c
> +++ b/drivers/rtc/rtc-armada38x.c
> @@ -526,6 +526,14 @@ static __init int armada38x_rtc_probe(struct platform_device *pdev)
> else
> clear_bit(RTC_FEATURE_ALARM, rtc->rtc_dev->features);
>
> + /*
> + * A large forward step of the RTC time makes
> + * rtc_timer_do_work() replay one period per elapsed second and can
> + * loop long enough to trigger a soft lockup. Do not advertise
> + * native UIE; RTC_UIE_ON then uses the poll-based emulation.
> + */
> + clear_bit(RTC_FEATURE_UPDATE_INTERRUPT, rtc->rtc_dev->features);
[Severity: High]
This is a pre-existing issue, but does this driver-specific workaround
mask a core RTC subsystem vulnerability, leaving all other native UIE-capable
RTC drivers vulnerable to a soft lockup?
If a userspace process with CAP_SYS_TIME initiates a large forward time jump,
a lockless TOCTOU race can occur in drivers/rtc/interface.c:rtc_set_time().
rtc_set_time() checks rtc->uie_rtctimer.enabled, which can read as 0 if
rtc_timer_do_work() is concurrently processing the timer.
rtc_set_time() then updates the hardware time without re-arming the timer
to the new time.
The subsequent run of rtc_timer_do_work() finds the timer expiry far in the
past and enters an unbounded while-loop, advancing the timer by 1 second per
iteration, pinning the CPU.
Could we fix this race in the core RTC subsystem rather than disabling native
UIE in this driver?
[Severity: Medium]
Will clearing this feature bit introduce a regression by degrading UIE
performance to software polling and adding a silent dependency on
CONFIG_RTC_INTF_DEV_UIE_EMUL?
If the kernel lacks CONFIG_RTC_INTF_DEV_UIE_EMUL, RTC_UIE_ON will fail and
return -EINVAL, potentially breaking userspace tools like chrony.
If it is enabled, it uses CPU-intensive polling instead of hardware interrupts.
[Severity: High]
This isn't a bug introduced by this patch, but do unprotected hardware register
writes in armada38x_rtc_set_offset() and armada38x_rtc_reset() break the
hardware write protocol if preempted by an alarm interrupt?
Both functions call rtc_delayed_write() without holding rtc->lock or disabling
interrupts.
If an RTC alarm interrupt fires during this time, the interrupt handler
interleaves its own rtc_delayed_write().
When the interrupt returns, the interrupted write executes without the required
preceding dummy writes to RTC_STATUS (hardware erratum workaround RES-3124064),
potentially causing silent RTC write failures.
> +
> /* Update RTC-MBUS bridge timing parameters */
> rtc->data->update_mbus_timing(rtc);
>
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260704210710.658574-1-ioannis.fountzoulas@nokia.com?part=1
^ permalink raw reply
* [PATCH] rtc: armada38x: do not advertise update interrupt (UIE) support
From: Ioannis Fountzoulas @ 2026-07-04 21:07 UTC (permalink / raw)
To: Alexandre Belloni, Andrew Lunn, Gregory Clement,
Sebastian Hesselbarth
Cc: linux-arm-kernel, linux-rtc, linux-kernel, Ioannis Fountzoulas
Problem:
chrony enables RTC update interrupts via the RTC_UIE_ON ioctl to track
RTC drift. On the armada38x driver this request is served by the RTC
core's native path, which arms a 1 second periodic timer that is
re-programmed on the alarm and serviced by rtc_timer_do_work().
If the RTC time is then stepped forward by a large amount while this
timer is active, its scheduled expiry ends up far in the past compared
to the freshly read time.
Why the CPU hangs:
When rtc_timer_do_work() runs, it expires every timer whose expiry is
not in the future, advancing periodic timers by one period each pass:
while ((next = timerqueue_getnext(&rtc->timerqueue))) {
if (next->expires > now)
break;
...
timer->node.expires += timer->period; /* += 1s */
timerqueue_add(&rtc->timerqueue, &timer->node);
}
With a large forward step (seen when the RTC starts far in the past and
chrony corrects it after the first NTP sync), the periodic UIE timer is
overdue by the size of the jump, so this loop must run one iteration per
elapsed second before it can exit.
It never yields in that time, so the workqueue worker pins the CPU and
the watchdog reports a soft lockup / RCU stall, after which the
board reboots:
watchdog: BUG: soft lockup - CPU#1 stuck for 48s! [kworker/1:3:432]
Kernel panic - not syncing: softlockup: hung tasks
Workqueue: events rtc_timer_do_work
rtc_handle_legacy_irq from rtc_timer_do_work
rtc_timer_do_work from process_one_work
process_one_work from worker_thread
Fix:
Clear RTC_FEATURE_UPDATE_INTERRUPT at probe time so the driver stops
advertising native UIE. RTC_UIE_ON is then served by the poll-based UIE
emulation in rtc-dev (CONFIG_RTC_INTF_DEV_UIE_EMUL), which delivers the
1 Hz update notifications chrony needs without ever queuing the runaway
periodic timer.
Testing:
Tested on a Marvell Armada 38x board (ARM Cortex-A9). Before the change,
stepping the clock forward while UIE was enabled reproduced the soft
lockup (about 1 in 4 boots). After the change, rtc_timer_do_work() runs
zero loop iterations and returns immediately, chrony still receives
update interrupts via emulation, and no lockups occur over repeated
reboot cycles.
Signed-off-by: Ioannis Fountzoulas <ioannis.fountzoulas@nokia.com>
---
drivers/rtc/rtc-armada38x.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/rtc/rtc-armada38x.c b/drivers/rtc/rtc-armada38x.c
index 245290ae1a8d..da036d819649 100644
--- a/drivers/rtc/rtc-armada38x.c
+++ b/drivers/rtc/rtc-armada38x.c
@@ -526,6 +526,14 @@ static __init int armada38x_rtc_probe(struct platform_device *pdev)
else
clear_bit(RTC_FEATURE_ALARM, rtc->rtc_dev->features);
+ /*
+ * A large forward step of the RTC time makes
+ * rtc_timer_do_work() replay one period per elapsed second and can
+ * loop long enough to trigger a soft lockup. Do not advertise
+ * native UIE; RTC_UIE_ON then uses the poll-based emulation.
+ */
+ clear_bit(RTC_FEATURE_UPDATE_INTERRUPT, rtc->rtc_dev->features);
+
/* Update RTC-MBUS bridge timing parameters */
rtc->data->update_mbus_timing(rtc);
--
2.34.1
^ permalink raw reply related
* Re: [PATCH] rtc: ab-eoz9: add missing MODULE_DEVICE_TABLE()
From: sashiko-bot @ 2026-07-04 15:28 UTC (permalink / raw)
To: Pengpeng Hou; +Cc: Alexandre Belloni, linux-rtc
In-Reply-To: <20260704152528.53258-1-pengpeng@iscas.ac.cn>
> The driver has a match table for the i2c bus wired into its driver
> structure, but the table is not exported with MODULE_DEVICE_TABLE().
>
> Add the missing MODULE_DEVICE_TABLE() entry so module alias information
> is generated for automatic module loading.
>
> This is a source-level fix. It does not claim dynamic hardware
> reproduction; the evidence is the driver-owned match table, its use by
> the driver registration structure, and the missing module alias
> publication.
>
> Signed-off-by: Pengpeng Hou <pengpeng@iscas.ac.cn>
Sashiko has reviewed this patch and found no issues. It looks great!
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260704152528.53258-1-pengpeng@iscas.ac.cn?part=1
^ permalink raw reply
* [PATCH] rtc: ab-eoz9: add missing MODULE_DEVICE_TABLE()
From: Pengpeng Hou @ 2026-07-04 15:25 UTC (permalink / raw)
To: Alexandre Belloni
Cc: Pengpeng Hou, open list:REAL TIME CLOCK (RTC) SUBSYSTEM,
linux-kernel
The driver has a match table for the i2c bus wired into its driver
structure, but the table is not exported with MODULE_DEVICE_TABLE().
Add the missing MODULE_DEVICE_TABLE() entry so module alias information
is generated for automatic module loading.
This is a source-level fix. It does not claim dynamic hardware
reproduction; the evidence is the driver-owned match table, its use by
the driver registration structure, and the missing module alias
publication.
Signed-off-by: Pengpeng Hou <pengpeng@iscas.ac.cn>
---
drivers/rtc/rtc-ab-eoz9.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/rtc/rtc-ab-eoz9.c b/drivers/rtc/rtc-ab-eoz9.c
index de002f7a39bf..8dc656bb78bf 100644
--- a/drivers/rtc/rtc-ab-eoz9.c
+++ b/drivers/rtc/rtc-ab-eoz9.c
@@ -549,6 +549,7 @@ static const struct i2c_device_id abeoz9_id[] = {
{ "abeoz9" },
{ }
};
+MODULE_DEVICE_TABLE(i2c, abeoz9_id);
static struct i2c_driver abeoz9_driver = {
.driver = {
--
2.53.0
^ permalink raw reply related
* Re: [PATCH] rtc: s32g: add missing MODULE_DEVICE_TABLE()
From: sashiko-bot @ 2026-07-04 12:22 UTC (permalink / raw)
To: Pengpeng Hou; +Cc: linux-rtc, Alexandre Belloni
In-Reply-To: <20260704122003.70108-1-pengpeng@iscas.ac.cn>
> The driver has an OF match table wired to .of_match_table, but does
> not export the table with MODULE_DEVICE_TABLE().
>
> Add the missing MODULE_DEVICE_TABLE(of, ...) entry so module alias
> information is generated for OF based module autoloading.
>
> This is a source-level fix. It does not claim dynamic hardware
> reproduction; the evidence is the driver-owned match table, its use by
> the platform driver, and the missing module alias publication.
>
> Signed-off-by: Pengpeng Hou <pengpeng@iscas.ac.cn>
Sashiko has reviewed this patch and found no issues. It looks great!
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260704122003.70108-1-pengpeng@iscas.ac.cn?part=1
^ permalink raw reply
* [PATCH] rtc: s32g: add missing MODULE_DEVICE_TABLE()
From: Pengpeng Hou @ 2026-07-04 12:20 UTC (permalink / raw)
To: Chester Lin, Matthias Brugger, Ghennadi Procopciuc,
NXP S32 Linux Team, Alexandre Belloni
Cc: Pengpeng Hou, linux-arm-kernel, linux-rtc, linux-kernel
The driver has an OF match table wired to .of_match_table, but does
not export the table with MODULE_DEVICE_TABLE().
Add the missing MODULE_DEVICE_TABLE(of, ...) entry so module alias
information is generated for OF based module autoloading.
This is a source-level fix. It does not claim dynamic hardware
reproduction; the evidence is the driver-owned match table, its use by
the platform driver, and the missing module alias publication.
Signed-off-by: Pengpeng Hou <pengpeng@iscas.ac.cn>
---
drivers/rtc/rtc-s32g.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/rtc/rtc-s32g.c b/drivers/rtc/rtc-s32g.c
index 3a0818e972eb..86716192d10f 100644
--- a/drivers/rtc/rtc-s32g.c
+++ b/drivers/rtc/rtc-s32g.c
@@ -366,6 +366,7 @@ static const struct of_device_id rtc_dt_ids[] = {
{ .compatible = "nxp,s32g2-rtc", .data = &rtc_s32g2_data },
{ /* sentinel */ },
};
+MODULE_DEVICE_TABLE(of, rtc_dt_ids);
static DEFINE_SIMPLE_DEV_PM_OPS(s32g_rtc_pm_ops,
s32g_rtc_suspend, s32g_rtc_resume);
^ permalink raw reply related
* Re: [PATCH] rtc: brcmstb-waketimer: add missing MODULE_DEVICE_TABLE()
From: sashiko-bot @ 2026-07-04 12:19 UTC (permalink / raw)
To: Pengpeng Hou; +Cc: linux-rtc, Alexandre Belloni
In-Reply-To: <20260704121734.54941-1-pengpeng@iscas.ac.cn>
> The driver has an OF match table wired to .of_match_table, but does
> not export the table with MODULE_DEVICE_TABLE().
>
> Add the missing MODULE_DEVICE_TABLE(of, ...) entry so module alias
> information is generated for OF based module autoloading.
>
> This is a source-level fix. It does not claim dynamic hardware
> reproduction; the evidence is the driver-owned match table, its use by
> the platform driver, and the missing module alias publication.
>
> Signed-off-by: Pengpeng Hou <pengpeng@iscas.ac.cn>
Sashiko has reviewed this patch and found no issues. It looks great!
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260704121734.54941-1-pengpeng@iscas.ac.cn?part=1
^ permalink raw reply
* [PATCH] rtc: brcmstb-waketimer: add missing MODULE_DEVICE_TABLE()
From: Pengpeng Hou @ 2026-07-04 12:17 UTC (permalink / raw)
To: Alexandre Belloni, Florian Fainelli,
Broadcom internal kernel review list
Cc: Pengpeng Hou, linux-rtc, linux-arm-kernel, linux-kernel
The driver has an OF match table wired to .of_match_table, but does
not export the table with MODULE_DEVICE_TABLE().
Add the missing MODULE_DEVICE_TABLE(of, ...) entry so module alias
information is generated for OF based module autoloading.
This is a source-level fix. It does not claim dynamic hardware
reproduction; the evidence is the driver-owned match table, its use by
the platform driver, and the missing module alias publication.
Signed-off-by: Pengpeng Hou <pengpeng@iscas.ac.cn>
---
drivers/rtc/rtc-brcmstb-waketimer.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/rtc/rtc-brcmstb-waketimer.c b/drivers/rtc/rtc-brcmstb-waketimer.c
index fb47c32ab5ff..55c15aad42cf 100644
--- a/drivers/rtc/rtc-brcmstb-waketimer.c
+++ b/drivers/rtc/rtc-brcmstb-waketimer.c
@@ -413,6 +413,7 @@ static const __maybe_unused struct of_device_id brcmstb_waketmr_of_match[] = {
{ .compatible = "brcm,brcmstb-waketimer" },
{ /* sentinel */ },
};
+MODULE_DEVICE_TABLE(of, brcmstb_waketmr_of_match);
static struct platform_driver brcmstb_waketmr_driver = {
.probe = brcmstb_waketmr_probe,
^ permalink raw reply related
* Re: [PATCH v3 6/8] clk: sunxi-ng: div: add read-only operation support
From: Chen-Yu Tsai @ 2026-07-04 8:25 UTC (permalink / raw)
To: Jerome Brunet
Cc: Junhui Liu, Alexandre Belloni, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jernej Skrabec, Samuel Holland, Michael Turquette,
Stephen Boyd, Maxime Ripard, linux-rtc, devicetree,
linux-arm-kernel, linux-sunxi, linux-kernel, linux-clk
In-Reply-To: <20260702-a733-rtc-v3-6-eb2580374de6@baylibre.com>
On Thu, Jul 2, 2026 at 4:11 PM Jerome Brunet <jbrunet@baylibre.com> wrote:
>
> Add support for sunxi-ng read-only dividers. This will be
> useful to the a733 oscillator detection logic.
>
> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
> ---
> drivers/clk/sunxi-ng/ccu_div.c | 42 ++++++++++++++++++++++++++++++++++++++++++
> drivers/clk/sunxi-ng/ccu_div.h | 1 +
> drivers/clk/sunxi-ng/ccu_mux.c | 3 ++-
> drivers/clk/sunxi-ng/ccu_mux.h | 4 ++++
> 4 files changed, 49 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/clk/sunxi-ng/ccu_div.c b/drivers/clk/sunxi-ng/ccu_div.c
> index 62d680ccb524..d1c8c7baa12d 100644
> --- a/drivers/clk/sunxi-ng/ccu_div.c
> +++ b/drivers/clk/sunxi-ng/ccu_div.c
> @@ -84,6 +84,36 @@ static int ccu_div_determine_rate(struct clk_hw *hw,
> req, ccu_div_determine_rate_helper, cd);
> }
>
> +static int ccu_rodiv_determine_rate(struct clk_hw *hw,
> + struct clk_rate_request *req)
> +{
> + struct ccu_div *cd = hw_to_ccu_div(hw);
> + unsigned long val;
> + u32 reg;
> + int ret;
> +
> + reg = readl(cd->common.base + cd->common.reg);
> + val = reg >> cd->div.shift;
> + val &= (1 << cd->div.width) - 1;
> +
> + req->rate = ccu_mux_helper_unapply_prediv(&cd->common, &cd->mux, -1,
> + req->rate);
> +
> + if (cd->common.features & CCU_FEATURE_FIXED_POSTDIV)
> + req->rate *= cd->fixed_post_div;
> +
> + ret = divider_ro_determine_rate(hw, req, cd->div.table,
> + cd->div.width, cd->div.flags, val);
> +
> + if (cd->common.features & CCU_FEATURE_FIXED_POSTDIV)
> + req->rate /= cd->fixed_post_div;
> +
> + req->rate = ccu_mux_helper_apply_prediv(&cd->common, &cd->mux, -1,
> + req->rate);
> +
> + return ret;
> +}
> +
> static int ccu_div_set_rate(struct clk_hw *hw, unsigned long rate,
> unsigned long parent_rate)
> {
> @@ -143,3 +173,15 @@ const struct clk_ops ccu_div_ops = {
> .set_rate = ccu_div_set_rate,
> };
> EXPORT_SYMBOL_NS_GPL(ccu_div_ops, "SUNXI_CCU");
> +
> +const struct clk_ops ccu_rodiv_ops = {
> + .disable = ccu_div_disable,
> + .enable = ccu_div_enable,
> + .is_enabled = ccu_div_is_enabled,
> +
> + .get_parent = ccu_div_get_parent,
> +
> + .determine_rate = ccu_rodiv_determine_rate,
> + .recalc_rate = ccu_div_recalc_rate,
> +};
> +EXPORT_SYMBOL_NS_GPL(ccu_rodiv_ops, "SUNXI_CCU");
> diff --git a/drivers/clk/sunxi-ng/ccu_div.h b/drivers/clk/sunxi-ng/ccu_div.h
> index be00b3277e97..a30a92780a05 100644
> --- a/drivers/clk/sunxi-ng/ccu_div.h
> +++ b/drivers/clk/sunxi-ng/ccu_div.h
> @@ -300,5 +300,6 @@ static inline struct ccu_div *hw_to_ccu_div(struct clk_hw *hw)
> }
>
> extern const struct clk_ops ccu_div_ops;
> +extern const struct clk_ops ccu_rodiv_ops;
>
> #endif /* _CCU_DIV_H_ */
> diff --git a/drivers/clk/sunxi-ng/ccu_mux.c b/drivers/clk/sunxi-ng/ccu_mux.c
> index 766f27cff748..e2d6833a6d33 100644
> --- a/drivers/clk/sunxi-ng/ccu_mux.c
> +++ b/drivers/clk/sunxi-ng/ccu_mux.c
> @@ -68,13 +68,14 @@ unsigned long ccu_mux_helper_apply_prediv(struct ccu_common *common,
> }
> EXPORT_SYMBOL_NS_GPL(ccu_mux_helper_apply_prediv, "SUNXI_CCU");
>
> -static unsigned long ccu_mux_helper_unapply_prediv(struct ccu_common *common,
> +unsigned long ccu_mux_helper_unapply_prediv(struct ccu_common *common,
> struct ccu_mux_internal *cm,
> int parent_index,
> unsigned long parent_rate)
> {
> return parent_rate * ccu_mux_get_prediv(common, cm, parent_index);
> }
> +EXPORT_SYMBOL_NS_GPL(ccu_mux_helper_unapply_prediv, "SUNXI_CCU");
This does not need to be exported since all the base clocks build into
one module. And maybe it shouldn't as we probably don't want individual
clock drivers implementing ops.
Otherwise,
Reviewed-by: Chen-Yu Tsai <wens@kernel.org>
> int ccu_mux_helper_determine_rate(struct ccu_common *common,
> struct ccu_mux_internal *cm,
> diff --git a/drivers/clk/sunxi-ng/ccu_mux.h b/drivers/clk/sunxi-ng/ccu_mux.h
> index c94a4bde5d01..272a2c36a8f2 100644
> --- a/drivers/clk/sunxi-ng/ccu_mux.h
> +++ b/drivers/clk/sunxi-ng/ccu_mux.h
> @@ -134,6 +134,10 @@ unsigned long ccu_mux_helper_apply_prediv(struct ccu_common *common,
> struct ccu_mux_internal *cm,
> int parent_index,
> unsigned long parent_rate);
> +unsigned long ccu_mux_helper_unapply_prediv(struct ccu_common *common,
> + struct ccu_mux_internal *cm,
> + int parent_index,
> + unsigned long parent_rate);
> int ccu_mux_helper_determine_rate(struct ccu_common *common,
> struct ccu_mux_internal *cm,
> struct clk_rate_request *req,
>
> --
> 2.47.3
>
^ permalink raw reply
* Re: [PATCH 2/8] dt-bindings: mfd: ROHM BD73800 PMIC
From: Linus Walleij @ 2026-07-03 20:46 UTC (permalink / raw)
To: Matti Vaittinen
Cc: Matti Vaittinen, Matti Vaittinen, Lee Jones, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Liam Girdwood, Mark Brown,
Michael Turquette, Stephen Boyd, Brian Masney,
Bartosz Golaszewski, Alexandre Belloni, devicetree, linux-kernel,
linux-clk, linux-gpio, linux-rtc
In-Reply-To: <3e700a3fa7872a96257ff25a77670ec05cfd239c.1782909323.git.mazziesaccount@gmail.com>
Hi Matti,
thanks for your patch!
I have some inevitable pin control nitpicks!
On Wed, Jul 1, 2026 at 2:41 PM Matti Vaittinen
<matti.vaittinen@linux.dev> wrote:
> + # The GPIO1, CLKOUT (GPIO2), FAULT_B and EXTEN_OUT pins can be
> + # configured to interrupt pins by OTP.
Maybe move this helpful comment into the top description: instead?
It's kind of generic helpful info.
> +# The GPIO1, CLKOUT, FAULT_B and EXTEN_OUT pins may be configured for a
> +# specific purpose (like ADC input, 32.768 clk output, fault indicator or
> +# delivering power sequence to a companion PMIC when multiple PMICs are
> +# used) - but also to be either a GPO or GPI. (When used as a GPI the pin
> +# can also be used as an IRQ source). The pin purpose is determined by
> +# OTP (One Time Programmable memory), typically during device manufacturing.
> +# The OTP can't be read at runtime so device-tree should describe the pins.
> + rohm,pin-gpio1:
> + $ref: /schemas/types.yaml#/definitions/string
> + description:
> + Indicate if the GPIO1 pin has been set to GPI or GPO at manufacturing.
> + enum: [gpi, gpo]
> +
> + rohm,pin-clkout:
> + $ref: /schemas/types.yaml#/definitions/string
> + description:
> + Indicate if the CLKOUT pin has been set to GPI or GPO at manufacturing.
> + enum: [gpi, gpo]
> +
> + rohm,pin-fault-b:
> + $ref: /schemas/types.yaml#/definitions/string
> + description:
> + Indicate if the FAULT_B pin has been set to GPI or GPO at manufacturing.
> + enum: [gpi, gpo]
> +
> + rohm,pin-exten:
> + $ref: /schemas/types.yaml#/definitions/string
> + description:
> + Indicate if the EXTEN_OUT pin has been set to GPI or GPO at
> + manufacturing.
> + enum: [gpi, gpo]
Can we explain what "GPI" and "GPO" means in this context?
I read it as "general purpose input" and "general purpose output", but...
you just describe the exact purpose? So what is "general purpose"
about them in that case?
I would re-use "input-enable" and "output-enable" from:
Documentation/devicetree/bindings/pinctrl/pincfg-node.yaml
(I mean don't $rf that, just use these strings).
I suppose:
enum: [input-enable, output-enable]
> + rohm,clkout-open-drain:
> + description: clk32kout mode. Set to 1 for "open-drain" or 0 for "cmos".
> + $ref: /schemas/types.yaml#/definitions/uint32
> + minimum: 0
> + maximum: 1
Here I would also reuse the generic pinconf properties,
something like;
rohm,clkout-drive-type:
enum: [drive-push-pull, drive-open-drain]
(Push-pull is what is colloquially referred to as "cmos".)
> + rohm,pin-gpio1 = "gpo";
> + rohm,pin-exten = "gpi";
If you instead use nodes with properties you can do this:
rohm,pin-clkout {
output-enable;
drive-push-pull;
};
This collects the clkout config in one place and make
it obvious what is going on. But I don't know what the DT
maintainers think about this idea.
Yours,
Linus Walleij
^ permalink raw reply
* Re: [PATCH] dt-bindings: rtc: microchip,pic32mzda-rtc: Convert to DT schema
From: Conor Dooley @ 2026-07-03 16:20 UTC (permalink / raw)
To: Udaya Kiran Challa
Cc: alexandre.belloni, robh, krzk+dt, conor+dt, skhan, me, linux-rtc,
devicetree, linux-kernel
In-Reply-To: <20260703110442.205026-1-challauday369@gmail.com>
[-- Attachment #1: Type: text/plain, Size: 75 bytes --]
Acked-by: Conor Dooley <conor.dooley@microchip.com>
pw-bot: not-applicable
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
^ permalink raw reply
* Re: [PATCH 7/8] gpio: bd73800: Support ROHM BD73800 PMIC GPIOs
From: Bartosz Golaszewski @ 2026-07-03 13:11 UTC (permalink / raw)
To: Matti Vaittinen
Cc: Matti Vaittinen, Lee Jones, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Liam Girdwood, Mark Brown, Michael Turquette,
Stephen Boyd, Brian Masney, Linus Walleij, Bartosz Golaszewski,
Alexandre Belloni, devicetree, linux-kernel, linux-clk,
linux-gpio, linux-rtc, Matti Vaittinen
In-Reply-To: <27fb93d0e61704d495e3adf4ed614edac1642267.1782909323.git.mazziesaccount@gmail.com>
On Wed, 1 Jul 2026 14:43:25 +0200, Matti Vaittinen
<matti.vaittinen@linux.dev> said:
> From: Matti Vaittinen <mazziesaccount@gmail.com>
>
> The ROHM BD73800 PMIC has 4 pins (named GPIO1, CLKOUT, FAULT_B and
> EXTEN_OUT) which might have been set to operate as a GPI or GPO when OTP
> (One Time Programmable memory) is written at device manufacturing.
> Support the GPI/GPO use-case via GPIO framework.
>
> The default OTP for these pins is to not use any of them as GPI or GPO.
> (The GPIO1 defaults as an ADC input regardless the naming). Hence the
> driver assumes none of these pins is a GPI/GPO unless explicitly pointed
> as GPI or GPO via device tree.
>
> Furthermore, pin's direction can't be changed after OTP configuration is
> done. Also the default drive type for a GPO (CMOS / Open Drain) is set
> by the OTP configuration. The BD73800 has a set of undocumented test
> registers which should allow changing the drive type. Access to the test
> register area or the test registers aren't documented and so this driver
> does not support configuring the drive type even though it might be
> doable.
>
> Signed-off-by: Matti Vaittinen <mazziesaccount@gmail.com>
> ---
> drivers/gpio/Kconfig | 11 ++
> drivers/gpio/Makefile | 1 +
> drivers/gpio/gpio-bd73800.c | 234 ++++++++++++++++++++++++++++++++++++
> 3 files changed, 246 insertions(+)
> create mode 100644 drivers/gpio/gpio-bd73800.c
>
> diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
> index 28cf6d2e83c2..09d87c3b756f 100644
> --- a/drivers/gpio/Kconfig
> +++ b/drivers/gpio/Kconfig
> @@ -1363,6 +1363,17 @@ config GPIO_BD72720
> be configured to GPO on the ROHM PMIC. The pin configuration is done
> on OTP at manufacturing.
>
> +config GPIO_BD73800
> + tristate "ROHM BD73800 GPIO support"
> + depends on MFD_ROHM_BD71828
> + help
> + Support for GPIOs on ROHM BD73800 PMIC. There can be up to 4
> + GPI or GPO pins available on the PMIC in total. The purpose of
> + the pins is decided at the device manufacturing by OTP
> + configuration and can't be reconfigured later. Enable this
> + if your PMIC has pins set as GPIs or GPOs and if you wish to
> + control the pins via the GPIO framework.
> +
> config GPIO_BD9571MWV
> tristate "ROHM BD9571 GPIO support"
> depends on MFD_BD9571MWV
> diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
> index 4d0e900402fc..3041c06aa933 100644
> --- a/drivers/gpio/Makefile
> +++ b/drivers/gpio/Makefile
> @@ -45,6 +45,7 @@ obj-$(CONFIG_GPIO_BCM_XGS_IPROC) += gpio-xgs-iproc.o
> obj-$(CONFIG_GPIO_BD71815) += gpio-bd71815.o
> obj-$(CONFIG_GPIO_BD71828) += gpio-bd71828.o
> obj-$(CONFIG_GPIO_BD72720) += gpio-bd72720.o
> +obj-$(CONFIG_GPIO_BD73800) += gpio-bd73800.o
> obj-$(CONFIG_GPIO_BD9571MWV) += gpio-bd9571mwv.o
> obj-$(CONFIG_GPIO_BLZP1600) += gpio-blzp1600.o
> obj-$(CONFIG_GPIO_BRCMSTB) += gpio-brcmstb.o
> diff --git a/drivers/gpio/gpio-bd73800.c b/drivers/gpio/gpio-bd73800.c
> new file mode 100644
> index 000000000000..3fe4b7f167b8
> --- /dev/null
> +++ b/drivers/gpio/gpio-bd73800.c
> @@ -0,0 +1,234 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Support to GPIOs on ROHM BD73800
> + * Copyright 2024 ROHM Semiconductors.
> + * Author: Matti Vaittinen <mazziesaccount@gmail.com>
> + */
> +
> +#include <linux/gpio/driver.h>
> +#include <linux/init.h>
> +#include <linux/irq.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/platform_device.h>
> +#include <linux/mfd/rohm-bd73800.h>
> +
> +#define BD73800_GPIO_MAX_PINS 4
> +/*
> + * The BD73800 has several "one time programmable" (OTP) configurations which
> + * can be set at manufacturing phase. Some of these options allow using
> + * individual pins as GPI or GPO (not both at the same time). The OTP
> + * configuration can't be read at run-time, so drivers rely on device-tree to
> + * advertise the OTP programmed in manufacturing.
> + *
> + * The pins which can be used as GPIO are:
> + * GPIO1, CLKOUT (GPIO2), FAULT_B, EXTEN_OUT.
> + *
> + * The OTP options 2 and 3 state for all the pins:
> + * - OTP2: GPI (also IRQ source)
> + * - OTP3: GPO (NOTE: This is actually 2 different OTP options. Either a
> + * register controllable output or a power-sequence controlled output.
> + * The "gpo" referred here means only the register controllable output.
> + * The datasheet refers to this as: "<pin> output is controlled by
> + * GPIO<N>_OUT or power on/off sequencer to control external VRs. ON/OFF
> + * sequence timing is configurable."
> + *
> + * The data-sheet further says that the GPI/GPO is not a default OTP
> + * configuration for any of the pins. Hence the GPIO driver defaults to a pin
> + * not being a GPI or GPO, but requires the pin to be explicitly marked as a
> + * GPI or GPO in the device-tree.
> + *
> + * DT properties:
> + * "rohm,pin-gpio1", "rohm,pin-clkout", "rohm,pin-fault-b", "rohm,pin-exten"
> + * can be set to one of the values "gpi" or "gpo" to enable them to be used as
> + * GPIO.
> + */
> +
> +enum bd73800_gpio_state {
> + BD73800_PIN_UNKNOWN,
> + BD73800_PIN_GPI,
> + BD73800_PIN_GPO,
> +};
> +
> +struct bd73800_gpio_pin_cfg {
> + enum bd73800_gpio_state state;
> + int mask; /* GPIO_OUT and INT_SRC have same bit offsets for GPIO */
> +};
> +
> +struct bd73800_gpio {
> + /* chip.parent points the MFD which provides DT node and regmap */
> + struct gpio_chip chip;
> + struct bd73800_gpio_pin_cfg pin[BD73800_GPIO_MAX_PINS];
> + int num_pins;
> + /* dev points to the platform device for devm and prints */
> + struct device *dev;
> + struct regmap *regmap;
> +};
> +
> +static int bd73800_gpio_get_pins(struct bd73800_gpio *g)
> +{
> + static const char * const properties[] = {"rohm,pin-gpio1",
> + "rohm,pin-clkout", "rohm,pin-fault-b", "rohm,pin-exten"};
> + const char *val;
> + int i, ret;
> +
> + for (i = 0; i < ARRAY_SIZE(properties); i++) {
> + ret = fwnode_property_read_string(dev_fwnode(g->dev->parent),
It would be cleaner with device_property_read_string(g->dev->parent, ...)
> + properties[i], &val);
> +
> + if (ret) {
> + if (ret == -EINVAL)
> + continue;
> +
> + return dev_err_probe(g->dev, ret,
> + "pin %d (%s), bad configuration\n", i,
> + properties[i]);
> + }
> +
> + if (strcmp(val, "gpi") == 0) {
> + g->pin[g->num_pins].state = BD73800_PIN_GPI;
> + g->pin[g->num_pins].mask = BIT(i);
> + g->num_pins++;
> + } else if (strcmp(val, "gpo") == 0) {
> + g->pin[g->num_pins].state = BD73800_PIN_GPO;
> + g->pin[g->num_pins].mask = BIT(i);
> + g->num_pins++;
> + }
> + }
> +
> + return 0;
> +}
> +
> +static int bd73800gpio_get(struct gpio_chip *chip, unsigned int offset)
> +{
> + struct bd73800_gpio *bdgpio = gpiochip_get_data(chip);
> + struct bd73800_gpio_pin_cfg *pin = &bdgpio->pin[offset];
> + int ret, val;
> +
> + /* Only pins configured as GPI via OTP can have their status read */
> + if (pin->state != BD73800_PIN_GPI) {
> + dev_dbg(bdgpio->dev, "pin %d (%x) not input. State %d\n",
> + offset, pin->mask, pin->state);
> + return -EINVAL;
> + }
> +
> + ret = regmap_read(bdgpio->regmap, BD73800_REG_INT_5_SRC, &val);
> + if (ret)
> + return ret;
> +
> + return val & pin->mask;
> +}
> +
> +static int bd73800gpo_set(struct gpio_chip *chip, unsigned int offset,
> + int value)
> +{
> + struct bd73800_gpio *bdgpio = gpiochip_get_data(chip);
> + struct bd73800_gpio_pin_cfg *pin = &bdgpio->pin[offset];
> +
> + if (pin->state != BD73800_PIN_GPO) {
> + dev_dbg(bdgpio->dev, "pin %d (%d) not output. State %d\n",
> + offset, pin->mask, pin->state);
> +
> + return -EINVAL;
> + }
> +
> + if (value)
> + return regmap_set_bits(bdgpio->regmap, BD73800_REG_GPO_OUT,
> + pin->mask);
> +
> + return regmap_clear_bits(bdgpio->regmap, BD73800_REG_GPO_OUT, pin->mask);
> +}
> +
> +static int bd73800gpio_direction_get(struct gpio_chip *chip,
> + unsigned int offset)
> +{
> + struct bd73800_gpio *bdgpio = gpiochip_get_data(chip);
> +
> + if (bdgpio->pin[offset].state == BD73800_PIN_GPO)
> + return GPIO_LINE_DIRECTION_OUT;
> +
> + return GPIO_LINE_DIRECTION_IN;
> +}
> +
> +/*
> + * Template for GPIO chip. The BD73800 GPO supports both CMOS and open drain
> + * configurations. The default however depends on the OTP. The runtime config
> + * can be done via undocumented test registers - but at the moment there is no
> + * support for this.
> + *
> + * NOTE: When the BD73800 GPIO pins are used as IRQ source, the users are
> + * expected to request them directly from the regmap_irq IRQ-chip (implemented
> + * in the MFD driver). This way we don't need to populate another IRQ-chip
> + * here.
> + */
> +static const struct gpio_chip bd73800gpio_chip = {
> + .label = "bd73800",
> + .owner = THIS_MODULE,
> + .get = bd73800gpio_get,
> + .get_direction = bd73800gpio_direction_get,
> + .set = bd73800gpo_set,
> + .can_sleep = true,
> +};
> +
> +static int gpo_bd73800_probe(struct platform_device *pdev)
> +{
> + struct bd73800_gpio *g;
May I suggest a slightly more descriptive name for driver data? Maybe at the
very least... "data"? :)
> + struct device *parent, *dev;
> + int ret;
> +
> + /*
> + * Bind devm lifetime to this platform device => use dev for devm.
> + * also the prints should originate from this device.
> + */
Why would you need to comment on it though? It's very much the standard
approach, isn't it?
> + dev = &pdev->dev;
> + /* The device-tree and regmap come from MFD => use parent for that */
> + parent = dev->parent;
> +
> + g = devm_kzalloc(dev, sizeof(*g), GFP_KERNEL);
> + if (!g)
> + return -ENOMEM;
> +
> + g->chip = bd73800gpio_chip;
> + g->chip.base = -1;
> + g->chip.parent = parent;
> + g->regmap = dev_get_regmap(parent, NULL);
> + g->dev = dev;
> +
> + ret = bd73800_gpio_get_pins(g);
> + if (ret)
> + return ret;
> +
> + if (!g->num_pins) {
> + /*
> + * The BD73800 may or may not have pins allocated for GPIO
> + * depending on the OTP used at manufacturing. Free the memory
> + * and go out if there is no pins as then we have nothing to do
> + */
> + dev_dbg(dev, "no GPIO pins\n");
> + devm_kfree(dev, g);
No need for that, because...
> + return 0;
... this will still leave a bound device in the system, I'm not sure we want
it? The correct error code in this case is -ENODEV.
> + }
> + g->chip.ngpio = g->num_pins;
> +
> + return devm_gpiochip_add_data(dev, &g->chip, g);
> +}
> +
> +static const struct platform_device_id bd73800_gpio_id[] = {
> + { "bd73800-gpio" },
> + { },
> +};
> +MODULE_DEVICE_TABLE(platform, bd73800_gpio_id);
> +
> +static struct platform_driver gpo_bd73800_driver = {
> + .driver = {
> + .name = "bd73800-gpio",
> + .probe_type = PROBE_PREFER_ASYNCHRONOUS,
> + },
> + .probe = gpo_bd73800_probe,
> + .id_table = bd73800_gpio_id,
> +};
> +module_platform_driver(gpo_bd73800_driver);
> +
> +MODULE_AUTHOR("Matti Vaittinen <mazziesaccount@gmail.com>");
> +MODULE_DESCRIPTION("GPIO interface for BD73800");
> +MODULE_LICENSE("GPL");
> --
> 2.54.0
>
>
Bart
^ permalink raw reply
* Re: [PATCH] dt-bindings: rtc: microchip,pic32mzda-rtc: Convert to DT schema
From: sashiko-bot @ 2026-07-03 11:14 UTC (permalink / raw)
To: Udaya Kiran Challa
Cc: linux-rtc, devicetree, robh, Alexandre Belloni, conor+dt
In-Reply-To: <20260703110442.205026-1-challauday369@gmail.com>
> Convert Microchip PIC32 Real Time Clock and Calendar devicetree binding
> from legacy text format to DT schema.
>
> Signed-off-by: Udaya Kiran Challa <challauday369@gmail.com>
Sashiko has reviewed this patch and found no issues. It looks great!
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260703110442.205026-1-challauday369@gmail.com?part=1
^ permalink raw reply
* [PATCH] dt-bindings: rtc: microchip,pic32mzda-rtc: Convert to DT schema
From: Udaya Kiran Challa @ 2026-07-03 11:04 UTC (permalink / raw)
To: alexandre.belloni, robh, krzk+dt, conor+dt
Cc: skhan, me, linux-rtc, devicetree, linux-kernel,
Udaya Kiran Challa
Convert Microchip PIC32 Real Time Clock and Calendar devicetree binding
from legacy text format to DT schema.
Signed-off-by: Udaya Kiran Challa <challauday369@gmail.com>
---
.../bindings/rtc/microchip,pic32-rtc.txt | 21 --------
.../bindings/rtc/microchip,pic32mzda-rtc.yaml | 50 +++++++++++++++++++
2 files changed, 50 insertions(+), 21 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/rtc/microchip,pic32-rtc.txt
create mode 100644 Documentation/devicetree/bindings/rtc/microchip,pic32mzda-rtc.yaml
diff --git a/Documentation/devicetree/bindings/rtc/microchip,pic32-rtc.txt b/Documentation/devicetree/bindings/rtc/microchip,pic32-rtc.txt
deleted file mode 100644
index 180b7144bfcc..000000000000
--- a/Documentation/devicetree/bindings/rtc/microchip,pic32-rtc.txt
+++ /dev/null
@@ -1,21 +0,0 @@
-* Microchip PIC32 Real Time Clock and Calendar
-
-The RTCC keeps time in hours, minutes, and seconds, and one half second. It
-provides a calendar in weekday, date, month, and year. It also provides a
-configurable alarm.
-
-Required properties:
-- compatible: should be: "microchip,pic32mzda-rtc"
-- reg: physical base address of the controller and length of memory mapped
- region.
-- interrupts: RTC alarm/event interrupt
-- clocks: clock phandle
-
-Example:
-
- rtc: rtc@1f8c0000 {
- compatible = "microchip,pic32mzda-rtc";
- reg = <0x1f8c0000 0x60>;
- interrupts = <166 IRQ_TYPE_EDGE_RISING>;
- clocks = <&PBCLK6>;
- };
diff --git a/Documentation/devicetree/bindings/rtc/microchip,pic32mzda-rtc.yaml b/Documentation/devicetree/bindings/rtc/microchip,pic32mzda-rtc.yaml
new file mode 100644
index 000000000000..481ee28c06e3
--- /dev/null
+++ b/Documentation/devicetree/bindings/rtc/microchip,pic32mzda-rtc.yaml
@@ -0,0 +1,50 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/rtc/microchip,pic32mzda-rtc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Microchip PIC32 Real Time Clock and Calendar
+
+maintainers:
+ - Alexandre Belloni <alexandre.belloni@bootlin.com>
+
+description: |
+ The Microchip PIC32 Real Time Clock and Calendar (RTCC) keeps time in hours,
+ minutes, seconds, and one half second. It also provides a calendar with
+ weekday, date, month, and year, along with a configurable alarm.
+
+allOf:
+ - $ref: rtc.yaml#
+
+properties:
+ compatible:
+ const: microchip,pic32mzda-rtc
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+
+ rtc@1f8c0000 {
+ compatible = "microchip,pic32mzda-rtc";
+ reg = <0x1f8c0000 0x60>;
+ interrupts = <166 IRQ_TYPE_EDGE_RISING>;
+ clocks = <&PBCLK6>;
+ };
--
2.34.1
^ permalink raw reply related
* Re: [PATCH v3 0/8] clk: sun6i-rtc: Add support for Allwinner A733 SoC
From: Enzo Adriano @ 2026-07-02 23:59 UTC (permalink / raw)
To: Jerome Brunet
Cc: Brian Masney, Michael Turquette, Stephen Boyd, Chen-Yu Tsai,
Maxime Ripard, Junhui Liu, Alexandre Belloni, linux-clk,
linux-rtc, linux-arm-kernel, linux-sunxi, devicetree,
linux-kernel, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Jernej Skrabec, Samuel Holland
In-Reply-To: <20260702-a733-rtc-v3-0-eb2580374de6@baylibre.com>
Hi Jerome,
I gave v3 a spin on a Radxa Cubie A7S here: it applied cleanly to my
local A733 stack, the RTC probes as rtc0, hwclock set and read-back
work, and the oscillator tree in clk_summary looks as expected. If
there are specific checks that would save you time for this or a
future revision, tell me what you would like exercised and I will
report back.
For transparency, the test harness is AI-assisted (Claude Code) and
results are verified against the captured serial logs.
Thanks,
Enzo
^ permalink raw reply
* Re: [PATCH v3 2/8] dt-bindings: rtc: sun6i: add sun60i-a733 support
From: Conor Dooley @ 2026-07-02 18:45 UTC (permalink / raw)
To: Jerome Brunet
Cc: Junhui Liu, Alexandre Belloni, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Chen-Yu Tsai, Jernej Skrabec, Samuel Holland,
Michael Turquette, Stephen Boyd, Maxime Ripard, linux-rtc,
devicetree, linux-arm-kernel, linux-sunxi, linux-kernel,
linux-clk
In-Reply-To: <20260702-a733-rtc-v3-2-eb2580374de6@baylibre.com>
[-- Attachment #1: Type: text/plain, Size: 75 bytes --]
Acked-by: Conor Dooley <conor.dooley@microchip.com>
pw-bot: not-applicable
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
^ permalink raw reply
* Re: [PATCH v3 1/8] dt-bindings: rtc: sun6i: no clock-output-names on h616/r329
From: Conor Dooley @ 2026-07-02 18:44 UTC (permalink / raw)
To: Jerome Brunet
Cc: Junhui Liu, Alexandre Belloni, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Chen-Yu Tsai, Jernej Skrabec, Samuel Holland,
Michael Turquette, Stephen Boyd, Maxime Ripard, linux-rtc,
devicetree, linux-arm-kernel, linux-sunxi, linux-kernel,
linux-clk, Sashiko
In-Reply-To: <20260702-a733-rtc-v3-1-eb2580374de6@baylibre.com>
[-- Attachment #1: Type: text/plain, Size: 75 bytes --]
Acked-by: Conor Dooley <conor.dooley@microchip.com>
pw-bot: not-applicable
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
^ permalink raw reply
* Re: [PATCH v3 1/8] dt-bindings: rtc: sun6i: no clock-output-names on h616/r329
From: Chen-Yu Tsai @ 2026-07-02 13:23 UTC (permalink / raw)
To: Jerome Brunet
Cc: Junhui Liu, Alexandre Belloni, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jernej Skrabec, Samuel Holland, Michael Turquette,
Stephen Boyd, Maxime Ripard, linux-rtc, devicetree,
linux-arm-kernel, linux-sunxi, linux-kernel, linux-clk, Sashiko
In-Reply-To: <20260702-a733-rtc-v3-1-eb2580374de6@baylibre.com>
On Thu, Jul 2, 2026 at 4:10 PM Jerome Brunet <jbrunet@baylibre.com> wrote:
>
> On h616 and r329 chips, clock output names are never defined through DT and
> are not meant to be. Just disallow the property for those chips.
>
> Reported-by: Sashiko <sashiko-bot@kernel.org>
> Closes: http://lore.kernel.org/r/20260629125305.0DF981F000E9@smtp.kernel.org
> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Chen-Yu Tsai <wens@kernel.org>
^ permalink raw reply
* Re: [PATCH v3 3/8] clk: sunxi-ng: fix ccu probe clock unregister on error
From: Chen-Yu Tsai @ 2026-07-02 13:23 UTC (permalink / raw)
To: Jerome Brunet
Cc: Junhui Liu, Alexandre Belloni, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Jernej Skrabec, Samuel Holland, Michael Turquette,
Stephen Boyd, Maxime Ripard, linux-rtc, devicetree,
linux-arm-kernel, linux-sunxi, linux-kernel, linux-clk, Sashiko
In-Reply-To: <20260702-a733-rtc-v3-3-eb2580374de6@baylibre.com>
On Thu, Jul 2, 2026 at 4:10 PM Jerome Brunet <jbrunet@baylibre.com> wrote:
>
> When registering clocks with sunxi_ccu_probe(), the number of ccu_clocks
> and the number of hw clocks might be different, eventhough they usually are
> the same.
>
> If they are different, it could lead to out-of-bound access or registered
> clock left behind on error.
>
> Use a different variable when iterating on hw clocks so every registered
> clock, and only those, gets unregistered on error.
>
> Reported-by: Sashiko <sashiko-bot@kernel.org>
> Closes: https://lore.kernel.org/r/20260629131254.7E34C1F00A3A@smtp.kernel.org
> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Chen-Yu Tsai <wens@kernel.org>
^ permalink raw reply
* Re: [PATCH 1/3] dt-bindings: rtc: Add sii,wakealarm-output-pin property for S35390A
From: Alexandre Belloni @ 2026-07-02 8:35 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Markus Probst, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Uwe Kleine-König, Andrew Lunn, Gregory Clement,
Sebastian Hesselbarth, linux-arm-kernel, linux-rtc, devicetree,
linux-kernel
In-Reply-To: <887cb4e9-d60d-47b5-9110-e00d18e9e46c@kernel.org>
On 02/07/2026 10:20:20+0200, Krzysztof Kozlowski wrote:
> On 02/07/2026 10:17, Alexandre Belloni wrote:
> > On 02/07/2026 08:09:55+0200, Krzysztof Kozlowski wrote:
> >>>> Then you need proper wakeup-source support
> >>> Wouldn't that break existing devicetrees?
> >>
> >> How?
> >>
> >>>
> >>> The current driver allows to wake up the system, even without
> >>> having wakeup-source set.
> >>
> >> Anyway, wakeup-source is already there in rtc, so this would be done. I
> >> don't get though, why there is no benefit of routing it to interrupt
> >> controller (interrupt controllers do wake up the system). Additionally,
> >> if you do not connect it to any interrupt, then how does it wake up the
> >> system?
> >>
> >
> > Some systems are routing the interrupt output of the RTC directly to the
> > PMIC and the PMIC is the one responsible for waking the rest of the
> > system, including the SoC.
>
> Yeah, then the PMIC has interrupt line to the SoC and the PMIC is the
> wakeup-source, not RTC.
>
This would be case 3 of Documentation/devicetree/bindings/power/wakeup-source.txt
> Best regards,
> Krzysztof
--
Alexandre Belloni, co-owner and COO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply
* Re: [PATCH v3 8/8] clk: sunxi-ng: sun6i-rtc: add a733 support
From: sashiko-bot @ 2026-07-02 8:29 UTC (permalink / raw)
To: Jerome Brunet
Cc: conor+dt, robh, linux-sunxi, Alexandre Belloni, linux-rtc,
devicetree
In-Reply-To: <20260702-a733-rtc-v3-8-eb2580374de6@baylibre.com>
> Add support for the sun60i a733 CCU RTC.
>
> Compared to the a523, this SoC has a different input oscillator divider
> which auto-detects the oscillator rate and select a divider to provide
> a fixed 32768Hz clock. It also provides several phy reference clocks
> with dedicated clock gates.
>
> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Sashiko has reviewed this patch and found no issues. It looks great!
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260702-a733-rtc-v3-0-eb2580374de6@baylibre.com?part=8
^ permalink raw reply
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