From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5E05BC43217 for ; Wed, 16 Nov 2022 02:51:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229937AbiKPCv3 (ORCPT ); Tue, 15 Nov 2022 21:51:29 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56572 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230507AbiKPCv2 (ORCPT ); Tue, 15 Nov 2022 21:51:28 -0500 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 48B0A29353; Tue, 15 Nov 2022 18:51:26 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2060D13D5; Tue, 15 Nov 2022 18:51:32 -0800 (PST) Received: from [10.162.40.17] (unknown [10.162.40.17]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id D8A1C3F663; Tue, 15 Nov 2022 18:51:15 -0800 (PST) Message-ID: <01ffa482-8d59-4cf9-f103-fb39a987873d@arm.com> Date: Wed, 16 Nov 2022 08:21:12 +0530 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.2.2 Subject: Re: [PATCH v6 2/2] arm64: support batched/deferred tlb shootdown during page reclamation Content-Language: en-US To: Nadav Amit , Yicong Yang Cc: "yangyicong@hisilicon.com" , Andrew Morton , Linux-MM , "linux-arm-kernel@lists.infradead.org" , X86 ML , Catalin Marinas , Will Deacon , "linux-doc@vger.kernel.org" , Jonathan Corbet , Peter Zijlstra , Arnd Bergmann , "punit.agrawal@bytedance.com" , kernel list , "darren@os.amperecomputing.com" , "huzhanyuan@oppo.com" , "lipeifeng@oppo.com" , "zhangshiming@oppo.com" , "guojian@oppo.com" , "realmz6@gmail.com" , "linux-mips@vger.kernel.org" , "openrisc@lists.librecores.org" , linuxppc-dev , "linux-riscv@lists.infradead.org" , linux-s390 , Barry Song <21cnbao@gmail.com>, "wangkefeng.wang@huawei.com" , haoxin , "prime.zeng@hisilicon.com" , Barry Song , Mel Gorman References: <20221115031425.44640-1-yangyicong@huawei.com> <20221115031425.44640-3-yangyicong@huawei.com> <0D3A45FE-5367-40CD-A035-37F6EE98B25E@vmware.com> <91e4804d-cb99-fd22-dafd-2f418f5c7ba9@huawei.com> From: Anshuman Khandual In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-s390@vger.kernel.org On 11/16/22 07:26, Nadav Amit wrote: > On Nov 15, 2022, at 5:50 PM, Yicong Yang wrote: > >> !! External Email >> >> On 2022/11/16 7:38, Nadav Amit wrote: >>> On Nov 14, 2022, at 7:14 PM, Yicong Yang wrote: >>> >>>> diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h >>>> index 8a497d902c16..5bd78ae55cd4 100644 >>>> --- a/arch/x86/include/asm/tlbflush.h >>>> +++ b/arch/x86/include/asm/tlbflush.h >>>> @@ -264,7 +264,8 @@ static inline u64 inc_mm_tlb_gen(struct mm_struct *mm) >>>> } >>>> >>>> static inline void arch_tlbbatch_add_mm(struct arch_tlbflush_unmap_batch *batch, >>>> - struct mm_struct *mm) >>>> + struct mm_struct *mm, >>>> + unsigned long uaddr) >>> >>> Logic-wise it looks fine. I notice the “v6", and it should not be blocking, >>> but I would note that the name "arch_tlbbatch_add_mm()” does not make much >>> sense once the function also takes an address. >> >> ok the add_mm should still apply to x86 since the address is not used, but not for arm64. >> >>> It could’ve been something like arch_set_tlb_ubc_flush_pending() but that’s >>> too long. I’m not very good with naming, but the current name is not great. >> >> What about arch_tlbbatch_add_pending()? Considering the x86 is pending the flush operation >> while arm64 is pending the sychronization operation, arch_tlbbatch_add_pending() should >> make sense to both. > > Sounds reasonable. Thanks. +1, agreed.