From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga09.intel.com ([134.134.136.24]:44973 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1733239AbgJIJr7 (ORCPT ); Fri, 9 Oct 2020 05:47:59 -0400 Date: Fri, 9 Oct 2020 12:47:50 +0300 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH v2 17/17] drm/i915: Properly request PCI BARs Message-ID: <20201009094750.GQ6112@intel.com> References: <20201009075934.3509076-1-daniel.vetter@ffwll.ch> <20201009075934.3509076-18-daniel.vetter@ffwll.ch> MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Disposition: inline Content-Transfer-Encoding: quoted-printable In-Reply-To: <20201009075934.3509076-18-daniel.vetter@ffwll.ch> List-ID: To: Daniel Vetter Cc: DRI Development , LKML , linux-s390@vger.kernel.org, linux-samsung-soc@vger.kernel.org, Jan Kara , Kees Cook , kvm@vger.kernel.org, Jason Gunthorpe , linux-pci@vger.kernel.org, linux-mm@kvack.org, =?iso-8859-1?B?Suly9G1l?= Glisse , John Hubbard , Bjorn Helgaas , Daniel Vetter , Dan Williams , Andrew Morton , linux-arm-kernel@lists.infradead.org, linux-media@vger.kernel.org On Fri, Oct 09, 2020 at 09:59:34AM +0200, Daniel Vetter wrote: > When trying to test my CONFIG_IO_STRICT_DEVMEM changes I realized they > do nothing for i915. Because i915 doesn't request any regions, like > pretty much all drm pci drivers. I guess this is some very old > remnants from the userspace modesetting days, when we wanted to > co-exist with the fbdev driver. Which usually requested these > resources. >=20 > But makes me wonder why the pci subsystem doesn't just request > resource automatically when we map a bar and a pci driver is bound? >=20 > Knowledge about which pci bars we need kludged together from > intel_uncore.c and intel_gtt.c from i915 and intel-gtt.c over in the > fake agp driver. >=20 > Signed-off-by: Daniel Vetter > Cc: Jason Gunthorpe > Cc: Kees Cook > Cc: Dan Williams > Cc: Andrew Morton > Cc: John Hubbard > Cc: J=EF=BF=BDr=EF=BF=BDme Glisse > Cc: Jan Kara > Cc: Dan Williams > Cc: linux-mm@kvack.org > Cc: linux-arm-kernel@lists.infradead.org > Cc: linux-samsung-soc@vger.kernel.org > Cc: linux-media@vger.kernel.org > Cc: Bjorn Helgaas > Cc: linux-pci@vger.kernel.org > --- > drivers/gpu/drm/i915/intel_uncore.c | 25 +++++++++++++++++++++++-- > 1 file changed, 23 insertions(+), 2 deletions(-) >=20 > diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/i= ntel_uncore.c > index 54e201fdeba4..ce39049d8919 100644 > --- a/drivers/gpu/drm/i915/intel_uncore.c > +++ b/drivers/gpu/drm/i915/intel_uncore.c > @@ -1692,10 +1692,13 @@ static int uncore_mmio_setup(struct intel_uncore = *uncore) > struct pci_dev *pdev =3D i915->drm.pdev; > int mmio_bar; > int mmio_size; > + int bar_selection; Signed bitmasks always make me uneasy. But looks like that's what it is in the pci api. So meh. > + int ret; > =20 > mmio_bar =3D IS_GEN(i915, 2) ? 1 : 0; > + bar_selection =3D BIT (2) | BIT(mmio_bar); ^ spurious space =20 That's also not correct for gen2 I think. gen2: 0 =3D GMADR 1 =3D MMADR 2 =3D IOBAR gen3: 0 =3D MMADR 1 =3D IOBAR 2 =3D GMADR 3 =3D GTTADR gen4+: 0+1 =3D GTTMMADR 2+3 =3D GMADR 4 =3D IOBAR Maybe we should just have an explicit list of bars like that in a comment? I'd also suggest sucking this bitmask calculation into a small helper so you can reuse it for the release. > /* > - * Before gen4, the registers and the GTT are behind different BARs. > + * On gen3 the registers and the GTT are behind different BARs. > * However, from gen4 onwards, the registers and the GTT are shared > * in the same BAR, so we want to restrict this ioremap from > * clobbering the GTT which we want ioremap_wc instead. Fortunately, > @@ -1703,6 +1706,8 @@ static int uncore_mmio_setup(struct intel_uncore *u= ncore) > * generations up to Ironlake. > * For dgfx chips register range is expanded to 4MB. > */ > + if (INTEL_GEN(i915) =3D=3D 3) > + bar_selection |=3D BIT(3); > if (INTEL_GEN(i915) < 5) > mmio_size =3D 512 * 1024; > else if (IS_DGFX(i915)) > @@ -1710,8 +1715,15 @@ static int uncore_mmio_setup(struct intel_uncore *= uncore) > else > mmio_size =3D 2 * 1024 * 1024; > =20 > + ret =3D pci_request_selected_regions(pdev, bar_selection, "i915"); > + if (ret < 0) { > + drm_err(&i915->drm, "failed to request pci bars\n"); > + return ret; > + } > + > uncore->regs =3D pci_iomap(pdev, mmio_bar, mmio_size); > if (uncore->regs =3D=3D NULL) { > + pci_release_selected_regions(pdev, bar_selection); > drm_err(&i915->drm, "failed to map registers\n"); > return -EIO; > } > @@ -1721,9 +1733,18 @@ static int uncore_mmio_setup(struct intel_uncore *= uncore) > =20 > static void uncore_mmio_cleanup(struct intel_uncore *uncore) > { > - struct pci_dev *pdev =3D uncore->i915->drm.pdev; > + struct drm_i915_private *i915 =3D uncore->i915; > + struct pci_dev *pdev =3D i915->drm.pdev; > + int mmio_bar; > + int bar_selection; > + > + mmio_bar =3D IS_GEN(i915, 2) ? 1 : 0; > + bar_selection =3D BIT (2) | BIT(mmio_bar); > + if (INTEL_GEN(i915) =3D=3D 3) > + bar_selection |=3D BIT(3); > =20 > pci_iounmap(pdev, uncore->regs); > + pci_release_selected_regions(pdev, bar_selection); > } > =20 > void intel_uncore_init_early(struct intel_uncore *uncore, > --=20 > 2.28.0 >=20 > _______________________________________________ > dri-devel mailing list > dri-devel@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel --=20 Ville Syrj=EF=BF=BDl=EF=BF=BD Intel