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Thu, 24 Mar 2022 13:03:20 +0000 (GMT) Received: from p-imbrenda (unknown [9.145.9.72]) by d06av23.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 24 Mar 2022 13:03:20 +0000 (GMT) Date: Thu, 24 Mar 2022 14:03:17 +0100 From: Claudio Imbrenda To: Nico Boehr Cc: kvm@vger.kernel.org, linux-s390@vger.kernel.org, frankja@linux.ibm.com, thuth@redhat.com, david@redhat.com, farman@linux.ibm.com Subject: Re: [kvm-unit-tests PATCH v2 4/9] s390x: smp: add test for SIGP_STORE_ADTL_STATUS order Message-ID: <20220324140317.49a86cdd@p-imbrenda> In-Reply-To: <7a624f37d23d8095e56a6ecc6b872b8b933b58bb.camel@linux.ibm.com> References: <20220323170325.220848-1-nrb@linux.ibm.com> <20220323170325.220848-5-nrb@linux.ibm.com> <20220323184512.192f878b@p-imbrenda> <7a624f37d23d8095e56a6ecc6b872b8b933b58bb.camel@linux.ibm.com> Organization: IBM X-Mailer: Claws Mail 3.18.0 (GTK+ 2.24.33; x86_64-redhat-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 X-Proofpoint-GUID: wBVrOe85zcRXMt88h4wfOIHtV-6MqBra X-Proofpoint-ORIG-GUID: wjEPIudvwesDUMXa0dcdc5rFSY_axg2v X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.850,Hydra:6.0.425,FMLib:17.11.64.514 definitions=2022-03-24_04,2022-03-24_01,2022-02-23_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 suspectscore=0 mlxscore=0 mlxlogscore=999 lowpriorityscore=0 malwarescore=0 bulkscore=0 impostorscore=0 adultscore=0 clxscore=1015 phishscore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2202240000 definitions=main-2203240075 Precedence: bulk List-ID: X-Mailing-List: linux-s390@vger.kernel.org On Thu, 24 Mar 2022 08:39:29 +0100 Nico Boehr wrote: > On Wed, 2022-03-23 at 18:45 +0100, Claudio Imbrenda wrote: > > On Wed, 23 Mar 2022 18:03:20 +0100 > > Nico Boehr wrote: > > =20 > [...] > > > + > > > +static int memisset(void *s, int c, size_t n) =20 > >=20 > > function should return bool.. =20 >=20 > Sure, changed. >=20 > [...] > > > +static void test_store_adtl_status(void) > > > +{ > > > =20 > [...] > > > + > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0report_prefix_push("unalig= ned"); > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0smp_cpu_stop(1); > > > + > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0cc =3D smp_sigp(1, SIGP_ST= ORE_ADDITIONAL_STATUS, > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 (unsigned long)&adtl_status + 256, &status); > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0report(cc =3D=3D 1, "CC = =3D 1"); > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0report(status =3D=3D SIGP_= STATUS_INVALID_PARAMETER, "status =3D > > > INVALID_PARAMETER"); =20 > >=20 > > and check again that nothing has been written to =20 >=20 > Oh, thanks. Fixed. >=20 > [...] > > > +static void test_store_adtl_status_unavail(void) > > > +{ > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0uint32_t status =3D 0; > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0int cc; > > > + > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0report_prefix_push("store = additional status unvailable"); > > > + > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0if (have_adtl_status()) { > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0report_skip("guarded-storage or vector facility > > > installed"); > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0goto out; > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0} > > > + > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0report_prefix_push("not ac= cepted"); > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0smp_cpu_stop(1); > > > + > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0cc =3D smp_sigp(1, SIGP_ST= ORE_ADDITIONAL_STATUS, > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 (unsigned long)&adtl_status, &status); > > > + > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0report(cc =3D=3D 1, "CC = =3D 1"); > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0report(status =3D=3D SIGP_= STATUS_INVALID_ORDER, > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0 "status =3D INVALID_ORDER"); > > > + =20 > >=20 > > I would still check that nothing is written even when the order is > > rejected =20 >=20 > Won't hurt, added. >=20 > [...] > > > +static void restart_write_vector(void) > > > +{ > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0uint8_t *vec_reg; > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0/* > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 * vlm handles at most 16 = registers at a time > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 */ =20 > >=20 > > this comment can /* go on a single line */ =20 >=20 > OK >=20 > [...] > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0/* > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0 * i+1 to avoid zero content > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0 */ =20 > >=20 > > same /* here */ =20 >=20 > OK, changed. >=20 > [...] > > > +static void __store_adtl_status_vector_lc(unsigned long lc) > > > +{ > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0uint32_t status =3D -1; > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0struct psw psw; > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0int cc; > > > + > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0report_prefix_pushf("LC %l= u", lc); > > > + > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0if (!test_facility(133) &&= lc) { > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0report_skip("not supported, no guarded-storage > > > facility"); > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0goto out; > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0} =20 > >=20 > > I think this ^ should not be there at all =20 >=20 > It must be. If we don't have guarded-storage only LC 0 is allowed: >=20 > "When the guarded-storage facility is not installed, the > length and alignment of the MCESA is 1024 bytes. > When the guarded-storage facility is installed, the > length characteristic (LC) in bits 60-63 of the > MCESAD specifies the length and alignment of the > MCESA as a power of two" hmm, it seems like that without guarded storage LC is ignored, and the size is hardcoded to 1024. this is getting a little out of hand now I think you should make this into a separate test >=20 > See below for the reason why we don't have gs here. >=20 > [...] > > > diff --git a/s390x/unittests.cfg b/s390x/unittests.cfg > > > index 1600e714c8b9..843fd323bce9 100644 > > > --- a/s390x/unittests.cfg > > > +++ b/s390x/unittests.cfg > > > @@ -74,9 +74,29 @@ extra_params=3D-device diag288,id=3Dwatchdog0 -- > > > watchdog-action inject-nmi > > > =C2=A0file =3D stsi.elf > > > =C2=A0extra_params=3D-name kvm-unit-test --uuid 0fb84a86-727c-11ea-bc= 55- > > > 0242ac130003 -smp 1,maxcpus=3D8 > > > =C2=A0 > > > -[smp] > > > +[smp-kvm] > > > =C2=A0file =3D smp.elf > > > =C2=A0smp =3D 2 > > > +accel =3D kvm > > > +extra_params =3D -cpu host,gs=3Don,vx=3Don > > > + > > > +[smp-no-vec-no-gs-kvm] > > > +file =3D smp.elf > > > +smp =3D 2 > > > +accel =3D kvm > > > +extra_params =3D -cpu host,gs=3Doff,vx=3Doff > > > + > > > +[smp-tcg] > > > +file =3D smp.elf > > > +smp =3D 2 > > > +accel =3D tcg > > > +extra_params =3D -cpu qemu,vx=3Don =20 > >=20 > > why not gs=3Don as well? =20 >=20 > I am not an expert in QEMU CPU model, but it seems to me TCG doesn't > support it. it seems indeed so. maybe add a comment to explain >=20