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Mon, 11 Apr 2022 14:05:49 +0000 (GMT) Received: from p-imbrenda (unknown [9.145.1.140]) by b06wcsmtp001.portsmouth.uk.ibm.com (Postfix) with ESMTP; Mon, 11 Apr 2022 14:05:49 +0000 (GMT) Date: Mon, 11 Apr 2022 16:05:46 +0200 From: Claudio Imbrenda To: Nico Boehr Cc: kvm@vger.kernel.org, linux-s390@vger.kernel.org, frankja@linux.ibm.com, thuth@redhat.com, david@redhat.com, farman@linux.ibm.com Subject: Re: [kvm-unit-tests PATCH 2/2] s390x: add test for SIGP STORE_ADTL_STATUS order Message-ID: <20220411160546.746204c2@p-imbrenda> In-Reply-To: <243cc4903700b39072a20636f2433d43320fe4c2.camel@linux.ibm.com> References: <20220401123321.1714489-1-nrb@linux.ibm.com> <20220401123321.1714489-3-nrb@linux.ibm.com> <20220406153107.0b071dcc@p-imbrenda> <243cc4903700b39072a20636f2433d43320fe4c2.camel@linux.ibm.com> Organization: IBM X-Mailer: Claws Mail 3.18.0 (GTK+ 2.24.33; x86_64-redhat-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 X-Proofpoint-GUID: ILZgtFjTWqopU4nnpyuEBBOkHfRHL6Tk X-Proofpoint-ORIG-GUID: Cl9JY7oHSIf-cyXNiiSCFNtGrGIhF0rA X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.858,Hydra:6.0.425,FMLib:17.11.64.514 definitions=2022-04-11_04,2022-04-11_01,2022-02-23_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 adultscore=0 spamscore=0 clxscore=1015 impostorscore=0 mlxscore=0 lowpriorityscore=0 priorityscore=1501 malwarescore=0 suspectscore=0 mlxlogscore=999 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2202240000 definitions=main-2204110078 Precedence: bulk List-ID: X-Mailing-List: linux-s390@vger.kernel.org On Mon, 11 Apr 2022 15:23:17 +0200 Nico Boehr wrote: > On Wed, 2022-04-06 at 15:31 +0200, Claudio Imbrenda wrote: > > > diff --git a/s390x/adtl-status.c b/s390x/adtl-status.c > > > new file mode 100644 > > > index 000000000000..c3ecdbc35a9d > > > =20 > [...] > > > +static void restart_write_vector(void) > > > +{ > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0uint8_t *vec_reg; > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0/* vlm handles at most 16 = registers at a time */ > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0uint8_t *vec_reg_16_31 =3D= &expected_vec_contents[16][0]; > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0uint64_t cr0, cr0_mask =3D= ~(1ULL << CTL0_VECTOR); =20 > >=20 > > cr0_mask can be const, and you can use ~BIT_ULL(CTL0_VECTOR) =20 >=20 > I don't think so, since ng in the inline ASM will store its result > there. oops, right >=20 > BIT_ULL is much better, thanks. I tend to forget about that. >=20 > > =20 > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0int one =3D 1; =20 > >=20 > > one can also be const, although I wonder if this can just become an > > constant in the asm statement =20 >=20 > Yes, right, thanks. Should work with mvhi. >=20