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Tue, 7 Jun 2022 14:41:15 +0000 (GMT) Received: from p-imbrenda (unknown [9.152.224.40]) by b06wcsmtp001.portsmouth.uk.ibm.com (Postfix) with ESMTP; Tue, 7 Jun 2022 14:41:15 +0000 (GMT) Date: Tue, 7 Jun 2022 16:41:13 +0200 From: Claudio Imbrenda To: Nico Boehr Cc: kvm@vger.kernel.org, linux-s390@vger.kernel.org, frankja@linux.ibm.com, scgl@linux.ibm.com, pmorel@linux.ibm.com, thuth@redhat.com Subject: Re: [kvm-unit-tests PATCH v1 2/2] lib: s390x: better smp interrupt checks Message-ID: <20220607164113.5d51f37d@p-imbrenda> In-Reply-To: <20220607162309.25e97913@li-ca45c2cc-336f-11b2-a85c-c6e71de567f1> References: <20220603154037.103733-1-imbrenda@linux.ibm.com> <20220603154037.103733-3-imbrenda@linux.ibm.com> <20220607162309.25e97913@li-ca45c2cc-336f-11b2-a85c-c6e71de567f1> Organization: IBM X-Mailer: Claws Mail 4.1.0 (GTK 3.24.34; x86_64-redhat-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 X-Proofpoint-GUID: XSk66zcLWIa2MZhCSw-7vS2OSr-HvBSR X-Proofpoint-ORIG-GUID: O7ce2QGtr_Rb8xtcNe3fy-d8k9liRY3y X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.874,Hydra:6.0.517,FMLib:17.11.64.514 definitions=2022-06-07_06,2022-06-07_02,2022-02-23_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 impostorscore=0 priorityscore=1501 phishscore=0 spamscore=0 mlxlogscore=813 malwarescore=0 bulkscore=0 suspectscore=0 lowpriorityscore=0 clxscore=1015 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2204290000 definitions=main-2206070058 Precedence: bulk List-ID: X-Mailing-List: linux-s390@vger.kernel.org On Tue, 7 Jun 2022 16:23:09 +0200 Nico Boehr wrote: > On Fri, 3 Jun 2022 17:40:37 +0200 > Claudio Imbrenda wrote: > > > 0x1200 */ diff --git a/lib/s390x/interrupt.c b/lib/s390x/interrupt.c > > index 27d3b767..e57946f0 100644 > [...] > > @@ -30,7 +27,7 @@ void expect_pgm_int(void) > > > > void expect_ext_int(void) > > { > > - ext_int_expected = true; > > + lc->ext_int_expected = 1; > > External Interrupts can be floating; so if I am not mistaken it could be delivered to a different CPU which didn't expect it. yes I have considered that (maybe I should add this in the patch description) for floating interrupts, the testcase should take care to mask the interrupt on the CPUs where it should not be received. by default all interrupts are masked anyway and CPUs should only enable them on a case by case basis > > [...] > > @@ -237,17 +231,17 @@ void handle_io_int(void) > > > > int register_io_int_func(void (*f)(void)) > > { > > - if (io_int_func) > > + if (lc->io_int_func) > > return -1; > > IO interrupts also are floating. Same concern as for the external interrupts. same here the alternative is to have a separate handling of floating vs non-floating interrupts, which maybe would get a little out of hand