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Thu, 30 Mar 2023 16:48:15 +0000 (GMT) Date: Thu, 30 Mar 2023 18:09:00 +0200 From: Claudio Imbrenda To: Janosch Frank Cc: kvm@vger.kernel.org, thuth@redhat.com, nrb@linux.ibm.com, linux-s390@vger.kernel.org Subject: Re: [kvm-unit-tests PATCH 1/5] lib: s390x: Add ap library Message-ID: <20230330180900.723c060d@p-imbrenda> In-Reply-To: <20230330114244.35559-2-frankja@linux.ibm.com> References: <20230330114244.35559-1-frankja@linux.ibm.com> <20230330114244.35559-2-frankja@linux.ibm.com> Organization: IBM X-Mailer: Claws Mail 4.1.1 (GTK 3.24.35; x86_64-redhat-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 X-Proofpoint-GUID: uOLzcUn-4fgAd8Vc1e6gl3kgEwaR1arO X-Proofpoint-ORIG-GUID: CUNYECk8dA6FgQoP1xVrEkgE_4yGZAV- X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-03-30_09,2023-03-30_03,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 suspectscore=0 malwarescore=0 spamscore=0 mlxscore=0 priorityscore=1501 clxscore=1015 impostorscore=0 lowpriorityscore=0 mlxlogscore=999 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303200000 definitions=main-2303300130 Precedence: bulk List-ID: X-Mailing-List: linux-s390@vger.kernel.org On Thu, 30 Mar 2023 11:42:40 +0000 Janosch Frank wrote: > Add functions and definitions needed to test the Adjunct > Processor (AP) crypto interface. > > Signed-off-by: Janosch Frank > [...] > +bool ap_check(void) > +{ > + struct ap_queue_status r1 = {}; > + struct pqap_r2 r2 = {}; > + > + /* Base AP support has no STFLE or SCLP feature bit */ this is true, but you are also indiscriminately using a feature for which there is a STFLE feature. since it seems you depend on that, you might as well just check bit for STFLE.12 and assume the base support is there if it's set > + expect_pgm_int(); > + ap_pqap_tapq(0, 0, &r1, &r2); > + > + if (clear_pgm_int() == PGM_INT_CODE_OPERATION) > + return false; > + > + return true; > +} [...] > +struct ap_config_info { > + uint8_t apsc : 1; /* S bit */ > + uint8_t apxa : 1; /* N bit */ > + uint8_t qact : 1; /* C bit */ > + uint8_t rc8a : 1; /* R bit */ > + uint8_t l : 1; /* L bit */ > + uint8_t lext : 3; /* Lext bits */ > + uint8_t reserved2[3]; > + uint8_t Na; /* max # of APs - 1 */ > + uint8_t Nd; /* max # of Domains - 1 */ > + uint8_t reserved6[10]; > + uint32_t apm[8]; /* AP ID mask */ is there a specific reason why these are uint32_t? uint64_t would maybe make your life easier in subsequent patches (see my comments there) > + uint32_t aqm[8]; /* AP (usage) queue mask */ > + uint32_t adm[8]; /* AP (control) domain mask */ > + uint8_t _reserved4[16]; > +} __attribute__((aligned(8))) __attribute__ ((__packed__)); > +_Static_assert(sizeof(struct ap_config_info) == 128, "PQAP QCI size"); > + > +struct pqap_r0 { > + uint32_t pad0; > + uint8_t fc; > + uint8_t t : 1; /* Test facilities (TAPQ)*/ > + uint8_t pad1 : 7; > + uint8_t ap; > + uint8_t qn; > +} __attribute__((packed)) __attribute__((aligned(8))); > + > +struct pqap_r2 { > + uint8_t s : 1; /* Special Command facility */ > + uint8_t m : 1; /* AP4KM */ > + uint8_t c : 1; /* AP4KC */ > + uint8_t cop : 1; /* AP is in coprocessor mode */ > + uint8_t acc : 1; /* AP is in accelerator mode */ > + uint8_t xcp : 1; /* AP is in XCP-mode */ > + uint8_t n : 1; /* AP extended addressing facility */ > + uint8_t pad_0 : 1; > + uint8_t pad_1[3]; > + uint8_t at; > + uint8_t nd; > + uint8_t pad_6; > + uint8_t pad_7 : 4; > + uint8_t qd : 4; > +} __attribute__((packed)) __attribute__((aligned(8))); > +_Static_assert(sizeof(struct pqap_r2) == sizeof(uint64_t), "pqap_r2 size"); > + > +bool ap_check(void); > +int ap_pqap_tapq(uint8_t ap, uint8_t qn, struct ap_queue_status *apqsw, > + struct pqap_r2 *r2); > +int ap_pqap_qci(struct ap_config_info *info); > +#endif