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[142.68.80.239]) by smtp.gmail.com with ESMTPSA id x1-20020a0c8e81000000b0069b40c06b11sm4430054qvb.105.2024.04.22.10.43.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Apr 2024 10:43:05 -0700 (PDT) Received: from jgg by wakko with local (Exim 4.95) (envelope-from ) id 1ryxh3-000ykz-20; Mon, 22 Apr 2024 14:43:05 -0300 Date: Mon, 22 Apr 2024 14:43:05 -0300 From: Jason Gunthorpe To: Gerd Bayer Cc: Alex Williamson , Niklas Schnelle , kvm@vger.kernel.org, linux-s390@vger.kernel.org, Ankit Agrawal , Yishai Hadas , Halil Pasic , Julian Ruess , Ben Segal Subject: Re: [PATCH v2] vfio/pci: Support 8-byte PCI loads and stores Message-ID: <20240422174305.GB231144@ziepe.ca> References: <20240422153508.2355844-1-gbayer@linux.ibm.com> Precedence: bulk X-Mailing-List: linux-s390@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240422153508.2355844-1-gbayer@linux.ibm.com> On Mon, Apr 22, 2024 at 05:35:08PM +0200, Gerd Bayer wrote: > From: Ben Segal > > Many PCI adapters can benefit or even require full 64bit read > and write access to their registers. In order to enable work on > user-space drivers for these devices add two new variations > vfio_pci_core_io{read|write}64 of the existing access methods > when the architecture supports 64-bit ioreads and iowrites. > > Since these access methods are instantiated on 64bit architectures, > only, their use in vfio_pci_core_do_io_rw() is restricted by conditional > compiles to these architectures. > > Signed-off-by: Ben Segal > Co-developed-by: Gerd Bayer > Signed-off-by: Gerd Bayer > --- > Hi all, > > we've successfully used this patch with a user-mode driver for a PCI > device that requires 64bit register read/writes on s390. A quick grep > showed that there are several other drivers for PCI devices in the kernel > that use readq/writeq and eventually could use this, too. > So we decided to propose this for general inclusion. > > Thank you, > Gerd Bayer > > Changes v1 -> v2: > - On non 64bit architecture use at most 32bit accesses in > vfio_pci_core_do_io_rw and describe that in the commit message. > - Drop the run-time error on 32bit architectures. > - The #endif splitting the "else if" is not really fortunate, but I'm > open to suggestions. Provide a iowrite64() that does back to back writes for 32 bit? Jason