[PATCH v2 0/4] Optimize code generation during context switching

Xie Yuanbin
2025-11-08T17:24:37Z

The purpose of this series of patches is to optimize the performance of
context switching. It does not change the code logic, but only modifies
the inline attributes of some functions.

It is found that `finish_task_switch` is not inlined even in the O2 level
optimization. This may affect performance for the following reasons:
1. It is in the context switching code, which is a hot code path.
2. Because of the modern CPU mitigations for vulnerabilities, inside
switch_mm, the instruction pipeline and cache may be cleared.
finish_task_switch is right after that, so the performance is greatly
affected by function calls and branch jumps.
3. The __schedule function has __sched attribute, which makes it be
placed in the ".sched.text" section, while finish_task_switch does not,
which causes their distance to be very far in binary, aggravating the
above performance degradation.

This series of patches mainly does the following things:
1. Make enter_lazy_tlb inline on x86.
2. Make raw_spin_rq_unlock inline.
3. Let the finish_task_switch function be called inline during context
switching.
4. Set the subfunctions called by finish_task_switch to be inline:
After finish_task_switch is changed to an inline function, the number of
calls to the subfunctions (called by finish_task_switch) increases in
this translation unit due to the inline expansion of finish_task_switch.
For example, the finish_lock_switch function originally had only one
calling point in core.o (in finish_task_switch func), but because the
finish_task_switch was inlined, the calling points become two.
Due to compiler optimization strategies, these functions may transition
from inline functions to non inline functions, which can actually lead to
performance degradation.
Make the subfunctions of finish_task_stwitch inline to prevent
degradation.

Performance test data for these patches:
Time spent on calling finish_task_switch (unit: rdtsc):
| compiler && appended cmdline | without patches | with patches |
| gcc + NA | 13.93 - 13.94 | 12.39 - 12.44 |
| gcc + "spectre_v2_user=on" | 24.69 - 24.85 | 13.68 - 13.73 |
| clang + NA | 13.89 - 13.90 | 12.70 - 12.73 |
| clang + "spectre_v2_user=on" | 29.00 - 29.02 | 18.88 - 18.97 |

Note: I use x86 for testing here. Different architectures have different
cmdlines for configuring mitigations. For example, on arm64, spectre v2
mitigation is enabled by default, and it should be disabled by adding
"nospectre_v2" to the cmdline.

Test info:
1. kernel source:
linux-next
commit 9c0826a5d9aa4d52206d ("Add linux-next specific files for 20251107")
2. test machine:
cpu: intel i5-8300h@4Ghz
mem: DDR4 2666MHz
Bare-metal boot, non-virtualized environment
3. compiler:
gcc: gcc version 15.2.0 (Debian 15.2.0-7) with
GNU ld (GNU Binutils for Debian) 2.45
clang: Debian clang version 21.1.4 (8) with
Debian LLD 21.1.4 (compatible with GNU linkers)
4. config:
base on default x86_64_defconfig, and setting:
CONFIG_HZ=100
CONFIG_DEBUG_ENTRY=n
CONFIG_X86_DEBUG_FPU=n
CONFIG_EXPERT=y
CONFIG_MODIFY_LDT_SYSCALL=n
CONFIG_CGROUPS=n
CONFIG_BLK_DEV_NVME=y
5. test method:
Use rdtsc (cntvct_el0 can be use on arm64/arm) to obtain timestamps
before and after finish_task_switch calling point, and created multiple
processes to trigger context switches, then calculated the average
duration of the finish_task_switch call.
Note that using multiple processes rather than threads is recommended for
testing, because this will trigger switch_mm (where spectre v2 mitigations
may be performed) during context switching.
The test code is attached at the end of the email.

I also tested the impact on bzImage size, which may affect
embedded devices:
1. kernel source && compiler: same as above
2. config:
base on default x86_64_defconfig, and setting:
CONFIG_SCHED_CORE=y
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_NO_HZ_FULL=y

bzImage size:
| compiler | without patches | with patches |
| clang | 13722624 | 13722624 |
| gcc | 12596224 | 12596224 |

No size changes were found on bzImage.

testing code:
kernel(just for testing, not a commit):
```c
diff --git a/arch/x86/entry/syscalls/syscall_64.tbl b/arch/x86/entry/syscalls/syscall_64.tbl
index 8a4ac4841be6..5a42ec008620 100644
--- a/arch/x86/entry/syscalls/syscall_64.tbl
+++ b/arch/x86/entry/syscalls/syscall_64.tbl
@@ -395,6 +395,7 @@
468 common file_getattr sys_file_getattr
469 common file_setattr sys_file_setattr
470 common listns sys_listns
+471 common sched_test sys_sched_test

#
# Due to a historical design error, certain syscalls are numbered differently
diff --git a/kernel/sched/core.c b/kernel/sched/core.c
index 81cf8452449a..d7e2095aeb7d 100644
--- a/kernel/sched/core.c
+++ b/kernel/sched/core.c
@@ -5195,6 +5195,36 @@ asmlinkage __visible void schedule_tail(struct task_struct *prev)
calculate_sigpending();
}

+static DEFINE_PER_CPU(uint64_t, start_time);
+static DEFINE_PER_CPU(uint64_t, total_time);
+static DEFINE_PER_CPU(uint64_t, total_count);
+
+static __always_inline uint64_t test_rdtsc(void)
+{
+ register uint64_t rax __asm__("rax");
+ register uint64_t rdx __asm__("rdx");
+
+ __asm__ __volatile__ ("rdtsc" : "=a"(rax), "=d"(rdx));
+ return rax | (rdx << 32);
+}
+
+static __always_inline void test_start(void)
+{
+ raw_cpu_write(start_time, test_rdtsc());
+}
+
+static __always_inline void test_end(void)
+{
+ const uint64_t end_time = test_rdtsc();
+ const uint64_t cost_time = end_time - raw_cpu_read(start_time);
+
+ raw_cpu_add(total_time, cost_time);
+ if (unlikely(raw_cpu_inc_return(total_count) % (1 << 20) == 0)) {
+ pr_emerg("cpu %d total_time %llu\n", raw_smp_processor_id(), raw_cpu_read(total_time));
+ raw_cpu_write(total_time, 0);
+ }
+}
+
/*
* context_switch - switch to the new MM and the new thread's register state.
*/
@@ -5264,7 +5294,10 @@ context_switch(struct rq *rq, struct task_struct *prev,
switch_to(prev, next, prev);
barrier();

- return finish_task_switch(prev);
+ test_start();
+ rq = finish_task_switch(prev);
+ test_end();
+ return rq;
}

/*
@@ -10861,3 +10894,18 @@ void sched_change_end(struct sched_change_ctx *ctx)
p->sched_class->prio_changed(rq, p, ctx->prio);
}
}
+
+static struct task_struct *wait_task;
+
+SYSCALL_DEFINE0(sched_test)
+{
+ preempt_disable();
+ while (1) {
+ if (likely(wait_task))
+ wake_up_process(wait_task);
+ wait_task = current;
+ set_current_state(TASK_UNINTERRUPTIBLE);
+ __schedule(SM_NONE);
+ }
+ return 0;
+}
```

User program:
```c
int main()
{
cpu_set_t mask;
if (fork())
sleep(1);

CPU_ZERO(&mask);
CPU_SET(5, &mask); // Assume that cpu5 exists
assert(sched_setaffinity(0, sizeof(mask), &mask) == 0);
syscall(471);
// unreachable
return 0;
}
```

Usage:
1. set core5 as isolated cpu: add "isolcpus=5" to cmdline
2. run user programe
3. wait for kernel print

v1->v2: https://lore.kernel.org/20251024182628.68921-1-qq570070308@gmail.com
- Make raw_spin_rq_unlock inline
- Make __balance_callbacks inline
- Add comments for always inline functions
- Add Performance Test Data

Xie Yuanbin (4):
Make enter_lazy_tlb inline on x86
Make raw_spin_rq_unlock inline
Provide the always inline version of some functions
Make finish_task_switch and its subfuncs inline in context switching

arch/arm/include/asm/mmu_context.h | 12 +++++-
arch/riscv/include/asm/sync_core.h | 2 +-
arch/s390/include/asm/mmu_context.h | 12 +++++-
arch/sparc/include/asm/mmu_context_64.h | 12 +++++-
arch/x86/include/asm/mmu_context.h | 21 +++++++++-
arch/x86/include/asm/sync_core.h | 2 +-
arch/x86/mm/tlb.c | 21 ----------
include/linux/perf_event.h | 2 +-
include/linux/sched/mm.h | 10 ++---
include/linux/tick.h | 4 +-
include/linux/vtime.h | 8 ++--
kernel/sched/core.c | 55 ++++++++++++++++++-------
kernel/sched/sched.h | 24 ++++++-----
13 files changed, 121 insertions(+), 64 deletions(-)

--
2.51.0