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Mon, 10 Nov 2025 13:25:23 GMT Received: from smtpav01.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id E016920040; Mon, 10 Nov 2025 13:25:22 +0000 (GMT) Received: from smtpav01.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id BA9DC2004E; Mon, 10 Nov 2025 13:25:22 +0000 (GMT) Received: from tuxmaker.boeblingen.de.ibm.com (unknown [9.152.85.9]) by smtpav01.fra02v.mail.ibm.com (Postfix) with ESMTP; Mon, 10 Nov 2025 13:25:22 +0000 (GMT) From: Gerd Bayer Date: Mon, 10 Nov 2025 14:25:05 +0100 Subject: [PATCH 1/2] PCI: AtomicOps: Define valid root port capabilities Precedence: bulk X-Mailing-List: linux-s390@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20251110-fix_pciatops-v1-1-edc58a57b62e@linux.ibm.com> References: <20251110-fix_pciatops-v1-0-edc58a57b62e@linux.ibm.com> In-Reply-To: <20251110-fix_pciatops-v1-0-edc58a57b62e@linux.ibm.com> To: Bjorn Helgaas , Jay Cornwall , Felix Kuehling Cc: Niklas Schnelle , Alexander Schmidt , linux-s390@vger.kernel.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Gerd Bayer , Leon Romanovsky X-Mailer: b4 0.14.2 X-TM-AS-GCONF: 00 X-Authority-Analysis: v=2.4 cv=MtZfKmae c=1 sm=1 tr=0 ts=6911e7c8 cx=c_pps a=AfN7/Ok6k8XGzOShvHwTGQ==:117 a=AfN7/Ok6k8XGzOShvHwTGQ==:17 a=IkcTkHD0fZMA:10 a=6UeiqGixMTsA:10 a=VkNPw1HP01LnGYTKEx00:22 a=VwQbUJbxAAAA:8 a=VnNF1IyMAAAA:8 a=8GgRulezAQhDBDp5LV8A:9 a=QEXdDO2ut3YA:10 a=cPQSjfK2_nFv0Q5t_7PE:22 X-Proofpoint-GUID: UNJVx7QPg1d4KuVyWWtCLmBM82ySq0p- X-Proofpoint-ORIG-GUID: wPOG6K1kOOqsIZdLhuiJaHG0Q-ZmrVVh X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMTA4MDA3OSBTYWx0ZWRfX3d3R/WWF0XMt 07JS1WFKfDZdUh7ELJ3mv2WQx5FcFWfCBZFj//vu1EhZ+SdMljrRgAAg6Wh+jLuGFSneasF+Gl3 BScSQcqbizs4s8shjs6ogDhEaG+312dDdxZzL9D4PAZ4HT2PC9hD6r2EazuHM2mNvtt8ySwW4CX k79xQPNefEdIbNm6P1gD5oXlG+aFpc1WFici3faRImNFI8dJYgQiRQFf6iQJHK2JNq1QXvOUIV/ 2mZh3mVZwKrCC6fjvF5xKUYUsQW58w+siHqCWr044h9XYMWVdDoorIp38G/w/a2gbVyhCEv7237 R/QKxa2yIaOCjOHXVRVENdCFdXofLmsjNF59vGXfX6rQqXw1SP5740NiMxiDNLkhBXyU1ns8Ohi m48h/aRPRfUFKLZ5/snq59+nuaxLOA== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-11-10_05,2025-11-10_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 adultscore=0 priorityscore=1501 bulkscore=0 impostorscore=0 suspectscore=0 lowpriorityscore=0 clxscore=1015 phishscore=0 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2510240000 definitions=main-2511080079 Provide the two combinations of Atomic Op Completion size attributes that a root port may support per PCIe Spec 7.0 section 6.15.3.1. - besides the trivial "No support" - as two new defines. Change documentation of pci_enable_atomic_ops_to_root() that these are the only ones that should be used. Also, spell out that all requested capabilities need to be supported at the root port for enable to succeed. Also emphasize that on success, this sets AtomicOpsCtl:ReqEn to 1, and leaves it untouched in case of failure. Suggested-by: Leon Romanovsky Signed-off-by: Gerd Bayer --- drivers/pci/pci.c | 13 +++++++------ include/uapi/linux/pci_regs.h | 8 ++++++++ 2 files changed, 15 insertions(+), 6 deletions(-) diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index b14dd064006cca80ec5275e45a35d6dc2b4d0bbc..597bf419c3a6867f8df7ebdc14fc8ca47d0958a6 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -3809,15 +3809,16 @@ int pci_rebar_set_size(struct pci_dev *pdev, int bar, int size) /** * pci_enable_atomic_ops_to_root - enable AtomicOp requests to root port * @dev: the PCI device - * @cap_mask: mask of desired AtomicOp sizes, including one or more of: - * PCI_EXP_DEVCAP2_ATOMIC_COMP32 - * PCI_EXP_DEVCAP2_ATOMIC_COMP64 - * PCI_EXP_DEVCAP2_ATOMIC_COMP128 + * @cap_mask: root port must support combinations of AtomicOp sizes + * PCI_EXP_ROOT_PORT_ATOMIC_BASE + * PCI_EXP_ROOT_PORT_ATOMIC_FULL * * Return 0 if all upstream bridges support AtomicOp routing, egress * blocking is disabled on all upstream ports, and the root port supports - * the requested completion capabilities (32-bit, 64-bit and/or 128-bit - * AtomicOp completion), or negative otherwise. + * all the requested completion capabilities (BASE: 32-bit, 64-bit or + * FULL: 32/64- and 128-bit AtomicOp completion). In that case enable the + * device to send AtomicOp requests. Otherwise, return negative and leave + * the enablement in the PCI config space untouched. */ int pci_enable_atomic_ops_to_root(struct pci_dev *dev, u32 cap_mask) { diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h index 07e06aafec502af7c12379f7207e2e3321dc2ff1..0435306b4d26dc4caf27ae0391a5e6b930538213 100644 --- a/include/uapi/linux/pci_regs.h +++ b/include/uapi/linux/pci_regs.h @@ -663,6 +663,14 @@ #define PCI_EXP_DEVCAP2_ATOMIC_COMP32 0x00000080 /* 32b AtomicOp completion */ #define PCI_EXP_DEVCAP2_ATOMIC_COMP64 0x00000100 /* 64b AtomicOp completion */ #define PCI_EXP_DEVCAP2_ATOMIC_COMP128 0x00000200 /* 128b AtomicOp completion */ +/* PCIe spec 7.0 6.15.3.1: Root ports may support one of 2 sets of Atomic Ops */ +#define PCI_EXP_ROOT_PORT_ATOMIC_BASE \ + (PCI_EXP_DEVCAP2_ATOMIC_COMP32 | \ + PCI_EXP_DEVCAP2_ATOMIC_COMP64) +#define PCI_EXP_ROOT_PORT_ATOMIC_FULL \ + (PCI_EXP_DEVCAP2_ATOMIC_COMP32 | \ + PCI_EXP_DEVCAP2_ATOMIC_COMP64 | \ + PCI_EXP_DEVCAP2_ATOMIC_COMP128) #define PCI_EXP_DEVCAP2_LTR 0x00000800 /* Latency tolerance reporting */ #define PCI_EXP_DEVCAP2_TPH_COMP_MASK 0x00003000 /* TPH completer support */ #define PCI_EXP_DEVCAP2_OBFF_MASK 0x000c0000 /* OBFF support mechanism */ -- 2.48.1