From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4CF5A33858B for ; Fri, 8 May 2026 04:21:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778214096; cv=none; b=OGK4JwLhX80xrf2/DEHSuOA0Ihn0YRrRC9mi4CKhGu/MkBPsWO1MnOBziGwjIqkuXRCbm6w3IlcSakbKDhJW42DwTsBdgQLq3d2qGPDhAKyOo2h7LmR7oSKM0qxuixIpBlrqo5o0eUITTWphaTCVWnU9/VcWMzwg7vs7CQje3go= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778214096; c=relaxed/simple; bh=wDMVfUrzPOq3wjVripDr7k5x+efPDSt8Ygrh6gZKILc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Rtap8DdrgOh+rKQeB4/Vy+Xn/jqJ5rFf0jLijXL0Dfs7o2Cp755L5DyHBdKuS9iYSCsP/kI3qUQuxfN57Q+zMBNJXG0xgR7DhJeswoER7zFzx1QGTMIV71UUqZST8F1po5lKAhz//fDiDhfEdyESYwYrfbi3glEBpLQSF8Yijw0= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=mdCosXeE; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="mdCosXeE" Received: by smtp.kernel.org (Postfix) with ESMTPSA id D9693C4AF09; Fri, 8 May 2026 04:21:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778214096; bh=wDMVfUrzPOq3wjVripDr7k5x+efPDSt8Ygrh6gZKILc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=mdCosXeEI1X/yKpxvQPgPh0baQyYgOe3NzTdNFHKMWfxmhRDZkQnHg1ekyigaQ9Z4 hU7/m7T2RKIi3XFd/0/k5HfbEn6yYHX0O5wOi1jZbmIc5Zo0z+DA9nbG9vNzLbysMj khnUE2+zbTIxtiguwO+ayqPBiYEwZr++5XgPU0hdnk1krSi1ySpYAr/xXOtmFN6z8l sQ9Wfeoaue4whE+UOg86ThABZZqL70Oh6ur43VLBGLeDccSf8bI0PlQn+Ovj0Zl0NR Gfijec1PETnm09DR5kShWf7GbKfIcSYXbJAO2AeOWdbb1L1x3wAIQj6ZQUJFAc8t0+ 2ULCZfjKGsC4g== Received: from phl-compute-06.internal (phl-compute-06.internal [10.202.2.46]) by mailfauth.phl.internal (Postfix) with ESMTP id 2A436F40078; Fri, 8 May 2026 00:21:34 -0400 (EDT) Received: from phl-frontend-03 ([10.202.2.162]) by phl-compute-06.internal (MEProxy); Fri, 08 May 2026 00:21:34 -0400 X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeefhedrtddtgddutdelfeejucetufdoteggodetrf dotffvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfurfetoffkrfgpnffqhgenuceu rghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmnecujf gurhephffvvefufffkofgjfhgggfestdekredtredttdenucfhrhhomhepuehoqhhunhcu hfgvnhhguceosghoqhhunheskhgvrhhnvghlrdhorhhgqeenucggtffrrghtthgvrhhnpe dtfedugfeivddvfeegjeehleehvdfhhefhffeuleehtdevgfeggefgheduuedtteenucev lhhushhtvghrufhiiigvpedunecurfgrrhgrmhepmhgrihhlfhhrohhmpegsohhquhhnod hmvghsmhhtphgruhhthhhpvghrshhonhgrlhhithihqdduieejtdelkeegjeduqddujeej keehheehvddqsghoqhhunheppehkvghrnhgvlhdrohhrghesfhhigihmvgdrnhgrmhgvpd hnsggprhgtphhtthhopeehiedpmhhouggvpehsmhhtphhouhhtpdhrtghpthhtohepphgv thgvrhiisehinhhfrhgruggvrggurdhorhhgpdhrtghpthhtoheptggrthgrlhhinhdrmh grrhhinhgrshesrghrmhdrtghomhdprhgtphhtthhopeifihhllheskhgvrhhnvghlrdho rhhgpdhrtghpthhtohepjhhonhgrshesshhouhhthhhpohhlvgdrshgvpdhrtghpthhtoh epshhtvghfrghnrdhkrhhishhtihgrnhhsshhonhesshgruhhnrghlrghhthhirdhfihdp rhgtphhtthhopehshhhorhhnvgesghhmrghilhdrtghomhdprhgtphhtthhopehhtggrse hlihhnuhigrdhisghmrdgtohhmpdhrtghpthhtohepghhorheslhhinhhugidrihgsmhdr tghomhdprhgtphhtthhopegrghhorhguvggvvheslhhinhhugidrihgsmhdrtghomh X-ME-Proxy: Feedback-ID: i8dbe485b:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Fri, 8 May 2026 00:21:33 -0400 (EDT) From: Boqun Feng To: Peter Zijlstra Cc: Catalin Marinas , Will Deacon , Jonas Bonn , Stefan Kristiansson , Stafford Horne , Heiko Carstens , Vasily Gorbik , Alexander Gordeev , Christian Borntraeger , Sven Schnelle , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Arnd Bergmann , Juri Lelli , Vincent Guittot , Dietmar Eggemann , Steven Rostedt , Ben Segall , Mel Gorman , Valentin Schneider , K Prateek Nayak , Boqun Feng , Waiman Long , Andrew Morton , Miguel Ojeda , Gary Guo , =?UTF-8?q?Bj=C3=B6rn=20Roy=20Baron?= , Benno Lossin , Andreas Hindborg , Alice Ryhl , Trevor Gross , Danilo Krummrich , Jinjie Ruan , Ada Couprie Diaz , Lyude Paul , Sohil Mehta , Pawan Gupta , "Xin Li (Intel)" , Sean Christopherson , Nikunj A Dadhania , Joel Fernandes , Andy Shevchenko , Randy Dunlap , Yury Norov , Sebastian Andrzej Siewior , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-openrisc@vger.kernel.org, linux-s390@vger.kernel.org, linux-arch@vger.kernel.org, rust-for-linux@vger.kernel.org Subject: [PATCH 11/11] arm64: sched/preempt: Enable PREEMPT_COUNT_64BIT Date: Thu, 7 May 2026 21:21:11 -0700 Message-ID: <20260508042111.24358-12-boqun@kernel.org> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260508042111.24358-1-boqun@kernel.org> References: <20260508042111.24358-1-boqun@kernel.org> Precedence: bulk X-Mailing-List: linux-s390@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit ARM64 already uses 64bit preempt count and the need reschedule bit is maintained in a separate 32bit than the preempt count. Therefore preempt count has enough bits to represent 16 level of NMI nesting, hence enable it for ARM64. This saves a per-CPU variable and additional instructions in the NMI path. Signed-off-by: Boqun Feng --- arch/arm64/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index fe60738e5943..1ed5173872fc 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -248,6 +248,7 @@ config ARM64 select PCI_SYSCALL if PCI select POWER_RESET select POWER_SUPPLY + select PREEMPT_COUNT_64BIT select SPARSE_IRQ select SWIOTLB select SYSCTL_EXCEPTION_TRACE -- 2.50.1 (Apple Git-155)