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Wed, 20 May 2026 13:50:47 +0000 (GMT) Received: from osiris (unknown [9.52.214.206]) by smtpav05.fra02v.mail.ibm.com (Postfix) with ESMTPS; Wed, 20 May 2026 13:50:47 +0000 (GMT) Date: Wed, 20 May 2026 15:50:45 +0200 From: Heiko Carstens To: David Laight Cc: Alexander Gordeev , Sven Schnelle , Vasily Gorbik , Christian Borntraeger , Juergen Christ , Peter Zijlstra , Yang Shi , Shrikanth Hegde , linux-kernel@vger.kernel.org, linux-s390@vger.kernel.org Subject: Re: [PATCH v3 1/9] s390/alternatives: Add new ALT_TYPE_PERCPU type Message-ID: <20260520135045.96889G76-hca@linux.ibm.com> References: <20260520092243.264847-1-hca@linux.ibm.com> <20260520092243.264847-2-hca@linux.ibm.com> <20260520134317.778dc094@pumpkin> Precedence: bulk X-Mailing-List: linux-s390@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260520134317.778dc094@pumpkin> X-TM-AS-GCONF: 00 X-Proofpoint-Reinject: loops=2 maxloops=12 X-Proofpoint-GUID: 95UgnGL4owA0HGVAWRkxIzL6YcAq5Fp0 X-Authority-Analysis: v=2.4 cv=GYMnWwXL c=1 sm=1 tr=0 ts=6a0dbc3d cx=c_pps a=GFwsV6G8L6GxiO2Y/PsHdQ==:117 a=GFwsV6G8L6GxiO2Y/PsHdQ==:17 a=kj9zAlcOel0A:10 a=NGcC8JguVDcA:10 a=VkNPw1HP01LnGYTKEx00:22 a=RnoormkPH1_aCDwRdu11:22 a=uAbxVGIbfxUO_5tXvNgY:22 a=VnNF1IyMAAAA:8 a=-J3efravqDvamtWKT7kA:9 a=CjuIK1q_8ugA:10 X-Proofpoint-ORIG-GUID: 4eKmeADhQ1Jn6yIRD49QC-YLYUukZD6m X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTIwMDEzMiBTYWx0ZWRfX1aFGCWfl0EdW hMvmUEsQOKBiLBKp4uGuAedh8CMQwyeM0TQE1nPOMLCGuJQX5sxz7LYeGFaRv+fp7fStbsUYZDo G1QSmndsnq1G1CMvalEjCAfOQznMr8LtUd3M9uX3LoOjrAQWORYlKePHiMFlEpWF9/2EwilnLfF ujZR2qJmoXYpnE/xRRHZk52JfctJpljYzFCU7G9MN0g9MCIB3JxWLcsuEusWuN0/d+2L83z9ola MqxrCdadRL+g2efcgjS7IYnrRf7hKHuCg5yKnznKAlv0U+wQVVdyudWwONNWnHbmea8ab96ejbZ 8GQrEbkMtCJ/TcgDa435/jE4+YNHegxCKDhMqyA/La+eR2ZgS2Xq/emD6/Ju3e82QKdwvHAPFtt ZOa7ykDt2LwfE+Ob14KOXePT58hZCmqMfZ1zi/Ik+wDJwIXcFe1phqxKJBbaVxAjEi1vQYfPRsN qxbL/oP1XD3LJC5as6A== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-20_02,2026-05-18_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 malwarescore=0 lowpriorityscore=0 priorityscore=1501 bulkscore=0 adultscore=0 suspectscore=0 spamscore=0 clxscore=1015 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605130000 definitions=main-2605200132 On Wed, May 20, 2026 at 01:43:17PM +0100, David Laight wrote: > On Wed, 20 May 2026 11:22:35 +0200 > Heiko Carstens wrote: > > > The upcoming percpu section code uses two mviy instructions to guard the > > beginning and end of a percpu code section. > > > > The first mviy instruction writes the register number, which contains the > > percpu address to lowcore. This indicates both the beginning of a percpu > > code section and which register contains the percpu address. > > > > During compile time the mviy instruction is generated in a way that its > > base register contains the percpu register, and the immediate field is > > zero. This needs to be patched so that the base register is zero, and the > > immediate field contains the register number. For example > > > > 101424: eb 00 23 c0 00 52 mviy 960(%r2),0 > > > > needs to be patched to > > > > 101424: eb 20 03 c0 00 52 mviy 960(%r0),2 > > I'm sure it is possible get the preprocessor to extract the register number > for you. > The exception table logic almost certainly already does it. > (The x86 version certainly does - and that is far less trivial.) That's true, the s390 extable logic is doing the same. However I failed to feed the extracted register number as constant into the same inline assembly it was extracted from.