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[82.69.66.36]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-45eeb36c40asm1504601f8f.13.2026.05.28.02.03.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 May 2026 02:03:47 -0700 (PDT) Date: Thu, 28 May 2026 10:03:46 +0100 From: David Laight To: Yang Shi Cc: Heiko Carstens , Alexander Gordeev , Sven Schnelle , Vasily Gorbik , Christian Borntraeger , Juergen Christ , "Christoph Lameter (Ampere)" , Peter Zijlstra , Shrikanth Hegde , linux-kernel@vger.kernel.org, linux-s390@vger.kernel.org Subject: Re: [PATCH v3 0/9] s390: Improve this_cpu operations Message-ID: <20260528100346.1e790a53@pumpkin> In-Reply-To: References: <20260520092243.264847-1-hca@linux.ibm.com> <9d503c6f-5641-4b28-998e-01e38b3622a9@os.amperecomputing.com> <20260520233409.0683f595@pumpkin> <20260521103742.9603C8c-hca@linux.ibm.com> <5158d4e8-19a7-4f60-b2fd-bc6bab22baf0@os.amperecomputing.com> <20260522091805.18098A5c-hca@linux.ibm.com> X-Mailer: Claws Mail 4.1.1 (GTK 3.24.38; arm-unknown-linux-gnueabihf) Precedence: bulk X-Mailing-List: linux-s390@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit On Wed, 27 May 2026 16:44:31 -0700 Yang Shi wrote: > On 5/22/26 2:18 AM, Heiko Carstens wrote: ... > > It is amazing to see the performance improvements you see on arm64, however > > I believe that is mainly because of the large amount of code which is > > generated by the arm64 implementations of the preempt primitives > > __preempt_count_add() and __preempt_count_dec_and_test(). > > Yes, we need 4 instructions on ARM64 for disabling/enabling preempt (one > instruction is used to load current pointer, the other 3 instructions > are used to RMW preempt_count). So I can remove 8 instructions in total > for a single this_cpu ops. That's a lot. Given this_cpu ops are heavily > used in kernel, we end up running fewer instructions and having better > icache hit rate, the better icache hit rate also helps reduce cross node > traffic for 2-socket system. Is 'current' kept in a cpu hardware register? With the process switch code updating current->per_cpu_data. That might mean that you can access per-cpu data without disabling preemption (for single ops) using the same technique as s390. So something like: mov %ra, current movb per_cpu_reg(%ra), $b mov %rb, per_cpu_data(%ra) // per-cpu access using %rb, process switch code will update %rb movb per_cpu_reg(%ra), $255 An add will need to use a cmpxchg loop. For simplicity use a fixed register for %rb. -- David