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[47.54.130.67]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-8cecd051d61sm58430626d6.29.2026.06.04.11.20.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 04 Jun 2026 11:20:32 -0700 (PDT) Received: from jgg by wakko with local (Exim 4.97) (envelope-from ) id 1wVCgB-00000008erz-2jW4; Thu, 04 Jun 2026 15:20:31 -0300 Date: Thu, 4 Jun 2026 15:20:31 -0300 From: Jason Gunthorpe To: Dimitri Daskalakis Cc: Bjorn Helgaas , linux-pci@vger.kernel.org, Madhavan Srinivasan , Michael Ellerman , Nicholas Piggin , Christophe Leroy , Mahesh J Salgaonkar , Oliver O'Halloran , Niklas Schnelle , Gerald Schaefer , Heiko Carstens , Vasily Gorbik , Alexander Gordeev , Christian Borntraeger , Sven Schnelle , Alex Williamson , Kevin Tian , Ankit Agrawal , Leon Romanovsky , Juergen Gross , Stefano Stabellini , Oleksandr Tyshchenko , Keith Busch , Alexander Duyck , Jakub Kicinski , Dimitri Daskalakis , linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, kvm@vger.kernel.org, xen-devel@lists.xenproject.org Subject: Re: [RFC 00/12] PCI: Add support for Scalable I/O Virtualization Message-ID: <20260604182031.GB2487554@ziepe.ca> References: <20260604150153.3619662-1-dimitri.daskalakis1@gmail.com> Precedence: bulk X-Mailing-List: linux-s390@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260604150153.3619662-1-dimitri.daskalakis1@gmail.com> On Thu, Jun 04, 2026 at 08:01:41AM -0700, Dimitri Daskalakis wrote: > With this patchset core enumarates the SIOV capability and can identify > SIOV PFs. But there is no central mechanism to allocate/manage SIOV VFs. > To support device pass through, devices will need to add a vfio-mdev > driver with IOMMUFD support (or something similar). There is an enormous amount of missing work to do something useful with the SIOVr2 stuff. IIRC there is even supposed to be BIOS components in this plan and there are some missing PCI SIG topics too IIRC. So, I'm not sure how much value there is in merging just the cap discovery without a roadmap for the missing parts.. Also, I'm quite surprised to see this out of the blue, there is an OCP workstream that was building out a standard that outlines how all the different components have to act to successfully implement it. What is in PCI SIG was just some minor foundational adjustments without any context on how to form them into a solution. I think it is extremely premature to merge anything related to SIOV to the kernel. Join the OCP work stream if you are interested. I think the general feeling was there is not sufficient interest in the industry to do this and it has gone quiet. Jason