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Wed, 26 Aug 2026 13:02:59 +0000 (GMT) Received: from osiris (unknown [9.87.128.239]) by smtpav07.fra02v.mail.ibm.com (Postfix) with ESMTPS; Wed, 26 Aug 2026 13:02:59 +0000 (GMT) Date: Wed, 26 Aug 2026 15:02:57 +0200 From: Heiko Carstens To: Alexander Gordeev Cc: Gerald Schaefer , Christian Borntraeger , Vasily Gorbik , Claudio Imbrenda , Andrey Ryabinin , linux-s390@vger.kernel.org, linux-mm@kvack.org, linux-kernel@vger.kernel.org, kasan-dev@googlegroups.com Subject: Re: [PATCH v7 2/4] s390/mm: Batch PTE updates in lazy MMU mode Message-ID: <20260826130257.21444B1a-hca@linux.ibm.com> References: <20260824104048.11040Cdc-hca@linux.ibm.com> <73a0a916-b39f-4ebe-bffe-448928b13bef-agordeev@linux.ibm.com> Precedence: bulk X-Mailing-List: linux-s390@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <73a0a916-b39f-4ebe-bffe-448928b13bef-agordeev@linux.ibm.com> X-TM-AS-GCONF: 00 X-Proofpoint-Reinject: loops=2 maxloops=12 X-Proofpoint-ORIG-GUID: mnaS2EKAjP2YugpbjqZ_JV0viUasngna X-Proofpoint-Spam-Info: AW1haW4tMjYwODI2MDEwOCBTYWx0ZWRfX7dNqLIMl3+vy HKPq5xcApPY6LG90f966XljN0vExanHXKnw3n2i7RjL4lXd3UKVm2CzgT6kefqPy3jnplyAtwYg PuOwyi1S6+Zj3LqYSZ/p4uCx3JYHzj0= X-Proofpoint-GUID: NOqIbWVbZeH7yRovwr2leQYIUW-EgfUw X-Authority-Analysis: v=2.4 cv=JZyMa0KV c=1 sm=1 tr=0 ts=6a8ee408 cx=c_pps a=bLidbwmWQ0KltjZqbj+ezA==:117 a=bLidbwmWQ0KltjZqbj+ezA==:17 a=kj9zAlcOel0A:10 a=Sv0fKeRqtYgA:10 a=VkNPw1HP01LnGYTKEx00:22 a=RnoormkPH1_aCDwRdu11:22 a=U7nrCbtTmkRpXpFmAIza:22 a=WcWu7VMip6P6h1v0TZ8A:9 a=CjuIK1q_8ugA:10 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODI2MDEwOCBTYWx0ZWRfX64rVuzt7PCA+ GeD4I9v+CUdWarQxrHoDHukvxbrNmkjxfGyytEEj11RsymxRq1XYin2Vop8Kmtw41X1QiWPQnAZ WpYjllVGnkYrQF0WZ1F4qMupF25GU7ZJMuuVuFLjnizScLhrod8bagmtYNOPUEuXQ+eHPiGZ7uQ /+VPfODxKMyH/QGHNHm1wI4I+YJMMUk7Hw8M72+rdztcxhbAV+2nGJSFNSD4YyDsa6XS8+gGxu8 B4CB5J9xP6XmZlxOVTD3o9bvc0imKEOxoOqi0wMt5dJaekQ+mPhsXiOkO6GhiVj1az6tuZpKNCO sLfFzQqFLyYXjjLpMy2IxQOmGCjJsreyay+yZJrUOgUiTmh3nx34PLmC9MXx1sCn2vaLwXZAHCF pjuTImSG1U/rzpI7BtStwVyKNSIVB9Q4KzRmsHP8JieYTjZMHySl5w+2GbrIVlgX1NWFih7Grh7 drMddB//EfmV6Ckry9g== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-26_03,2026-08-26_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 clxscore=1015 adultscore=0 priorityscore=1501 impostorscore=0 malwarescore=0 bulkscore=0 lowpriorityscore=0 suspectscore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608260108 On Wed, Aug 26, 2026 at 02:00:35PM +0200, Alexander Gordeev wrote: > On Mon, Aug 24, 2026 at 12:40:48PM +0200, Heiko Carstens wrote: > > On Mon, Aug 17, 2026 at 01:33:00PM +0200, Alexander Gordeev wrote: > > > diff --git a/arch/s390/include/asm/lowcore.h b/arch/s390/include/asm/lowcore.h > > > index 3b3ecc647993..dba236664da9 100644 > > > --- a/arch/s390/include/asm/lowcore.h > > > +++ b/arch/s390/include/asm/lowcore.h > > > @@ -163,7 +163,7 @@ struct lowcore { > > > __s32 preempt_count; /* 0x03a8 */ > > > __u32 spinlock_lockval; /* 0x03ac */ > > > __u32 spinlock_index; /* 0x03b0 */ > > > - __u8 pad_0x03b4[0x03b8-0x03b4]; /* 0x03b4 */ > > > + __s32 lazy_mmu_count; /* 0x03b4 */ > > > > Why is this signed? Can it get negative? > > For the same reason preempt_count is signed, I guess. Check again, preempt_count is now unsigned and 64 bit ;) > No, it can not get negative and it is very handy to observe > a disbalance in a crash (I did hit it indeed while debugging). > > > > +static __always_inline bool is_lazy_mmu_active(void) > > > +{ > > > + if (__is_defined(__DECOMPRESSOR)) > > > + return false; > > > + if (!get_lowcore()->lazy_mmu_count) > > > + return false; > > > > I guess there is opportunity to generate better code here using an > > alternative and using a flag output constraint too. > > Will try. Guess that will be quite ugly code. Just let me know if I should provide that code, since I coded up such a mess already several times. > > > void __init arch_cpu_finalize_init(void) > > > { > > > + lazy_mmu_online_boot_cpu(); > > > sclp_init(); > > > } > > > > What makes this code so special that an explicit call from > > arch_cpu_finalize_init() is required? This is really the last resort if > > everything else fails. To me it looks like the code can be changed to use a > > new static key, and add a generic early (pre-smp) initcall to allocate > > memory for cpu 0, and if that succeeds enable the static key. > > I had exactly similar variant, but failed to resolve a race when a secondary > CPU callback was called before the CPU0's one. Probably, used a wrong event. > Will look into it again. early_initcall() should do the trick. > > > + local_bh_disable(); > > > + > > > + lockdep_assert_preemption_disabled(); > > > + range = this_cpu_read(ipte_range); > > > > Why is it required to disable bottom halves? A comment would be helpful. > > Or a hint in the commit message - this is not obvious. > > When an interrupt arrives in the middle of enter|leave_ipte_range() > the chain pcpu_addr_to_page() -> vmalloc_to_page() -> ptep_get() > decides ptep_get() is called in lazy mode, while the per-cpu state > not yet (de-)initialized (AKA inconsistent). That led to crashes: So, I don't know what exactly lead to the crash, but I guess the problem is an only partially initialized ipte_range struct, while the lazy_mmu_count has been incremented already? Isn't it possible to solve that problem without disabling bottom halves by reordering sequences in enter_ipte_range() and leave_ipte_range()? Would be nice if we could avoid the not so obvious local_bh_disable() and local_bh_enable() pairs.