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Wed, 13 Jul 2022 12:24:57 +0000 (GMT) Message-ID: <36962c60-a7db-a5f6-2ecf-c7dcc0152e74@linux.ibm.com> Date: Wed, 13 Jul 2022 14:24:57 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.9.0 Content-Language: en-US To: Claudio Imbrenda , kvm@vger.kernel.org Cc: linux-s390@vger.kernel.org, scgl@linux.ibm.com, nrb@linux.ibm.com, thuth@redhat.com References: <20220713104557.168113-1-imbrenda@linux.ibm.com> <20220713104557.168113-4-imbrenda@linux.ibm.com> From: Janosch Frank Subject: Re: [kvm-unit-tests PATCH v3 3/3] lib: s390x: better smp interrupt checks In-Reply-To: <20220713104557.168113-4-imbrenda@linux.ibm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 X-Proofpoint-GUID: GYd_trmXJSs_E__XnCisripOEO3b1Sus X-Proofpoint-ORIG-GUID: 6kgYi59TB7fhCVu2Rgo83P3OzBfhLJv7 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.883,Hydra:6.0.517,FMLib:17.11.122.1 definitions=2022-07-12_14,2022-07-13_02,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 lowpriorityscore=0 mlxlogscore=999 clxscore=1015 mlxscore=0 suspectscore=0 impostorscore=0 priorityscore=1501 bulkscore=0 phishscore=0 spamscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2206140000 definitions=main-2207130049 Precedence: bulk List-ID: X-Mailing-List: linux-s390@vger.kernel.org On 7/13/22 12:45, Claudio Imbrenda wrote: > Use per-CPU flags and callbacks for Program and Extern interrupts, > instead of global variables. > > This allows for more accurate error handling; a CPU waiting for an > interrupt will not have it "stolen" by a different CPU that was not > supposed to wait for one, and now two CPUs can wait for interrupts at > the same time. > > This will significantly improve error reporting and debugging when > things go wrong. > > Both program interrupts and external interrupts are now CPU-bound, even > though some external interrupts are floating (notably, the SCLP > interrupt). In those cases, the testcases should mask interrupts and/or > expect them appropriately according to need. > > Signed-off-by: Claudio Imbrenda > --- > lib/s390x/asm/arch_def.h | 16 ++++++++++- > lib/s390x/smp.h | 8 +----- > lib/s390x/interrupt.c | 57 +++++++++++++++++++++++++++++----------- > lib/s390x/smp.c | 11 ++++++++ > 4 files changed, 69 insertions(+), 23 deletions(-) > > diff --git a/lib/s390x/asm/arch_def.h b/lib/s390x/asm/arch_def.h > index b3282367..03578277 100644 > --- a/lib/s390x/asm/arch_def.h > +++ b/lib/s390x/asm/arch_def.h > @@ -41,6 +41,17 @@ struct psw { > uint64_t addr; > }; > > +struct cpu { > + struct lowcore *lowcore; > + uint64_t *stack; > + void (*pgm_cleanup_func)(void); We should change the parameter to include the stack frame for easier manipulation of the pre-exception registers, especially the CRs. > + uint16_t addr; > + uint16_t idx; > + bool active; > + bool pgm_int_expected; > + bool ext_int_expected; > +}; And I'd opt for also integrating the io handling function and getting rid of the unset function to make them all look the same. Looking at Nico's patches the external handler will follow soon anyway. I'm not 100% happy with having this struct in this file, what kept you from including smp.h? > +struct lowcore *smp_get_lowcore(uint16_t idx) > +{ > + if (THIS_CPU->idx == idx) > + return &lowcore; > + > + check_idx(idx); > + return cpus[idx].lowcore; > +} I'm waiting for the moment where we need locking in the struct cpu. > + > int smp_sigp(uint16_t idx, uint8_t order, unsigned long parm, uint32_t *status) > { > check_idx(idx); > @@ -253,6 +262,7 @@ static int smp_cpu_setup_nolock(uint16_t idx, struct psw psw) > > /* Copy all exception psws. */ > memcpy(lc, cpus[0].lowcore, 512); > + lc->this_cpu = &cpus[idx]; > > /* Setup stack */ > cpus[idx].stack = (uint64_t *)alloc_pages(2); > @@ -325,6 +335,7 @@ void smp_setup(void) > for (i = 0; i < num; i++) { > cpus[i].addr = entry[i].address; > cpus[i].active = false; > + cpus[i].idx = i; > /* > * Fill in the boot CPU. If the boot CPU is not at index 0, > * swap it with the one at index 0. This guarantees that the