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Tue, 21 May 2024 15:50:39 GMT Received: from smtpav07.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 9FC7C2004D; Tue, 21 May 2024 15:50:37 +0000 (GMT) Received: from smtpav07.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 05CD62004E; Tue, 21 May 2024 15:50:37 +0000 (GMT) Received: from [9.179.20.140] (unknown [9.179.20.140]) by smtpav07.fra02v.mail.ibm.com (Postfix) with ESMTP; Tue, 21 May 2024 15:50:36 +0000 (GMT) Message-ID: <4927d83e4db0db6baa4b4d3214ca6e866402be1f.camel@linux.ibm.com> Subject: Re: [PATCH v3 2/3] vfio/pci: Support 8-byte PCI loads and stores From: Gerd Bayer To: Alex Williamson Cc: Jason Gunthorpe , Niklas Schnelle , kvm@vger.kernel.org, linux-s390@vger.kernel.org, Ankit Agrawal , Yishai Hadas , Halil Pasic , Julian Ruess , Ben Segal Date: Tue, 21 May 2024 17:50:36 +0200 In-Reply-To: <20240429103156.50793b98.alex.williamson@redhat.com> References: <20240425165604.899447-1-gbayer@linux.ibm.com> <20240425165604.899447-3-gbayer@linux.ibm.com> <20240429103156.50793b98.alex.williamson@redhat.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.52.1 (3.52.1-1.fc40app1) Precedence: bulk X-Mailing-List: linux-s390@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: R9Grp085szA0YsypU9_48Qy-ZuljKffY X-Proofpoint-ORIG-GUID: 42zpjyuxVTy2qu15Ro0CdzYjmBY5KkH3 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.650,FMLib:17.12.28.16 definitions=2024-05-21_09,2024-05-21_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 clxscore=1015 bulkscore=0 impostorscore=0 spamscore=0 mlxscore=0 phishscore=0 adultscore=0 mlxlogscore=795 suspectscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2405010000 definitions=main-2405210119 On Mon, 2024-04-29 at 10:31 -0600, Alex Williamson wrote: > On Thu, 25 Apr 2024 18:56:03 +0200 > Gerd Bayer wrote: >=20 > > From: Ben Segal > >=20 > > Many PCI adapters can benefit or even require full 64bit read > > and write access to their registers. In order to enable work on > > user-space drivers for these devices add two new variations > > vfio_pci_core_io{read|write}64 of the existing access methods > > when the architecture supports 64-bit ioreads and iowrites. > >=20 > > Signed-off-by: Ben Segal > > Co-developed-by: Gerd Bayer > > Signed-off-by: Gerd Bayer > > --- > > =C2=A0drivers/vfio/pci/vfio_pci_rdwr.c | 16 ++++++++++++++++ > > =C2=A0include/linux/vfio_pci_core.h=C2=A0=C2=A0=C2=A0 |=C2=A0 3 +++ > > =C2=A02 files changed, 19 insertions(+) > >=20 > > diff --git a/drivers/vfio/pci/vfio_pci_rdwr.c > > b/drivers/vfio/pci/vfio_pci_rdwr.c > > index 3335f1b868b1..8ed06edaee23 100644 > > --- a/drivers/vfio/pci/vfio_pci_rdwr.c > > +++ b/drivers/vfio/pci/vfio_pci_rdwr.c > > @@ -89,6 +89,9 @@ EXPORT_SYMBOL_GPL(vfio_pci_core_ioread##size); > > =C2=A0VFIO_IOREAD(8) > > =C2=A0VFIO_IOREAD(16) > > =C2=A0VFIO_IOREAD(32) > > +#ifdef ioread64 > > +VFIO_IOREAD(64) > > +#endif > > =C2=A0 > > =C2=A0#define > > VFIO_IORDWR(size) \ > > =C2=A0static int vfio_pci_core_iordwr##size(struct vfio_pci_core_device > > *vdev,\ > > @@ -124,6 +127,10 @@ static int vfio_pci_core_iordwr##size(struct > > vfio_pci_core_device *vdev,\ > > =C2=A0VFIO_IORDWR(8) > > =C2=A0VFIO_IORDWR(16) > > =C2=A0VFIO_IORDWR(32) > > +#if defined(ioread64) && defined(iowrite64) > > +VFIO_IORDWR(64) > > +#endif > > + > > =C2=A0/* > > =C2=A0 * Read or write from an __iomem region (MMIO or I/O port) with a= n > > excluded > > =C2=A0 * range which is inaccessible.=C2=A0 The excluded range drops wr= ites > > and fills > > @@ -148,6 +155,15 @@ ssize_t vfio_pci_core_do_io_rw(struct > > vfio_pci_core_device *vdev, bool test_mem, > > =C2=A0 else > > =C2=A0 fillable =3D 0; > > =C2=A0 > > +#if defined(ioread64) && defined(iowrite64) >=20 > Nit, #ifdef vfio_pci_core_iordwr64 I'm sorry, but I'm not sure how I should check for the expanded symbol here. I think I'll have to stick to checking the same condition as for whether VFIO_IORDWR(64) should be expanded. > > + if (fillable >=3D 8 && !(off % 8)) { > > + ret =3D vfio_pci_core_iordwr64(vdev, > > iswrite, test_mem, > > + =C2=A0=C2=A0=C2=A0=C2=A0 io, buf, off, > > &filled); > > + if (ret) > > + return ret; > > + > > + } else > > +#endif /* defined(ioread64) && defined(iowrite64) */ >=20 > AFAIK, the comment appended to the #endif is really only suggested > when the code block is too long to reasonable fit in a terminal.=C2=A0 > That's no longer the case with the new helper. Yes, I'll change that. > Thanks, >=20 > Alex >=20 >=20 Thanks, Gerd