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Mon, 22 Apr 2024 11:08:26 GMT Received: from smtpav02.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 006D52004B; Mon, 22 Apr 2024 11:08:24 +0000 (GMT) Received: from smtpav02.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 8DDE920040; Mon, 22 Apr 2024 11:08:23 +0000 (GMT) Received: from [9.171.18.8] (unknown [9.171.18.8]) by smtpav02.fra02v.mail.ibm.com (Postfix) with ESMTP; Mon, 22 Apr 2024 11:08:23 +0000 (GMT) Message-ID: <5fe2171422c4ca388e351cd55c14ec3bd8aefe40.camel@linux.ibm.com> Subject: Re: [PATCH] vfio/pci: Support 8-byte PCI loads and stores From: Gerd Bayer To: Alex Williamson , Jason Gunthorpe Cc: Niklas Schnelle , Ankit Agrawal , Yishai Hadas , kvm@vger.kernel.org, linux-s390@vger.kernel.org, Halil Pasic , Ben Segal Date: Mon, 22 Apr 2024 13:08:23 +0200 In-Reply-To: <20240419104745.01ebb96f.alex.williamson@redhat.com> References: <20240419135323.1282064-1-gbayer@linux.ibm.com> <20240419135823.GE223006@ziepe.ca> <20240419161135.GF223006@ziepe.ca> <20240419104745.01ebb96f.alex.williamson@redhat.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.50.4 (3.50.4-2.fc39app4) Precedence: bulk X-Mailing-List: linux-s390@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: M0Q70jls1TvizGsyJ_kCMoW4u5antUWp X-Proofpoint-ORIG-GUID: cLHKeSBxSQBz_Vuh5crlM-xAmIA7y7pv X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-04-22_09,2024-04-22_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 mlxlogscore=867 malwarescore=0 mlxscore=0 spamscore=0 bulkscore=0 suspectscore=0 impostorscore=0 priorityscore=1501 adultscore=0 clxscore=1015 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2404010000 definitions=main-2404220050 On Fri, 2024-04-19 at 10:47 -0600, Alex Williamson wrote: > On Fri, 19 Apr 2024 13:11:35 -0300 > Jason Gunthorpe wrote: >=20 > > On Fri, Apr 19, 2024 at 05:57:52PM +0200, Niklas Schnelle wrote: > > > On Fri, 2024-04-19 at 10:58 -0300, Jason Gunthorpe wrote:=C2=A0=20 > > > > On Fri, Apr 19, 2024 at 03:53:23PM +0200, Gerd Bayer wrote:=C2=A0= =20 > > > > > From: Ben Segal > > > > >=20 > > > > > Many PCI adapters can benefit or even require full 64bit read > > > > > and write access to their registers. In order to enable work > > > > > on > > > > > user-space drivers for these devices add two new variations > > > > > vfio_pci_core_io{read|write}64 of the existing access methods > > > > > when the architecture supports 64-bit ioreads and iowrites. > > > > >=20 > > > > > Signed-off-by: Ben Segal > > > > > Co-developed-by: Gerd Bayer > > > > > Signed-off-by: Gerd Bayer > > > > > --- > > > > >=20 > > > > > Hi all, > > > > >=20 > > > > > we've successfully used this patch with a user-mode driver > > > > > for a PCI device that requires 64bit register read/writes on > > > > > s390.=C2=A0=20 > > > >=20 > > > > But why? S390 already has a system call for userspace to do the > > > > 64 bit write, and newer S390 has a userspace instruction to do > > > > it. > > > >=20 > > > > Why would you want to use a VFIO system call on the mmio > > > > emulation path? > > > >=20 > > > > mmap the registers and access them normally?=C2=A0=20 > > >=20 > > > It's a very good point and digging into why this wasn't used by > > > Benjamin. It turns out VFIO_PCI_MMAP is disabled for S390 which > > > it really shouldn't be especially now that we have the user-space > > > instructions. Before that though Benjamin turned to this > > > interface which then lead him to this limitation. So yeah we'll > > > definitely verify that it also works via VFIO_PCI_MMAP and send a > > > patch to enable that.=C2=A0=20 > >=20 > > Make sense to me! > >=20 > > > That said I still think it's odd not to have the 8 byte case > > > working here even if it isn't the right approach. Could still be > > > useful for debug/testing without having to add the MIO > > > instructions or the our special syscall.=C2=A0=20 > >=20 > > Yes, this also makes sense, but this patch needs some adjusting >=20 > Yes, I think so too, falling back to 4-byte accesses of course if > 8-byte is not available.=C2=A0 Thanks, So I'll rework this to simply fall back to 32-bit if 64-bit is not available in a v2. And we'll investigate the VFIO_PCI_MMAP case separately. Thank you, Gerd