From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:5766 "EHLO mx0a-001b2d01.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731222AbgIHQPU (ORCPT ); Tue, 8 Sep 2020 12:15:20 -0400 Subject: Re: [PATCH v3] KVM: s390: Introduce storage key removal facility References: <20200908100249.23150-1-frankja@linux.ibm.com> From: Janosch Frank Message-ID: <743c6c99-3eb6-e508-0a07-0efb1ff8c201@linux.ibm.com> Date: Tue, 8 Sep 2020 13:56:24 +0200 MIME-Version: 1.0 In-Reply-To: Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="7b9jHCYOW2Rt9MlQChg19rPM5G8q76K3X" Sender: linux-s390-owner@vger.kernel.org List-ID: To: David Hildenbrand , kvm@vger.kernel.org Cc: borntraeger@de.ibm.com, imbrenda@linux.ibm.com, linux-s390@vger.kernel.org This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --7b9jHCYOW2Rt9MlQChg19rPM5G8q76K3X Content-Type: multipart/mixed; boundary="jWbmSptpRdxaBISBQiQsZycONMNOqCYhB" --jWbmSptpRdxaBISBQiQsZycONMNOqCYhB Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: quoted-printable On 9/8/20 12:16 PM, David Hildenbrand wrote: > On 08.09.20 12:02, Janosch Frank wrote: >> The storage key removal facility makes skey related instructions >> result in special operation program exceptions. It is based on the >> Keyless Subset Facility. >> >> The usual suspects are iske, sske, rrbe and their respective >> variants. lpsw(e), pfmf and tprot can also specify a key and essa with= >> an ORC of 4 will consult the change bit, hence they all result in >> exceptions. >> >> Unfortunately storage keys were so essential to the architecture, that= >> there is no facility bit that we could deactivate. That's why the >> removal facility (bit 169) was introduced which makes it necessary, >> that, if active, the skey related facilities 10, 14, 66, 145 and 149 >> are zero. Managing this requirement and migratability has to be done >> in userspace, as KVM does not check the facilities it receives to be >> able to easily implement userspace emulation. >> >> Removing storage key support allows us to circumvent complicated >> emulation code and makes huge page support tremendously easier. >> >> Signed-off-by: Janosch Frank >> --- >> >> v3: >> * Put kss handling into own function >> * Removed some unneeded catch statements and converted others to ifs >> >> v2: >> * Removed the likely >> * Updated and re-shuffeled the comments which had the wrong informati= on >> >> --- >> arch/s390/kvm/intercept.c | 34 +++++++++++++++++++++++++++++++++- >> arch/s390/kvm/kvm-s390.c | 5 +++++ >> arch/s390/kvm/priv.c | 26 +++++++++++++++++++++++--- >> 3 files changed, 61 insertions(+), 4 deletions(-) >> >> diff --git a/arch/s390/kvm/intercept.c b/arch/s390/kvm/intercept.c >> index e7a7c499a73f..9c699c3fcf84 100644 >> --- a/arch/s390/kvm/intercept.c >> +++ b/arch/s390/kvm/intercept.c >> @@ -33,6 +33,7 @@ u8 kvm_s390_get_ilen(struct kvm_vcpu *vcpu) >> case ICPT_OPEREXC: >> case ICPT_PARTEXEC: >> case ICPT_IOINST: >> + case ICPT_KSS: >> /* instruction only stored for these icptcodes */ >> ilen =3D insn_length(vcpu->arch.sie_block->ipa >> 8); >> /* Use the length of the EXECUTE instruction if necessary */ >> @@ -531,6 +532,37 @@ static int handle_pv_notification(struct kvm_vcpu= *vcpu) >> return handle_instruction(vcpu); >> } >> =20 >> +static int handle_kss(struct kvm_vcpu *vcpu) >> +{ >> + if (!test_kvm_facility(vcpu->kvm, 169)) >> + return kvm_s390_skey_check_enable(vcpu); >> + >> + /* >> + * Storage key removal facility emulation. >> + * >> + * KSS is the same priority as an instruction >> + * interception. Hence we need handling here >> + * and in the instruction emulation code. >> + * >> + * KSS is nullifying (no psw forward), SKRF >> + * issues suppressing SPECIAL OPS, so we need >> + * to forward by hand. >> + */ >> + if (vcpu->arch.sie_block->ipa =3D=3D 0) { >> + /* >> + * Interception caused by a key in a >> + * exception new PSW mask. The guest >> + * PSW has already been updated to the >> + * non-valid PSW so we only need to >> + * inject a PGM. >> + */ >> + return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); >> + } >> + >> + kvm_s390_forward_psw(vcpu, kvm_s390_get_ilen(vcpu)); >> + return kvm_s390_inject_program_int(vcpu, PGM_SPECIAL_OPERATION); >> +} >> + >> int kvm_handle_sie_intercept(struct kvm_vcpu *vcpu) >> { >> int rc, per_rc =3D 0; >> @@ -565,7 +597,7 @@ int kvm_handle_sie_intercept(struct kvm_vcpu *vcpu= ) >> rc =3D handle_partial_execution(vcpu); >> break; >> case ICPT_KSS: >> - rc =3D kvm_s390_skey_check_enable(vcpu); >> + rc =3D handle_kss(vcpu); >> break; >> case ICPT_MCHKREQ: >> case ICPT_INT_ENABLE: >> diff --git a/arch/s390/kvm/kvm-s390.c b/arch/s390/kvm/kvm-s390.c >> index 6b74b92c1a58..85647f19311d 100644 >> --- a/arch/s390/kvm/kvm-s390.c >> +++ b/arch/s390/kvm/kvm-s390.c >> @@ -2692,6 +2692,11 @@ int kvm_arch_init_vm(struct kvm *kvm, unsigned = long type) >> /* we emulate STHYI in kvm */ >> set_kvm_facility(kvm->arch.model.fac_mask, 74); >> set_kvm_facility(kvm->arch.model.fac_list, 74); >> + /* we emulate the storage key removal facility only with kss */ >> + if (sclp.has_kss) { >> + set_kvm_facility(kvm->arch.model.fac_mask, 169); >> + set_kvm_facility(kvm->arch.model.fac_list, 169); >> + } >> if (MACHINE_HAS_TLB_GUEST) { >> set_kvm_facility(kvm->arch.model.fac_mask, 147); >> set_kvm_facility(kvm->arch.model.fac_list, 147); >> diff --git a/arch/s390/kvm/priv.c b/arch/s390/kvm/priv.c >> index cd74989ce0b0..5e3583b8b5e3 100644 >> --- a/arch/s390/kvm/priv.c >> +++ b/arch/s390/kvm/priv.c >> @@ -207,6 +207,13 @@ int kvm_s390_skey_check_enable(struct kvm_vcpu *v= cpu) >> int rc; >> =20 >> trace_kvm_s390_skey_related_inst(vcpu); >> + >> + if (test_kvm_facility(vcpu->kvm, 169)) { >> + rc =3D kvm_s390_inject_program_int(vcpu, PGM_SPECIAL_OPERATION); >> + if (!rc) >> + return -EOPNOTSUPP; >> + } >> + >> /* Already enabled? */ >> if (vcpu->arch.skey_enabled) >> return 0; >> @@ -257,7 +264,7 @@ static int handle_iske(struct kvm_vcpu *vcpu) >> =20 >> rc =3D try_handle_skey(vcpu); >> if (rc) >> - return rc !=3D -EAGAIN ? rc : 0; >> + return (rc !=3D -EAGAIN || rc !=3D -EOPNOTSUPP) ? rc : 0; >=20 > If rc =3D=3D -EAGAIN you used to return 0. >=20 > Now, "-EAGAIN !=3D -EAGAIN || -EAGAIN !=3D -EOPNOTSUPP" >=20 > evaluates to "false || true =3D=3D true" >=20 > so you would return rc =3D=3D -EAGAIN - is that what you really want? >=20 > (I've been on vacation for two weeks, my mind might not be fully back := D ) As you can clearly tell, I'm waiting for my vacation to finally arrive. >=20 >> =20 >> kvm_s390_get_regs_rre(vcpu, ®1, ®2); >> =20 >> @@ -304,7 +311,7 @@ static int handle_rrbe(struct kvm_vcpu *vcpu) >> =20 >> rc =3D try_handle_skey(vcpu); >> if (rc) >> - return rc !=3D -EAGAIN ? rc : 0; >> + return (rc !=3D -EAGAIN || rc !=3D -EOPNOTSUPP) ? rc : 0; >> =20 >> kvm_s390_get_regs_rre(vcpu, ®1, ®2); >> =20 >> @@ -355,7 +362,7 @@ static int handle_sske(struct kvm_vcpu *vcpu) >> =20 >> rc =3D try_handle_skey(vcpu); >> if (rc) >> - return rc !=3D -EAGAIN ? rc : 0; >> + return (rc !=3D -EAGAIN || rc !=3D -EOPNOTSUPP) ? rc : 0; >> =20 >> if (!test_kvm_facility(vcpu->kvm, 8)) >> m3 &=3D ~SSKE_MB; >> @@ -745,6 +752,8 @@ int kvm_s390_handle_lpsw(struct kvm_vcpu *vcpu) >> return kvm_s390_inject_prog_cond(vcpu, rc); >> if (!(new_psw.mask & PSW32_MASK_BASE)) >> return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); >> + if (new_psw.mask & PSW32_MASK_KEY && test_kvm_facility(vcpu->kvm, 16= 9)) >> + return kvm_s390_inject_program_int(vcpu, PGM_SPECIAL_OPERATION); >=20 > You don't use parentheses around & here ... >=20 >> gpsw->mask =3D (new_psw.mask & ~PSW32_MASK_BASE) << 32; >> gpsw->mask |=3D new_psw.addr & PSW32_ADDR_AMODE; >> gpsw->addr =3D new_psw.addr & ~PSW32_ADDR_AMODE; >> @@ -771,6 +780,8 @@ static int handle_lpswe(struct kvm_vcpu *vcpu) >> rc =3D read_guest(vcpu, addr, ar, &new_psw, sizeof(new_psw)); >> if (rc) >> return kvm_s390_inject_prog_cond(vcpu, rc); >> + if ((new_psw.mask & PSW_MASK_KEY) && test_kvm_facility(vcpu->kvm, 16= 9)) >> + return kvm_s390_inject_program_int(vcpu, PGM_SPECIAL_OPERATION); >> vcpu->arch.sie_block->gpsw =3D new_psw; >> if (!is_valid_psw(&vcpu->arch.sie_block->gpsw)) >> return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); >> @@ -1025,6 +1036,10 @@ static int handle_pfmf(struct kvm_vcpu *vcpu) >> if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) >> return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); >> =20 >> + if (vcpu->run->s.regs.gprs[reg1] & PFMF_SK && >=20 > ... and here ... >=20 >> + test_kvm_facility(vcpu->kvm, 169)) >> + return kvm_s390_inject_program_int(vcpu, PGM_SPECIAL_OPERATION); >> + >> if (vcpu->run->s.regs.gprs[reg1] & PFMF_RESERVED) >> return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); >> =20 >> @@ -1203,6 +1218,8 @@ static int handle_essa(struct kvm_vcpu *vcpu) >> return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); >> /* Check for invalid operation request code */ >> orc =3D (vcpu->arch.sie_block->ipb & 0xf0000000) >> 28; >> + if (orc =3D=3D ESSA_SET_POT_VOLATILE && test_kvm_facility(vcpu->kvm,= 169)) >> + return kvm_s390_inject_program_int(vcpu, PGM_SPECIAL_OPERATION); >> /* ORCs 0-6 are always valid */ >> if (orc > (test_kvm_facility(vcpu->kvm, 147) ? ESSA_SET_STABLE_NODAT= >> : ESSA_SET_STABLE_IF_RESIDENT)) >> @@ -1451,6 +1468,9 @@ static int handle_tprot(struct kvm_vcpu *vcpu) >> =20 >> kvm_s390_get_base_disp_sse(vcpu, &address1, &address2, &ar, NULL); >> =20 >> + if ((address2 & 0xf0) && test_kvm_facility(vcpu->kvm, 169)) >> + return kvm_s390_inject_program_int(vcpu, PGM_SPECIAL_OPERATION); >> + >=20 > ... but you do here I'll add some >=20 >> /* we only handle the Linux memory detection case: >> * access key =3D=3D 0 >> * everything else goes to userspace. */ >> >=20 >=20 > Do we have to are about vsie? If the g2 CPU does not have storage keys,= > also g3 should not. I can spot KSS handling in vsie code - is that > sufficient? You mean the two lines that take care of the cpuflags? That's KSS passthrough and fallback to ICTLs if there is no KSS. That's an interesting problem. That would mean we would need to force KSS instead of doing a passthrough for the G3 if SKRF is enabled in G2. The intercept priority problem will make this even more awkward. I'll need to think about this for a bit and speak to the CPU architecture people to clear this up. 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