From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from us-smtp-delivery-1.mimecast.com ([205.139.110.120]:37490 "EHLO us-smtp-1.mimecast.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1725985AbfKLMJj (ORCPT ); Tue, 12 Nov 2019 07:09:39 -0500 Subject: Re: [kvm-unit-tests PATCH v2 3/3] s390x: Load reset psw on diag308 reset References: <20191111153345.22505-1-frankja@linux.ibm.com> <20191111153345.22505-4-frankja@linux.ibm.com> From: David Hildenbrand Message-ID: <7683adc7-2cd0-1103-d231-8a1577f1e673@redhat.com> Date: Tue, 12 Nov 2019 13:09:31 +0100 MIME-Version: 1.0 In-Reply-To: <20191111153345.22505-4-frankja@linux.ibm.com> Content-Language: en-US Content-Type: text/plain; charset=WINDOWS-1252 Content-Transfer-Encoding: quoted-printable Sender: linux-s390-owner@vger.kernel.org List-ID: To: Janosch Frank , kvm@vger.kernel.org Cc: linux-s390@vger.kernel.org, thuth@redhat.com On 11.11.19 16:33, Janosch Frank wrote: > On a diag308 subcode 0 CRs will be reset, so we need a PSW mask > without DAT. Also we need to set the short psw indication to be > compliant with the architecture. >=20 > Let's therefore define a reset PSW mask with 64 bit addressing and > short PSW indication that is compliant with architecture and use it. >=20 > Signed-off-by: Janosch Frank > --- > lib/s390x/asm-offsets.c | 1 + > lib/s390x/asm/arch_def.h | 3 ++- > s390x/cstart64.S | 24 +++++++++++++++++------- > 3 files changed, 20 insertions(+), 8 deletions(-) >=20 > diff --git a/lib/s390x/asm-offsets.c b/lib/s390x/asm-offsets.c > index 4b213f8..61d2658 100644 > --- a/lib/s390x/asm-offsets.c > +++ b/lib/s390x/asm-offsets.c > @@ -58,6 +58,7 @@ int main(void) > =09OFFSET(GEN_LC_SW_INT_FPRS, lowcore, sw_int_fprs); > =09OFFSET(GEN_LC_SW_INT_FPC, lowcore, sw_int_fpc); > =09OFFSET(GEN_LC_SW_INT_CRS, lowcore, sw_int_crs); > +=09OFFSET(GEN_LC_SW_INT_PSW, lowcore, sw_int_psw); > =09OFFSET(GEN_LC_MCCK_EXT_SA_ADDR, lowcore, mcck_ext_sa_addr); > =09OFFSET(GEN_LC_FPRS_SA, lowcore, fprs_sa); > =09OFFSET(GEN_LC_GRS_SA, lowcore, grs_sa); > diff --git a/lib/s390x/asm/arch_def.h b/lib/s390x/asm/arch_def.h > index 07d4e5e..7d25e4f 100644 > --- a/lib/s390x/asm/arch_def.h > +++ b/lib/s390x/asm/arch_def.h > @@ -79,7 +79,8 @@ struct lowcore { > =09uint32_t=09sw_int_fpc;=09=09=09/* 0x0300 */ > =09uint8_t=09=09pad_0x0304[0x0308 - 0x0304];=09/* 0x0304 */ > =09uint64_t=09sw_int_crs[16];=09=09=09/* 0x0308 */ > -=09uint8_t=09=09pad_0x0310[0x11b0 - 0x0388];=09/* 0x0388 */ > +=09struct psw=09sw_int_psw;=09=09=09/* 0x0388 */ > +=09uint8_t=09=09pad_0x0310[0x11b0 - 0x0390];=09/* 0x0390 */ > =09uint64_t=09mcck_ext_sa_addr;=09=09/* 0x11b0 */ > =09uint8_t=09=09pad_0x11b8[0x1200 - 0x11b8];=09/* 0x11b8 */ > =09uint64_t=09fprs_sa[16];=09=09=09/* 0x1200 */ > diff --git a/s390x/cstart64.S b/s390x/cstart64.S > index 4be20fc..86dd4c4 100644 > --- a/s390x/cstart64.S > +++ b/s390x/cstart64.S > @@ -126,13 +126,18 @@ memsetxc: > .globl diag308_load_reset > diag308_load_reset: > =09SAVE_REGS > -=09/* Save the first PSW word to the IPL PSW */ > +=09/* Backup current PSW mask, as we have to restore it on success */ > =09epsw=09%r0, %r1 > -=09st=09%r0, 0 > -=09/* Store the address and the bit for 31 bit addressing */ > -=09larl %r0, 0f > -=09oilh %r0, 0x8000 > -=09st %r0, 0x4 > +=09st=09%r0, GEN_LC_SW_INT_PSW > +=09st=09%r1, GEN_LC_SW_INT_PSW + 4 > +=09/* Load reset psw mask (short psw, 64 bit) */ > +=09lg=09%r0, reset_psw > +=09/* Load the success label address */ > +=09larl %r1, 0f > +=09/* Or it to the mask */ > +=09ogr=09%r0, %r1 > +=09/* Store it at the reset PSW location (real 0x0) */ > +=09stg=09%r0, 0 > =09/* Do the reset */ > =09diag %r0,%r2,0x308 > =09/* Failure path */ > @@ -144,7 +149,10 @@ diag308_load_reset: > =09lctlg=09%c0, %c0, 0(%r1) > =09RESTORE_REGS > =09lhi=09%r2, 1 > -=09br=09%r14 > +=09larl=09%r0, 1f > +=09stg=09%r0, GEN_LC_SW_INT_PSW + 8 > +=09lpswe=09GEN_LC_SW_INT_PSW > +1:=09br=09%r14 > =20 > .globl smp_cpu_setup_state > smp_cpu_setup_state: > @@ -184,6 +192,8 @@ svc_int: > =09lpswe=09GEN_LC_SVC_OLD_PSW > =20 > =09.align=098 > +reset_psw: > +=09.quad=090x0008000180000000 > initial_psw: > =09.quad=090x0000000180000000, clear_bss_start > pgm_int_psw: >=20 This patch breaks the smp test under TCG (no clue and no time to look into the details :) ): timeout -k 1s --foreground 90s /home/dhildenb/git/qemu/s390x-softmmu/qemu-system-s390x -nodefaults -nographic -machine s390-ccw-virtio,accel=3Dtcg -chardev stdio,id=3Dcon0 -device sclpconsole,chardev=3Dcon0 -kernel s390x/smp.elf -smp 1 -smp 2 # -initrd /tmp/tmp.EDi4y0tv58 SMP: Initializing, found 2 cpus PASS: smp: start PASS: smp: stop FAIL: smp: stop store status: prefix PASS: smp: stop store status: stack PASS: smp: store status at address: running: incorrect state PASS: smp: store status at address: running: status not written PASS: smp: store status at address: stopped: status written PASS: smp: ecall: ecall PASS: smp: emcall: ecall PASS: smp: cpu reset: cpu stopped PASS: smp: reset initial: clear: psw PASS: smp: reset initial: clear: prefix PASS: smp: reset initial: clear: fpc PASS: smp: reset initial: clear: cpu timer PASS: smp: reset initial: clear: todpr PASS: smp: reset initial: initialized: cr0 =3D=3D 0xE0 PASS: smp: reset initial: initialized: cr14 =3D=3D 0xC2000000 PASS: smp: reset initial: cpu stopped SUMMARY: 18 tests, 1 unexpected failures --=20 Thanks, David / dhildenb