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Fri, 26 Aug 2022 11:55:13 +0000 (GMT) Received: from [9.145.186.191] (unknown [9.145.186.191]) by d06av23.portsmouth.uk.ibm.com (Postfix) with ESMTP; Fri, 26 Aug 2022 11:55:13 +0000 (GMT) Message-ID: <8aa423e5-39e9-155d-b1ed-df4ebef72757@linux.ibm.com> Date: Fri, 26 Aug 2022 13:55:13 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.9.0 Content-Language: en-US To: Janis Schoetterl-Glausch , Thomas Huth , Claudio Imbrenda , David Hildenbrand , Richard Henderson Cc: kvm@vger.kernel.org, linux-s390@vger.kernel.org, qemu-s390x@nongnu.org References: <20220720142526.29634-1-scgl@linux.ibm.com> <20220720142526.29634-2-scgl@linux.ibm.com> <1d0ef541-2b83-3c61-ec22-d5bf9a7698af@linux.ibm.com> From: Janosch Frank Subject: Re: [kvm-unit-tests PATCH v5 1/2] s390x: Add specification exception test In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: wfTNMdiSVx8P-H8DkhOkmOELSP8fZ3_C X-Proofpoint-GUID: GnsFrYPRRdKHjRhJAk4Mc7XQjQm2nNYp X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.517,FMLib:17.11.122.1 definitions=2022-08-26_05,2022-08-25_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 spamscore=0 impostorscore=0 lowpriorityscore=0 priorityscore=1501 phishscore=0 mlxlogscore=999 clxscore=1015 adultscore=0 malwarescore=0 suspectscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2207270000 definitions=main-2208260046 Precedence: bulk List-ID: X-Mailing-List: linux-s390@vger.kernel.org On 8/26/22 13:23, Janis Schoetterl-Glausch wrote: > On Wed, 2022-08-24 at 11:35 +0200, Janosch Frank wrote: >> On 7/20/22 16:25, Janis Schoetterl-Glausch wrote: >>> Generate specification exceptions and check that they occur. >>> >>> Signed-off-by: Janis Schoetterl-Glausch >>> --- >>> s390x/Makefile | 1 + >>> lib/s390x/asm/arch_def.h | 5 ++ >>> s390x/spec_ex.c | 180 +++++++++++++++++++++++++++++++++++++++ >>> s390x/unittests.cfg | 3 + >>> 4 files changed, 189 insertions(+) >>> create mode 100644 s390x/spec_ex.c >>> >>> >>> + >>> +/* >>> + * Load possibly invalid psw, but setup fixup_psw before, >>> + * so that fixup_invalid_psw() can bring us back onto the right track. Not sure if the second line is needed as fixup_psw is a descriptive name already. >>> + * Also acts as compiler barrier, -> none required in expect/check_invalid_psw >>> + */ >>> +static void load_psw(struct psw psw) >>> +{ >>> + uint64_t scratch; >>> + > > [...] > >> /* >> Store a valid mask and the address of the nop into the fixup PSW. >> Then load the possibly invalid PSW. >> */ > > This seems a bit redundant given the function comment, but I can > drop a comment in here describing how the fixup psw is computed. Well, I skipped the function comment, got confused by the addr asm variable and then decided to propose the comment. It's a bit confusing since you have the invalid PSW and the global fixup PSW in one function. Maybe something like: /* From here to the lpswe we're computing and setting the fixup PSW */ > >> >>> + fixup_psw.mask = extract_psw_mask(); >>> + asm volatile ( "larl %[scratch],0f\n" >>> + " stg %[scratch],%[addr]\n" >>> + " lpswe %[psw]\n" >>> + "0: nop\n" >>> + : [scratch] "=&d"(scratch), >>> + [addr] "=&T"(fixup_psw.addr) >> >> s/addr/psw_addr/ ? >> >>> + : [psw] "Q"(psw) >>> + : "cc", "memory" >>> + ); >>> +} >>> + >>> +static void load_short_psw(struct short_psw psw) >>> +{ >>> + uint64_t scratch; >>> + >>> + fixup_psw.mask = extract_psw_mask(); >>> + asm volatile ( "larl %[scratch],0f\n" >>> + " stg %[scratch],%[addr]\n" >>> + " lpsw %[psw]\n" >>> + "0: nop\n" >>> + : [scratch] "=&d"(scratch), >>> + [addr] "=&T"(fixup_psw.addr) >>> + : [psw] "Q"(psw) >>> + : "cc", "memory" >>> + ); >> >> Same story. > > Do you want me to repeat the comments here or just rename addr? Just rename addr > > [...] > >>> +static int not_even(void) >>> +{ >>> + uint64_t quad[2] __attribute__((aligned(16))) = {0}; >>> + >>> + asm volatile (".insn rxy,0xe3000000008f,%%r7,%[quad]" /* lpq %%r7,%[quad] */ >>> + : : [quad] "T"(quad) >> >> Is there a reason you never put a space after the constraint? > > TBH I never noticed I'm unusual in that regard. I guess I tend to think > of the operand and constraint as one entity. > I'll add the spaces. > >> >>> + : "%r7", "%r8" >>> + ); >>> + return 0; >>> +} >>> + > > [...]