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Tue, 28 Mar 2023 14:13:04 +0000 (GMT) Message-ID: Date: Tue, 28 Mar 2023 16:13:04 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.9.0 Content-Language: en-US To: Nico Boehr , imbrenda@linux.ibm.com, thuth@redhat.com Cc: kvm@vger.kernel.org, linux-s390@vger.kernel.org References: <20230327082118.2177-1-nrb@linux.ibm.com> <20230327082118.2177-2-nrb@linux.ibm.com> From: Janosch Frank Subject: Re: [kvm-unit-tests PATCH v1 1/4] s390x: sie: switch to home space mode before entering SIE In-Reply-To: <20230327082118.2177-2-nrb@linux.ibm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 X-Proofpoint-GUID: ydDKxu80fzuESgSFWwBsJ61SfTj-YZHV X-Proofpoint-ORIG-GUID: enmTvZwD1l6tmX6rNJO3e-HZntLoEiSZ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-03-24_11,2023-03-28_02,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 bulkscore=0 adultscore=0 spamscore=0 suspectscore=0 mlxlogscore=999 lowpriorityscore=0 impostorscore=0 mlxscore=0 priorityscore=1501 clxscore=1015 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303200000 definitions=main-2303280111 Precedence: bulk List-ID: X-Mailing-List: linux-s390@vger.kernel.org On 3/27/23 10:21, Nico Boehr wrote: > This is to prepare for running guests without MSO/MSL, which is > currently not possible. > > We already have code in sie64a to setup a guest primary ASCE before > entering SIE, so we can in theory switch to the page tables which > translate gpa to hpa. > > But the host is running in primary space mode already, so changing the > primary ASCE before entering SIE will also affect the host's code and > data. > > To make this switch useful, the host should run in a different address > space mode. Hence, set up and change to home address space mode before > installing the guest ASCE. > > The home space ASCE is just copied over from the primary space ASCE, so > no functional change is intended, also for tests that want to use > MSO/MSL. If a test intends to use a different primary space ASCE, it can > now just set the guest.asce in the save_area. > [...] > + /* set up home address space to match primary space */ > + old_cr13 = stctg(13); > + lctlg(13, stctg(1)); > + > + /* switch to home space so guest tables can be different from host */ > + psw_mask_set_bits(PSW_MASK_HOME); > + > + /* also handle all interruptions in home space while in SIE */ > + lowcore.pgm_new_psw.mask |= PSW_MASK_DAT_HOME; > + lowcore.ext_new_psw.mask |= PSW_MASK_DAT_HOME; > + lowcore.io_new_psw.mask |= PSW_MASK_DAT_HOME; We didn't enable DAT in these two cases as far as I can see so this is superfluous or we should change the mmu code. Also it's missing the svc and machine check. The whole bit manipulation thing looks a bit crude. It might make more sense to drop into real mode for a few instructions and have a dedicated storage location for an extended PSW mask and an interrupt ASCE as part of the interrupt call code instead. Opinions? > + mb(); > + > while (vm->sblk->icptcode == 0) { > sie64a(vm->sblk, &vm->save_area); > sie_handle_validity(vm); > @@ -60,6 +75,17 @@ void sie(struct vm *vm) > vm->save_area.guest.grs[14] = vm->sblk->gg14; > vm->save_area.guest.grs[15] = vm->sblk->gg15; > > + lowcore.pgm_new_psw.mask &= ~PSW_MASK_HOME; > + lowcore.ext_new_psw.mask &= ~PSW_MASK_HOME; > + lowcore.io_new_psw.mask &= ~PSW_MASK_HOME; > + mb(); > + > + psw_mask_clear_bits(PSW_MASK_HOME); > + > + /* restore the old CR 13 */ > + lctlg(13, old_cr13); > + > + > if (vm->sblk->sdf == 2) > memcpy(vm->save_area.guest.grs, vm->sblk->pv_grregs, > sizeof(vm->save_area.guest.grs)); > diff --git a/lib/s390x/sie.h b/lib/s390x/sie.h > index 147cb0f2a556..0b00fb709776 100644 > --- a/lib/s390x/sie.h > +++ b/lib/s390x/sie.h > @@ -284,5 +284,6 @@ void sie_handle_validity(struct vm *vm); > void sie_guest_sca_create(struct vm *vm); > void sie_guest_create(struct vm *vm, uint64_t guest_mem, uint64_t guest_mem_len); > void sie_guest_destroy(struct vm *vm); > +bool sie_had_pgm_int(struct vm *vm); > > #endif /* _S390X_SIE_H_ */